CAUI-4 Chip to Chip Simulations

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CAUI-4 Chip to Chip Simulations IEEE 802.3bm Task Force Ali Ghiasi Broadcom Corporation Jan 22-23, 2013 Phoenix

Overview A CAUI-4 chip to chip link with 20 db loss budget require DFE receiver and to avoid MTTFPA capability similar to 100Gbase-K4 is required Based on the above limitation turning down some of the bj KR4 capability is the best option MTTFPA was studied in great details in the bj group http://www.ieee802.org/3/bj/public/may12/cideciyan_01_0512.pdf Non-symmetrical link based on host with greater capability to deliver the required signal at TP1a and relying on host DFE receiver also may not be an option Based on above limitations and the market need for higher than 10 db loss budget CAUI-4 chip to chip can be defined with loss budget up to 13 db and could be engineered to as much as 15 db with CTLE receiver CAUI-4 chip to chip will be compatible with CAUI-4 chip to module 2

CAUI-4 Applications and Background http://www.ieee802.org/3/bj/public/jul12/ghiasi_02a_0712.pdf identified CAUI-4 applications as well as limitations As result of MTTFPA, non-symmetrical interface is not an option unless module retiemr has FEC capability 8 Supporting 300 mm link require SerDes with bj KR4 capability Is it really worth defining bj-kr4 link with 20 db loss budget? 200 mm Switch/ ASIC 300 mm Switch/ ASIC Switch/ ASIC ~125 mm 250 mm Switch/ ASIC 300 mm Mezzanine card Switch/ ASIC R R R R R R CR4 CR4 3

PCB Reach for Various Interfaces PCB loss estimate assumptions and tools for calculation IEEE 803.bj spreadsheet http://www.ieee802.org/3/bj/public/tools/dkdf_algebraicmodel_v2.02a.xlsm for N4000-13SI and Megtron-6 calculation Rogers Corp impedance calculator (free download but require registration) https://www.rogerscorp.com/acm/technology/index.aspx for FR4-6 and N4000-13 Stripline ~ 50 Ω, trace width is 5 mils, and with ½ oz Cu Surface roughness med per IEEE spreadsheet or 2.8 um RMS FR4-6 DK=4.2 and DF=0.02, N4000-13 DK=3.6 and DF=0.014, N4000-13SI and Meg-6 per IEEE spreadsheet Host Trace Length (in) Total Loss (db) Host Loss(dB) FR4-6 N4000-13 N4000-13SI Megtron 6 Nominal PCB Loss/in at 5.15 GHz N/A N/A 1.00 0.79 0.56 0.43 Nominal PCB Loss/in at 12.89 GHz N/A N/A 2.00 1.60 1.25 0.92 CAUI Classic 10.5 6.81 6.8 8.6 12.2 15.8 PPI CL85A/86A with one connector & HCB# 6.5 4.37 4.4 5.5 7.8 10.2 CAUI-4 with one connector & HCB* 10.5 6.81 3.4 4.3 5.4 7.4 802.3bj CL92A with one connector & HCB * 10.5 6.81 3.4 4.3 5.4 7.4 CAUI-4 Chip to Chip 10 10 5.0 6.3 8.0 10.9 CAUI-4 Chip to Chip 13 13 6.5 8.1 10.4 14.1 CAUI-4 Chip to Chip Engineered 15 15 7.5 9.4 12.0 16.3 OIF 28G-MR 20 20 10.0 12.5 16.0 21.7 # Assumes connector loss is 0.87 db and HCB loss is 1.26 db at 5.5 GHz. * Assumes connector loss is 1.69 db and HCB loss is 2.0 db at 12.89 GHz. 4

CAUI-4 Architecture and Reference Points The bm group need to further study CAUI-4 chip to chip application Host PCB Budget 10-15 db CAUI-4 Host IC TP0 Driver Receiver TP5 TP0 Driver CAUI-4 Host IC Receiver TP5 Host PCB Budget 6.8 db TP1 TP4 TP5 TP0 Connector Up to 1.69 db Mod PCB 1.5 db TP1a Receiver TP4a Receiver CAUI-4 Host IC Driver CAUI-4 Module IC Driver Chip Compliance Point 1.25 db@14ghz Module Compliance Point Propose 1.25 db@14 GHz Host Compliance Point Propose 2 db@14ghz 5

Increasing CAUI-4 Chip to Chip Reach Parameters that can increases CAUI-4 chip to chip reach Transmitter parameters and exact parameter that can be improved is dependent if this is large ASIC or PHY Rise/fall time can be made as fast as the min rise/fall time Jitter - could lowered by ~0.1 UI Amplitude - min value can be increased up to 900 mv Return loss no change Channel parameters ILD template to trade off loss vs ILD ICN template to trade off loss vs ICN Loss a1 coefficient needs to be control and only an issue with fat traces on low loss material or super low loss PTFE material Return loss no change Receiver parameters CTLE gain 1-9 db no change Sensitivity to be studied if it needs to improved from 100 mv Return loss no change 6

CAUI-4 Chip to Chip Informative Channel CAUI-4 chip to chip loss budget Assuming all worst case parameters loss budget is 10 db By improving some of the transmitter parameters and operating the link where naturally has lower ICN/ILD the loss budget can be 15 db 0-5 -10 SDD21 (db) -15-20 -25 10 db 15 db -30-35 -40 0 2 4 6 8 10 12 14 16 18 20 22 24 Frequency (GHz) 7

ILD and ICN Template ILD and ICN template are compatible at 10 db with QSFP28/ CFP2 type channels 6 0.14 5 0.12 4 0.1 ICN mv(rms) 3 2 Place Holder 0.08 0.06 ILD db(rms) ICN ILD 1 0.04 0 0.02 0 2 4 6 8 10 12 14 16 Channel Loss (db) 8

CAUI-4 Driver Define Hot driver with standard jitter but 800 mv output Tr=17 ps TJ=0.28 UI@1E-15 Define Fast-low jitter with 600 mv output Tr=13ps TJ=0.18 UI@1E-15 9

FR4 Channel Response Channels are 5 FR4 Channel with two long (80 mils) vias and 2 12 mils stub 5 FR4 + 3 Meg6 Channel 5 FR4 + 5 Meg 6 Channel 10

TE 7 Quadra Channel Response Channels are TE Quadra channel with 10 db loss TE 7 Quadra + 1.25 plug board+ 2 Meg6 Channel TE 7 Quadra + 1.25 plug board + 2 FR4 Channel 11

FR4 Channel ILD and Fit 10 db channel has ILDrms=0.013 and a1/a0=0.23 13 db channel has ILDrms=0.023 and a1/a0=0.59 15 db channel has ILDrms=0.025 and a1/a0=0.46 12

TE Quadra Channel ILD and Fit 10 db channel has ILDrms=0.045 and a1/a0=0.45 12 db channel has ILDrms=0.046 and a1/a0=0.62 13 db channel has ILDrms=0.049 and a1/a0=0.34 13

10 db Channel with Hot and Fast Transmitter Optimum TX de-emphasis 1 db for both TX 14

13 db Channel with Hot and Fast Transmitter Optimum TX de-emphasis 4 db for hot and 3 db for fast TX 15

15 db Channel with Hot and Fast Transmitter Optimum TX de-emphasis 6 db for hot and 6 db for fast TX 16

8.25 Quadra Channel with Hot and Fast Transmitter Optimum TX de-emphasis 6 db for hot and 6 db for fast TX 17

8.25 Quadra Channel + 2dB with Hot and Fast Transmitter Optimum TX de-emphasis 6 db for hot and 6 db for fast TX 18

8.25 Quadra Channel + 3dB with Hot and Fast Transmitter Optimum TX de-emphasis 6 db for hot and 6 db for fast TX 19

1E-15 Eye Opening (mv) Summary of Eye Opening Hot driver and fast driver have nearly similar far end performance! TE Quadra 10 db channel has slighlty better performance compare to channel with two long vias (~80 mils) and two short stub (~12 mils) Considering only 2 FEXT TE 10 db channel ~ 6% VEC penalty 170 160 150 140 130 120 110 100 90 80 70 60 50 40 0 1 2 3 4 5 6 7 8 De-emphasis (db) Hot 10dB Fast 10dB Hot 13dB Fast 13dB Hot 15dB Fast 15dB 1E-15 Eye Opening (mv) 170 160 150 140 130 120 110 100 90 80 70 60 50 40 0 1 2 3 4 5 De-emphasis (db) Hot 10dB Fast 10dB Hot 12dB Fast 12dB Hot 13dB Fast 13dB Fast 10dB +2FEXT 20

Summary For CAUI-4 chip to chip two channels were investigated FR4 channel with deep vias and short stubs TE Quadra based channel Result shown here is far end eye excluding DC block and receiver package and parasitic as observed on the scope with reference CTLE with gain of 9 db The equalized eye opening at the actual slicer typically ~25% less due to the RX package, ESD, and DC blocks Hot transmitter has comparable performance to fast transmitter having 25% less amplitude As the channel loss increases >12 db fast TX start performing better CAUI-4 chip to chip can support 13 db assuming TX FFE and RX CTLE having fast/low jitter or 800 mv driver Current CAUI-4 chip to module TP1a limit is 100 mv 13 db channel will have TP5 eye opening of 90 mv with improved driver 15 db channel will have TP5 eye opening of just 60 mv with improved driver 21

Thank You