Technical Article. TD350 IGBT driver IC including advanced control and protection functions. Introduction. Device description

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Technical Article IGBT driver IC including advanced control and protection functions by Jean-Francois Garnier, Standard Linear Division, STMicroelectronics Introduction New IGBT Driver IGBT devices play a large role in power applications due to their high current/voltage capability and ease of driving. The majority of industrial applications use a 3-phase inverter with 1200V IGBT. Driving these devices in medium or large power applications requires separate, floating high- and low-side drivers with galvanic insulation. Control and protection functions are also required to ensure reliable operation. The device presented hereafter is a new integrated circuit that includes all the functions necessary to directly drive an IGBT in power applications and is especially adapted to 1200V IGBT with current ratings of 25 to 80A in Econopak-like modules. Device description The new IC uses STMicroelectronics BCD3S process, and fits in a standard SO14 package. The block diagram is shown in Figure 1. The can be used with either a single positive power supply ( pin), or a dual positive/negative supply (/ pins). Separated source (OUTH) and sink (OUTL) output pins allow the use of different gate resistors for turn-on and turn-off. The source stage is built with a bipolar npn Darlington, whereas the sink stage uses a MOSFET. Peak output currents are 1.2A sink, 0.75A source minimum over the full temperature range (-20 C to 125 C). The IN input controls the driver outputs and is active low. Both optocoupler or pulse transformer can be used. A special filtering function rejects input signals smaller than 100ns for safe pulse transformer operation. An under-voltage lockout function protects the application in case of invalid supply voltage levels by driving the IGBT gate low when the supply is lower then the UO level (about 10V). May 2004 1/8

Figure 1: IGBT Driver Block Diagram UO IN 1V-4V Comp_Input Delay Vref VREF 250uA Comp_Desat DESAT Control Block 7.2V Vref FAULT COFF Comp_DelayOff S2 2.5V Comp_Clamp 2V CLAMP OUTH LVOFF 2-level OFF driver OUTL GND rev. 3 The DESAT and FAULT pins are used for the desaturation protection with adjustable blanking time and fault status signal. The IGBT collector-emitter voltage is monitored, whenever it may exceed 7V, the IGBT gate will be driven low and desaturation information will be feedback to the application controller by the FAULT pin. In addition to these well-known functions, the integrates two innovative features that will be described in more detail hereafter: l "The CLAMP pin is an input/output pin used for the Active Miller clamp function. l "The optional 2-step turn-off function uses the COFF pin connected to an external R/C timing circuit and the LVOFF pin connected to an external reference voltage. 2/8

Active Miller clamp function The Active Miller clamp function is used to reduce the risk of induced turn-on in high dv/dt conditions. Through this function, the offers an alternative solution to the problem of the Miller current in IGBT switching applications. Instead of driving the IGBT gate to a negative voltage to increase the safety margin, uses a dedicated CLAMP pin to control the Miller current. When the IGBT is off, a low impedance path is established between IGBT gate and emitter to carry the Miller current, and the voltage spike on the IGBT gate is greatly reduced (see Figure 2). Figure 2: Miller Effect and Active Miller Clamp Principle High-side driver Miller current Low-side driver high dv/dt! v oltage spik e on IGB T gate! High-side Miller current Low-side high dv/dt! active clamp reduced voltage spike The Active Miller Clamp function is implemented using a comparator that monitors the IGBT s actual voltage (see Figure 3). When the gate voltage goes lower than about 2V relative to the GND level, then an internal latch is set and the CLAMP pin is pulled to ground. Even if there occur voltage spikes due to the Miller current, the clamp is not released due to the latched state. The clamp is released only when the output is driven to again to the high level. In this way, the CLAMP function doesn t affect the turn-off characteristic, but only keeps the gate to the low level during all the off time. 3/8

Figure 3: Active Miller Clamp Function OUTH 12 Clamp Latch OUTL 11 Clamp reset logic R S Q 2V 9 CLAMP 10 The clamp switch characteristic is similar to the sink part of the output stage, i.e. 1.2A peak minimum, and a maximum VOL=3V at 0.5A over the full temperature range. The main benefits of the Active Miller Clamp are: no need to use a negative gate voltage to keep the IGBT in safe off state (allowing bootstrap technique for the high side driver supply), and the possibility to adjust the gate resistor to optimize the turn-off characteristics (commutation losses and EMI behavior) independently of the Miller current issues. The waveforms shown in Figure 4 show how the Active Miller Clamp results in a consistent reduction of voltage spikes on IGBT gate, both in amplitude and duration. Tests were done on a 1200V, 25A IGBT module with a gate resistor Rg=47Ohms. Figure 4: Vce and Vge waveforms without and with Active Miller Clamp function In large power applications where a negative voltage drive has to be used, the CLAMP pin can be used as a second gate discharge path during the turn-off (see Figure 5). When the gate voltage goes below 2V (i.e. the IGBT is already driven off), the CLAMP pin is activated and the gate is rapidly driven to the 4/8

negative voltage. Again, the benefit is an improvement in the time taken to drive IGBTs with a large gate capacitance to low level without affecting the IGBT turn-off characteristics. Figure 5: CLAMP used as secondary gate discharge path in large power application 13 OUTH 12 T1 OUTL 11 T2 10 9 CLAM P T3 8 GND Two-level turn-off function If there is a short-circuit or overcurrent in the load, a large voltage overshoot can occur across the IGBT at turn-off and can exceed the IGBT breakdown voltage. By reducing the gate voltage for a short time before turn-off, the IGBT current is limited and the potential overvoltage is reduced. This technique is called 2 level turn-off. Both the level and duration of the intermediate off level are adjustable. The level can be easily set by an external Zener diode; its value depends on the IGBT characteristics and is about 11V for a typical IGBT (see Figure 6). Figure 6: Ic=f(Vce,Vge) curves for a typical 1200V, 25A IGBT module 50 40 Vge=17V Vge=13V Vge=11V Ic (A 30 20 10 0 Vge=9V 0 1 2 3 4 5 Vce (V) The duration is set by an external resistor/capacitor in conjunction with the integrated voltage reference for accurate timing, and is in the range of a few microseconds. This 2-level turn-off sequence takes place at each cycle, and has no effect if the current doesn t exceed the normal maximum rated value, but it protects the IGBT in case of overcurrent event (with a slight increase of conduction losses). 5/8

Figure 7: Input signal, COFF timing and output waveform with the 2-level turn-off function (the COFF timing is exaggerated for illustration) To keep the output signal width unchanged relative to the input signal, the turn-on is delayed by the same value as the 2-level turn-off duration (see Figure 7). Using the same timing element guarantees minimum pulse distortion. The turn-on delay also provides a minimum on-time function as input signals smaller than this delay are ignored. Minimum on-time and low pulse width distortion allow safe and easy driving from a microcontroller or DSP system The two-level Turn-off function principle is shown in Figure 8. Whilst the device is in 2-level turn-off, the OUTL output is controlled by a comparator between the actual OUTL pin and an external reference voltage. When the voltage on OUTL goes down as a result of the turn-off and reaches the reference threshold, then the OUTL output is disabled and the IGBT gate is not discharged further. After the 2-level turn-off delay, the OUTL output is enabled again to end the turn-off sequence. Figure 8: Two-Level Turn-off Function Principle VREF COFF 5 Control Block 2,5V Lvoff off OUTL 11 LVOFF 7 120µA 10 6/8

Tests were done with a standard 1200V 25A IGBT module (Eupec FP25R12KE3) in a simple chopper circuit (see Figure 9) that allows one to adjust the level of the current at turn-off. Waveforms at turn-off are shown in Figure 10 and Figure 11 at the 150A level, which simulates an overcurrent event. Figure 9: Circuit for 2-level turn-off test 400V DC 250µH 1 IN DESAT 14 2 VREF 13 16V 10nF 4,7K 3 4 5 FAULT NC COFF OUTH OUTL 12 11 10 47R 47R -10V 470pF 6 NC CLAMP 9 7 LVOFF GND 8 10K 11V Figure 10: Classical turn-off (=16V to =-10V): driver output, Vge, Ic and Vce waveforms 7/8

Figure 11: 2-level turn-off (OUT voltage is turned-off from =16V to LVOFF=11V during 1.5µs and ultimately OUT is pulled to =-10V): driver output, Vge, Ic and Vce waveforms Maximum voltage reached on the IGBT collector and commutation losses are shown in Table 1 for both nominal rated current at 25 C (40A) and overcurrent (150A) conditions. There is no noticeable difference at nominal current, and the overvoltage is greatly reduced in the case of an overcurrent event. Table 1: Comparison between classical turn-off and 2-level turn-off nominal 400V/40A overcurrent 400V/150A Eoff (mj) Vce max(v) Eoff (mj) Vce max(v) Classical turn-off 2.5 620 15 1000 2-level turn-off with LVOFF=11V 2.5 620 23 640 Conclusion The new IGBT driver IC presented here is a versatile device that can be used in a wide range of power applications. The advanced functions (Desaturation protection, Active Miller Clamp, 2-level turn-off) integrated inside the IC allow safe and reliable operation with minimum external circuitry in applications such as motor control and UPS systems. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 8/8 The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Repubic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com