T KS. by DON LANCASTER. walking ring computer and the pse11do random seq11ence generator.

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T KS C OS hift re rs o you kno ht MOS shift register is? o you kno ho it orks? Here re the nsers plus ho to interfe the ith other logi f iii es nd different pplitions by ON LANCASTER A SHFT REGSTER S A GTAL ATA STOR ge devie. The dt n be the letters to be displyed on TV sreen, nubers in oputer or lultor, interedite vlues in digitl filter, or prt of n elborte ode or sequene. Shift registers re de up of individul stges. Eh stge n store one bit of infortion, lled binry or, nd usully orresponding to "yes or "no" or else perhps "present" or "bsent" ond. Four bits together n represent deil nuber, hile six bits together n hndle one ASC hrter, nd so on. n shift register, the ontents n be oved or shifted so tht the ontined infortion is rhed one nd only one stge t tie through the devie. The shifting proess is lled loking nd one or ore loks re involved in opleting the shifting opertion. Figure shos ho e ight ke shift register out of either K or type- flip-flop. While TTL (Trnsistor-Trnsistor logi) devies re shon. e ould use ny logi fily e like. nput dt orresponding to "'" or "O" is presented to the first stge. When the syste is loked, the first bit of dt is entered nd then stored in the first stge. On the seond loking, the ontents of the first stge get pssed on to the seond, nd the first stge then epts ne bit of infortion fro the input. The next loking psses the output of stge 2 on to stge 3, nd the output of stge on to stge 2. Finlly, stge epts ne bit of input infortion. One ore loking fills the register in Fig. s it is only four bits long, nd ll four stges no hve infortion in the. f e do no ore loking. the register ill keep the infortion e sent it. Four ore loking pulses nd e n rh the dt out nd use it soehere else. So ht good is shift register? We n use it to store infortion. t is digitl eorv. We n use it to delv infortion. We n use it to fordt infortion, either in buffer ode here the ente r nd redout lok rtes y be different, or in l'urible-ess ode here e n enter nd leve individul stges ith dt. With ertin types of shift registers, e n onvert seril dt to prllel for or prllel dt (ll t one) to seril (one t tie in sequene) for. We n lso build ounters nd sequeners ith shift registers. To populr types re lled the lking ring oputer nd the psedo rndo seqene genertor. Orgniztion The orgniztion of shift register is deided by ho ny stges it hs nd ho you n get t the individul stges. A seril-in-seril-out register gives you the input only to the first stge nd the finl output of the lst stge. it is soeties lled seril register or SSO (Seril-in-Seril-Out) register. There is no interedite ess. A SPO register gives you the outputs of ll stges inluding the lst one. The eight-bit 7464 is typil TTL exple. A prllel-in-seril-out or PSO register lets you siultneously lod ll the stges but then rhes the ontents out s seril-bit string. The TTL 7465 is n eight-bit exple of this type. The ost verstile type of shift register ould be PPO (Prllel-n-Prllel-out) version. Here, you ould lod dt either serilly one bit t tie or "brodside" prllel. You ould lso get ll the dt out either in brodside prllel ll-t-one for, or one bit t tie in seril for. The 7495 is fourbit TTL pkge tht does this. You ight think tht sine you ould use the PPO register for everything else nyy tht it ould be the only y to go. The proble is tht you n esily put 248 shift register stges on single sll hip of silion. For 248-bit PPO register, you'd need iniu of 499 leds for inputs, outputs. loks, nd poer supplies. This is ost unieldy pkge to sy the lest, even if e don't orry bout the extr iruitry needed for eh prllel input. No the se register n be done SSO in s ittle s 5 leds. So, for short shift register pplitions, e hve hoie of the four forts. For long shift register uses, the only eonoil y to go is the SSO route. We'll onsider everything longer thn 24 bits long shift register here. This is often hngeover point. 24 bits or less nd you usully use the ore flexibl nd fster TTL registers, often t four or eight stges per pkge. Above 25 bits. you go to the long seril MOS registers nd pik up s ny s 248 bits of storge in single pkge. The jority of registers shift only tords the output nd re lled shift right registers. A very fe n lso shift bk tords the input nd re lled bidiretionl or sh if t-right-shift-lef devies. These re expensive nd not norlly vilble in long lengths. One trik you n do ith reirlting register (ore on this in bit) is lok it rpidly hed one stge less thn its length, king it pper to bk up one, rther thn go forrd ll but one of its stges. To ore things y enter into our register orgniztion. We y hve ore thn one shift register in single pkge. One, to, nd six registers per pkge re oon. Usully. they hve oon loking, but not lys. For instne. the Signetis 258 is hex 32-bit shift register: the 259 is hex 4-bit version. Both hve oon loking nd oon enter/reirulte ontrol. You often use severl shift registers in prllel. For instne, you ight use four shift registers to individully hndle eh bit of four-bit BC or binryoded-deil digit. Thus eh loking of the register rry gets you hole ne deil nuber, rther thn only V.. of it The four hits is soeties lled ord nd soeties byte. Likeise, n lphnueri hrter n be represented by six bit ASC hrter ode. Here, e use six registers t one to give us one hole ne hrter on eh loking. Of ourse, e hve to ke sure ll the registers get loked extly like, for if they didn't, ll the dt bits ould be hopelessly srbled. This is usully very esy to prevent. A finl feture of shift register's orgniztion is its reirltibility. Soeties e ight like to look t the ontents of shift register bit t tie, nd then ret the infortion bk into the se reltive slots in the shift register for lter use. This is lled reirltion. Soe sort of sithing or seletion ust be provided if you re soeties going to enter ne dt s opposed to reirulting old dt. Soe of the long MOS shift registers hve n internl reirulte logi nd re norlly used if you need reirultion. We'll see in inute tht reirultion is essentil for the dyni registers if you re going to keep the dt ore thn frtion of seond. Figure 2 shos the logi needed to dd n externl reirulte to shift register. Long MOS shift registers There's n inredible vriety of long shift registers vilble using severl diferent MOS (Metl-Oxide-Seiondutor) s:::: :: 55

(/) (.) z - (.)... 6 ( 6 l"o" /4 74 "NPUT ATA" -- -- -- r N.C. L --...,,...-- "SHFT" PUSH BUTTON l"o'" "NPUT ATA" r -- r 5 v N.C. "SH FT"" ST 2N OUTPUTS 3R /2 747 2747 2 747 /2 747 -, _...,..,,...--<> L PUSHBUTTON -- K /4 74 /4 74 BOUNCE LESS j PUSHBUTTON K K K FNAL FG. --A SHFT REGSTER USNG K flip flops is shon. The loking pulses re derived fro the iruitry inside the dotted line. () USNG "K" FLP FLOPS ST 2N OUTPUTS 3R /2 7474 2 7474 /2 7474 /2 7474 -- -, /4 74 /4 74 tehnologies. These rnge fro sll 6- nd 2-bit versions up to 248-bit ones in single pkge. A brief nd ore or less rndo listing is given in Tble, hile soe of the ore proinent nufturers re listed in Tble. The typil single-unit prie vries fro round $3 FNAL FG. -b-a SHFT REGSTER USNG type flip flops. The loking pulses re derived fro the iruitry inside the dotted lines. (b) USNG "" FLP FLOPS to round $5 per unit nd typilly runs ell under penny per bit for the longer versions. Soe of these hve shon up surplus (see bk ds of Rdio-Eletronis) for s little s qurter eh for nufturers seonds. Soe of the seonds e tested fro the bk ds run round 45% "opletely useful" yield. All of these devies re seril-in-serilout. Typil xiu frequeny of opertion is 2 or 3 eghertz, lthough you get uh better behvior t 5 khz or so rte. Before you n use ny ong MOS shift register, you hve to sk the folloing questions:. s the register stti or dyni? 2. Ho do you interfe it ith TL or other logi? 3. Wht kind of lok signls re needed nd ho :y of the? 4. Cn it reirulte by itself? 5. oes it hve rite or red enbles tht lets you obine it ith ore registers? Let's tke look t these iportnt onepts in bit ore detil. Stti versus dyni Figure 3 shos three different types of shift registers. Our registers of Figs. nd 3- used to flip-flops for storge. They ill keep dt so ong s e pply supply poer nd re lled stti registers, or soeties fully stti registers. Trnsfortion of infortion in ny shift register hs to be to-stge proess or to-phse proess. On the beginning of shift, infortion is trnsferred into soe for of teporry storge. At the opletion of shift, the infortion is then sent to finl storge. n the se of Fig. -, e hve ster (teporry) nd slve (finl) storge ithin eh K flip-flop's logi blok. The reson for the neessity of to storge phses per shift is siple-try it ith only one, nd you get ild, unheked re through severl stges insted of n orderly progression of one nd only one oplete stge per loking. We don't need full flip-flop for soe pplitions. nsted, e n use the teporry storge of pitor. So, Fig. 3-b shos us dyni shift register. The pitor ill hold infortion for us for resonbly short tie, but eventully the lekge ill get to us nd destroy the infortion in the ell. Cpitor storge is uh sipler nd ore eonoil thn flip-flops s it usully uses the "free" pitne found in nory strys. Most dyni MOS shift registers ill hold their infortion for UP TO one-tenth of seond. Should you fil to lok the in tht tie, the infortion is lost. So, if you re only going to keep your infortion in your shift register for under frtion of seond before finlly using it, it doesn't tter hether you use stti or dyni register. The trouble is tht ost pplitions ll for dt to be reused or held longer thn frtion of seond. So, if you re to use the heper, denser dyni shift registers. you hve to ove or refresh the dt iniu of severl dozen ties seond. One y to hndle the oving of dt is to rh the infortion opletely one round t lest severl dozen ties per seond. n oputer terinl or TV Typeriter, reirultion t the 6 hertz vertil rte is one good pproh. Figure 3- shos n interesting oproise beteen stti nd dyni registers. Here, e use pitor for the teporry storge nd flip-flop for the finl storge. This is oproise tht gives us stti perforne t slightly over hlf the norl ost. Stritly speking, this is lled qusi-stti opertion, but prtilly ll the "stti" MOS reg-

isters use this tehnique. There is only one restrition, the lok lir.e ust rein in speified level during the stti prt of the opertion, nd there is xi lloble lok pulse idth during the dyni trnsfer proess. N /2 7474 /2 7474 nterfe Most of the long MOS registers ill interfe ith TTL. TL. nd RTL, but ost often fe resistors re needed. You hve to red the dt sheets very refully. Unless the dt sheet speifilly sttes otherise, the lok lines re NOT optible ith TTL nd tke speil drive iruitry. More on this in just bit. Reeber tht the inputs, enbles. reirultes, nd output pins n be de TTL optible. but the lok lost lys tkes speil iruitry. There re lots of different MOS tehnologies. nd eh tkes one of the interfe iruits shon in Fig. 4. You n usully tell the tehnology by the supply voltge used or reoended. f the supplies re ± 5 volts. hnp.s re it is etl f.u/e or hi' tl shold P /uel lerie. These re the oldest MOS integrted iruits nd the hrdest to interfe. To drive the. you need n open iruit TTL logi blok tht n ithstnd 5 volts. Suitble devies re the 746 nd 746. A pull-up resistor is provided to produe the ground nd ± 5- volt logi inputs. To resistors re norlly used in going fro the MOS to TTL. one don to - 5 to provide the -.6 A needed for TTL "O". nd one series resistor to liit the positive sing to 5 volts or less. Silion gte iruits re presently the ost oon. They hve +5 nd - 2-volt supply. Usully pull-up resistor is reoended hen they re driven by TTL, nd their output drive pbility depends on the prtiulr output struture used. Often single 6.8K resistor to - 2 volts does the trik. N-hnnel iruits often ork ith single +5-volt supply nd re diretly TTL optible ithout resistors on output nd input. CMOS integrted iruits lso ork off single +5- to + 5-volt supply. At + 5 volts, they re diretly TTL optible on n input, but y not hve enough output drive urrent for regulr TTL. so lo-poer TTL is often used s n output sense plifier. ts usully triky to siultneously drive nother MOS stge long ith TTL s the voltge nd urrent sings don't usully ork out too ell. To get round this, you usully run through single TTL inverter nd use its output to drive the MOS folloing. Cloks More probles hppen ith long shift registers over loks nd loking thn over ny other single diffiulty. First nd foreost, onsult the individul dt sheets for the devie you re going to use. Unless it speifilly sys so otherise (boldly nd in lrge print!), the lok lines re not optible ith TTL. Usully the lok lines need lost the entire supply sing, suh s 6- or 7-volt sing for silion gte i ruit on +5-. - 2-volt poer supplies. Furthe r, ht- = ENTER = RECRCULATE TABLE FG. 2-RECRCULATNG SHFT REGSTER. t n be fed fro the output to the nput. A FEW OF THE MORE POPULAR LONG MOS SHFT REGSTERS ELECTRONC ARRAYS: EA 3 ul 32, stti, re. EA 4 ul, stti EA 7 ul 32, stti EA2 ud 32, dyni EA 23 Vrible -64 dyni EA2 ul 526 dyni EA 22 Single 52 yni FARCHL: NTEL: 3325 ud 64, yni 333 48 Bit, yni 3342 ud 64, Stti 3343 ul 28, Stti 3346 ul 44, Stti 3383 Single 256, yni 42 ud 256, yn, Mpx. 43 ul 52, yn, Mpx. 44 Single 24, yn, Mpx. 45 Single 52, yn, Reir. 56 ul dyni 24 248 dyni, reir. 245 24 dyni, reir. MOSTEK: MK2 ul 28, Stti MK7 4 x 8, dyni MOTOROLA MC4G Triple 66 dyni MC42G Single 2 dyni MC6G dul dyni MC6G ul 5 bit stti MC236G ul Stti MC236 G ul 28 Stti MC2362G ul 25 Stti MC2363G ul 256 Stti MC238G ul dyni ELECTRONC ARRAYS NC. 5 Ellis Street Mountin Vie, Cliforni 944 FARCHL SEMCONUCTOR 464 Ellis Street Mountin Vie, Cliforni 944 NTEL CORPORATON 365 Boers Avenue Snt Clr, Cliforni 955 MOSTEK 25 West Crosby Rod Crrolton, Texs 756 TABLE NATONAL: MM4 MM42 MM46 ul 25 yni ul 5 yni ul yni MM4 ul 64 yni MM46 ul yni MM42 ul 256 yni MM43 Single 52, dyn, re. MM45 ud 64, stti MM554 ul 64/72/8 stti SGNETCS: 255 Single 52 dyn, re. 256 ul, dyni 259 ul 5 Stti 25 ul Stti 25 ul 2 Stti 252 Single 24, dyn, re. 258 Hex 32, stti, re. 259 Hex 4, stti, re. 252 ul 28, stti 2522 ul 28, stti 2524 Single 52, dyn, re. 2525 Single 24, dyn, re. 2527 ul 256 stti 2528 ul 25 Stti 2529 ul 24 Stti 2532 ud 8 stti 2533 24 stti, re. TEXAS NSTRUMENTS: TMS3 ul 25 stti TMS3 ul 32 stti TMS32 ul 5 stti TMS32 ul 28, stt, re. TMS32 ul 8, stti TMS32 Hex 32, stti, re. TMS33 ul 33 stti, re. TMS334 Triple 66, dyni TMS339 ul 52, dyni TMS334 Triple 6+4 dyni TMS342 Single 24 yni SOME LONG MOS SHFT REGSTER SOURCES MOTOROLA SEMCONUCTOR Box 292 Phoenix, Arizon 8536 NATONAL SEMCONUCTOR 29 Seiondutor rive Snt Clr, Cliforni 955 SGNETCS 8 Est Arques Avenue Sunnyvle, Cliforni 9486 TEXAS NSTRUMENTS Box 52 lls. Texs 75222 : 6

C/) 2 z - ()... < ever is driving the lok hs to drive bunh of internl sithes in long register, so the lok line pitne y be severl hundred piofrds. Sine you need shrp rise nd fll ties on the lok, it usully tkes speil iruit lled lok driver to get the job done, s the pek urrents involved in hrging nd dishrging the lok line pitnes y be severl hundred illiperes or ore. Exept for the siplest iruits, push-pull "tote pole" drive iruit is needed, nd sll urrent liiting resistor (usully ohs) ust be provided beteen the registers nd lok lines to prevent short iruit dges nd riseties tht rise hvo ith the supply lines nd deoupling. The loks ust NEVER be lloed to "overshoot" nd exeed the positive supply voltge, even briefly for this ill destroy or seletively hnge the infortion in the register. Cloks ust be the proper idths nd ust not overlp. Where to loks re used, the "dylight" or spe beteen the is just s iportnt s their idths. As generl rule, lys use lok idths ner the iniu lled for on the dt sheets. With ost registers, the ider the lok pulses, the ore the supply urrent. nd the hotter the C runs. leding to potentil teperture nd bit pttern sensitivity probles. Clok idths should be preisely derived fro syste tiing insted of rndoly djusted through onostbles or hlf-onostble pulse shpers, sine the position nd idths n be quite ritil. On your first design ith ne long MOS register, you lso hve to th for the nuber of loks needed per yle. Generlly stti registers need single lok nd eh lok pulse dvnes the infortion one stge. Stti registers re lso usully uh esier to drive on their lok lines. Most dyni registers hve to lok lines nd need to lok drivers. One lok is the ip lok; one is the tp lok. A pir of lok pulses is needed to dvne the infortion one stge. Finlly, there re fe dyni /tip/ered registers suh s the ntel 42. 43, nd 44. These re triky nd hrd to use. They ontin to internl shift registers ith oo input nd output. Wht is n input lok for one side is the output lok for the other hlf nd vie vers. The dt externlly ppers to trvel one stge per lok pulse, lthough pir of lok pulse is needed to oplete eh trnsfer opertion. Tf you re not very reful, you n end up one lok pulse short or long of ht you relly need. nd hnge the effetive register length. Note tht ny of these devies n hve the loks sped out in tie. They need not be ontinuous. They n be in bursts or rndo. so loflg s you don't exeed the iniu lok idth nd "dylight" sping. nd so long s you don't it FG. 3 (top of pge)-statc shift register. b) YNAMC shift register. ) UAS-STATC shift re!lster. FG. 4 (botto of pge)-nterfacng FFERENT MOS logi ith TTL gtes. The type of MOS logi n be identified by the supply requireents. N SET RESET FLP FLOP (l SOLATNG AMPLFER SET RESET FLP FLOP FNAL l T l s RAGE - CAPACTOR = +5V 3.3K (bl () METAL GATE :>o--+----4 P MOS N ±5V TTL SUPPLES OPEN COLLECTOR HGH VOLTAGE GATE 746 OR 74 6NLY FNAL SET-RESET FLP-FLOP FNAL K - 5V longer thn the dropout tie on dyni register. Outside of the pitne you y hve to hrge nd dishrge rpidly, ll of the inputs on ny MOS integrted iruit re essentilly open iruits nd neither soure nor sink urrent. Enbles An enble pin lets you obine either the outputs or inputs of shift register group ithout using ny fny seletor sithes or externl logi. Output enbles re soeties lled red eb/es. You n obine eories siply by shorting ll the outputs together provided you enble only one iruit t tie. To oon types of enbles re the ope olletor nd the tri-stte. The ltter provides "", "O'', or high-ipedne open iruit on ond. Write enbles lso exist, but only on fe of the long registers. Applitions We only hve enough roo to quikly run don soe obvious pplitions of long shift registers. To iportnt ones ere shon in the TV Typeriter story (Rdio-Eletronis, Septeber 973). Six reirulting 52-bit registers ere used s in eory hrter store nd finl hex 32-bit shift register s used s line register needed for fortting the dot trix hrters. Poket lultors nd oputers use long shift registers for nuber nd progr storge. Often, they re obined ith internl ultiplexing, lultion, nd ontrol iruitry into single pkge. Soe usi synthesizers use long shift registers s tune oputers or oposer storge. Severl fr out triks tht n be done ith the is the seprtion of pith nd tepo, nd the bility to ply n upside don sle, or reversed or bkrds sore. To reverse shift register, you siply run it hed N- lok pulses s fst s you n go. For instne, 52-bit shift register n be loked hed 5 bits in ell under illiseond, nd it ppers to hve bked up one slot t the end of the burst.. Long shift registers re idel for sequene genertion of noise tht repets for ryptogrphy, oputer seurity, usi, nd udio testing pplitions. Long shift registers ke good buffers or dt oentrtors. nput infortion n be loded into shift register t rndo, slo, or synhronous outsideorld rte nd then trnsferred to the rest of your iruit lter on synhronously t high speed. You n build n eletrilly vrible dely line out of long shift registers. The loking ontrols the dely tie independently of the input dt frequenies. You n get dely to risetie rtio of 5: out of 24-bit register, soething tht's hrd to do ith nlog dely lines. Speeh opression (for tlking book tpes nd reords), vibrto (for usi synthesizers), nd spetru trnsltion re three typil use exples. n fnier iruits, shift registers re used s the key eleent in digitl filters, (ontinued pge 97) 62

AUO FEEBACK CRCUTS (ontinued iro pge 87) Both the boost nd ut iruits re in the opertioo plifier iruit nd Eqution O does pply. Converting R, R nd R thetilly fro "tee" to "delt" onfigurtion lo filitte nlysis, ill yield oer boost frequeny t f... nd orner ut frequeny l f. They re both equl to 6.28C5 (R + 2R4). The interedite settings of the ontrol ill yield interedite ounts of treble boost nd ut. As s the se ith the bss ontrol, the oer frequeny is shifted y fro the enter frequeny hen less boost or ut is required t the upper ends of the bnd. The setting of the ontrol ill not ffet the enter or lo frequeny regions of the bnd. The vlue of C5 s set t bout -pf, so it ould not lod the input iruit exessively nd yet be lrge enough not to be ffeted by stry pitnes in the iruit. f s hosen for bout 6 db of boost t, Hz. An pproxite urve used to deterine the oer frequeny is shon in Fig. 9. At the xiu setting of the ontrol, f = f... =.5 khz. Sine R nd C5 re lredy knon, R, is lulted to be bout 5, ohs. R5 ust be de s s s prtil hen opred to the retne of C5 t the highest udio frequeny tht ust be boosted. A 5,-oh liner enter-tpped po tentioeter s found to be stisftory. A lo-gin plifier or loer ipedne bipolr trnsistor re frequently used in the feedbk tone ontrol iruit in ple of the FET. As these oponents use the opertionl plifier to differ rdilly fro the idel, the oponents ust hnge fro the lulted vlues to produe results siilr lo those outlined bove. The iruit should be designed in the lbortory in this se. Sine the fun'ction of eh oponent hs been detiled, the effets of hnging oponent is knon nd the design proedure does not hve to be hphzrd. A oplete tone ontrol iruit hs been drn in Fig. O shoing the bss nd treble ontrols. The folloing ftors ffeting the vrious funtions of the ontrol should be noted. The ount of boost nd ut produed by the treble ontrol is ffeted by R4 nd C5. Mke either oponent lrger if ore treble tion is required. To lesser degree, inresing R inrese the ount of treble boost, hile inresing R ffets the size of the treble ut. As for the bss iruit, C nd R ust be inresed to further ephsize the boost hile C2 nd R ust be inresed to entute the ut. R-E MOS SHFT REGSTERS (ontinued fro pge 6) orreltors, nd Fourier series lultors. And, s fin nd obvious pplition, shift registers re being used to reple gneti diss s ediu-speed, high-density storge systes for oputers. These re often lled silion dis files. Getting strted f you re ne to shift registers, pik up fe of the brgin surplus units nd try experienting ith the. You get best results if you stik ith the stti units t first nd void the older etl gte ±S volt iruits s they re brd to interfe. Reeber to pik up severl units t one if you re buying seonds. Above ll, hve the ext dt sheet on hnd, nd if possible, soe pplition notes s ell. Be sure to hve your poer supplies ell deoupled nd regulted nd ke sure your lok lines nd drivers ertly eet the speified requireents. Keep your lok pulse idths don round the iniu reoended vlues to iniize internl heting nd try to derive the lok idths nd sping fro digitl logi nd tiing rther thn using djustble onostble delys. R-E Kif CX>NTAHS 5......,...,.. r.- _...!t- e...,,..... r.-.- b ft \lllft...,._.....,...._!t"ecoll9"d9dtlosd l" 't"coll9"-'.._., spr..,.nolf'cmoeth........... -.,,-'- "'._. tl'dlrn-.t -.. tdtl'3rs...i.t.-v...r.,r...,dlrct*" PC.. "' " ""' M&...,,.. round n.: - OM* C P C eie rd.gnwcld'l..._ CWClft 9' -'t......_wndllllrf:ll'.. ft..,_,. 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C, egoh on AC 5-ties ore sensitive thn stndrd 2, ohs per-volt VOM Wide-rnge verstility: 4 p.p AC voltge rnges: -3.3, 33, 33, 2V; 4 RMS AC voltge rnges: O.2, 2, 2, 2V;4 C voltge rnges: -.2, 2.2.2V;4Resistne rnges: O lk, )<, eg., - e.; 48 rnges: -24 to +568. sensitive esy to red 4'h" 2 irop eter. Zero enter C!Sition vilble. Coprises FET trnsistor, 4 silion trnsistors, 2 diodes. Meter nd rn sistors proteted ginst burnout. Ethed pnel tor durbility. High-ipt bkelite se ith hndle useble s instruent stnd. Kit hs siplified step-by. step ssebly instrutions. Both kit nd ftory.ired versions shipped oplete ith btteries nd test leds. Slf4"H x ti 4""W x 2 ". 3 lbs. send FREE tlog ol oplete EMC line nd ne ol nerest distributor. RE-2 Addres"--- CitY --- Stt.,.ịp EMC ElHTRONC M[. $URH'[NT$ o r 62 6ro""' )' :i.te.!!ii '!'ore N 'f )C s::: :x 97