Status of the SiW-ECAL prototype Vincent Boudry École polytechnique, Palaiseau CALICE meeting Kyushu Universty 07/03/2016 TNA support + WP14
Analyses from 2015 BT Preparation of 2016 BT Long Term Plans ILD Studies Thermal studies SK2A Long SLAB tests Title Meeting, Place Date 2/28
Beam test at CERN nov 2015 2 16th of november 3/28
Side running Paolo Meridiani (Milano): test of prototype MicroChannel Plates with MgO coating in a small vacuum chamber Since 11th November HI muon beam Taikan Suehara (Kyushu U., CALICE) Test of alternative Guard Ring design on babywafers (3 3cm²) Noise pbms HI muons beam 4/28
Running conditions 4 layers ready for TB on test plates and put in the setup, the last layer was not operational (faulty HV) and was not used. Position of layers: beam DIF1, DIF2, DIF0 Each layer had 4 x 256 pixels / channels. All layers were always power pulsed. Spills: Several settings tried, mainly long spills (eg. 200 + 50 msec = data taking + readout/dead time) to increase statistics with SPS spills of a few seconds, so, effectively corresponding to quasi-continuous mode. Also, some special runs with short spills 2.5 + 247.5 msec (no BX clock cycling) DAQ: No problems with configuration of the setup. High Gain: All data have been taken with feedback C=1.2 pf (nominal value is 6 pf) 5 times higher gain and better S/N (unexpected), but lower dynamic range Selected trigger threshold = 230 after suppression of noisy cells much better than in cosmic runs one year ago (~290) but 220 (used for 2013 cosmic runs PCB (FEV8) ). Special runs with a few triggering cells in showers 5/28
Very smooth running DAQ: single crash (due to unchecked scripting) Many many data taken (but only ~85 GB) Beam structure + ACQ for ILC (bursts of 50ms 4Hz) Muons runs Calibation first @ high threshold variation of threshold, and angles (49, 90 ) Masking : 2.2% of all channels Electrons of 15, 30, 50, 100, 150 GeV with 8.5 X0 with mini-cal option this WE Pions of 50 and 150 GeV with 1.75 λ Check non un-conventionnal events Muon beam spots (X-Y distribution of N triggers, requiring ADC-pedestal>10) from typical muon run 361 as example 6/28
Analyses 1st : verification of behaviour with simple events SK2 response was a priority for SK2A prod Filtering Noise and establishing clean events Examples given here analyses from V. Balagura, K. Shpak 2nd : check of collective response Correlation between plates Modelling of shower response G4 MC being written by A. Psallidas (National Taiwan University, CMS) 7/28
Triggered Noise by Vladislav Balagura (ADC pedestal) in DIF 2 and DIF 0 for comparison (DIF 1 is even better), all channels combined, Distribution of Number of successive BX by classes (of 10) of Max(ADC-pedestal) for All Chips or Single Chips red and blue retrigger in common. This is the case for peak at zero Not seen in DIF0 thr. lowering limit due to retriggering. even in clean DIF0&1: 25% of events have RT for 50% of SK2 memory 8/28
Threshold level scans by Vladislav Balagura 9/28
Threshold level scans by Vladislav Balagura efficiency at MPV=60: eff ~ 96%, eff=50% at about 30 ADC counts. 10/28
Features of SK2 by Vladislav Balagura Retrigger pattern: Chain of re-triggers until Nch=64 due to global ped. shift resetted ch by ch. until all have triggered (best expl.) pedestals shift seen in ADC Pedestal splitting is channel and layer dependant Shift doesn t affect physics signal (mip here) 11/28
Square events by Kostya Shpak Normal event Shoot @ 90 5 squares in 4 events 4 Sq in 1 event Tools ready for statistical caracterisation 12/28
Others (not devoppeled here) Masking verification: some issues Pedestal width: S(MIP) / RMS(pedestal) =17..18. Data corruption in case readout time wasn t sufficient corrected by DAQ settings Good even for short spills with real power pulsing and drift effects Negative signal (ADC=4) located near the DIF connectors Pedestal stability Slow drift after power one on long period Splitted and delayed triggers Chip full events Un-operationnal chips if SCA=15 in ACQ-1 13/28
BT in 2016 and beyond 14/28
Beam test in 2016 Real calorimetric tests with 7 12 SLAB s in coordination with SDHCAL 7 ASU ready; production should resume in april real SLAB s (no more test plates) prod (will) start(ed) this month: see Roman s talk improved S/N ratio, robustness dependant on beam period (still under discussion) eventually could re-use some the CMS time in sept/oct. Flexible structure to accommodate variable number of SLAB s be in real conditions for PFA tests: 24 X0 of W + 3 cm hgap before SDHCAL 15/28
Test of HW: long slab Long slabs: what can t be done with a small RA source? perf in strong B field, with PP. Title Meeting, Place Date 16/28
Test of PFA s ECAL standalone separation of showers studies (γ s, e s) tracking in front? e+γ beam (thick target with a magnet in front ~10 m) ECAL + HCAL SW superposition of showers γ/e + h Physical superposition of showers (h+γ?) Test of PFA in B field Tracking, B effect in RPC s (?) on mechanics with PP, Reduction in size of the SHDCAL (last 10 layers) to fit in the M1 magnet in H2B? (~30 cm missing)?
ILD related studies
Integration in ILD: thermal studies by Denis GRONDIN / Julien GIRAUD (LPSC) 19/28
Integration in ILD: thermal studies by Denis GRONDIN / Julien GIRAUD (LPSC) 15 -SLAB s in EUDET module Heat exchanger assembly Insulation 20/28
Integration in ILD: thermal studies by Denis GRONDIN / Julien GIRAUD (LPSC) 3 day period 8 day period Power without cooling Conclusion: P= 15.476 W Efficiency of ex. isolation Peaks in external temp due to direct sunlight Thermal test takes time Ready for cooling tests... 21/28
Simulation modifications Slide from Sept 2014 Cleaning & adapatation of ECAL Mokka drivers: [D. Jeans + J. Marshall + E. Becheva + V. Boudry + Dan Yu] Many cleaning made by D. Jeans SECal05 Bugs, improved GEAR output, handling of pre-shower Documentation being reviewed s Statu 4 1 0 2 pt e S f o TBD: Implementation of SEcal05 in DDHEP (based on S. Lu implementation of SEcal04 + tests) Done for CLICdp by D. Protopopescu & M. Petric Needs to be review / adapted for ILD vs SECal04 New ECAL Driver (SEcal06) to correct defects (mostly in Endcaps). Missing dead materials, corners Consistant treatment of Barrel/Endcaps Better handling of Layers, optionnal pre-shower ILD SiW-ECAL optiminsation ILD SW & Optim WS 25/02/2016 22/28
Extras Title Meeting, Place Date 23/28
Final prototype test (2016+) Tower of 18 18 cm² (2 2 wafers) 14 Short SLABs 1 Long SLAB 2 2.1mm/lay 2 4.2mm/lay 24/28
7-Slab for Test beam 2015 The goal: 7.3 Testing the response of the short SLAB with 4 wafers! - TB position to be tested DAC Testing and surprises!!! Windows of 15 mm for W Cover shielding 4 short SLAB 1 Aluminium plate Cable panel Led panel position Frotin CALICE meeting 17/09/2009 25
A word about names «ILD SiW-ECAL technological prototype» more of less recently : EUDET prototype CALICE SiW-ECAL technological prototype ILD SiW-ECAL (in conferences) SiLC in recent project call in Paris-Saclay The prototoype is clearly being designed for the ILC, and ILD. from requirements for CLIC-SiW-ECAL, CMS-HGCAL, ATLAS-HGTD, FCC/CEPC CALICE is the structure to make this : e.g. recognised for this by CMS (and others) A high granularity calorimeter system optimised for the particle flow measurement of multi-jet final states at the ILC running, with centre-of-mass energy between 90 GeV and ~1 TeV open it up for other applications?
Physics program Physics commissioning: Check proper running with high intensity μ s (X-check of cosmics) Thr. adjustment vs noise environment. (Maybe require shielding). In parasitic mode: test of Babywafers (Kyushu, LLR) EM-Core Set-up: All slabs after 5 X0 of W Strong correlation between SLAB s Response at the core of a EM shower: Explore the full dynamic range (1 2500 mips) using shower profile (for all mem depth). e runs of all energies, beam rates linearity Check the responses at the wafers edges with types of wafers (square events) Scan in positions HAD-Core set-up: same as EM-core or with 1λ of W / SS Response to HE hadrons: look for SEU Mini-ECAL set-up: Sampling with 3-4 2.5 X0 and 2-3 5 X0 Study of theoretical resolution & simulation tuning. Scan in energy, position (and angle).
Chip initialissation pbm