14 12 10 8 6 IBM ES9000 Bipolar Fujitsu VP2000 IBM 3090S Pulsar 4 IBM 3090 IBM RY6 CDC Cyber 205 IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced IBM 360 IBM 3033 Vacuum Pentium II(DSIP) 0 1950 1960 1970 1980 1990 2000 2010 NTT Fujitsu M-780 Year of announcement IBM RY5 CMOS Jayhawk(dual) IBM RY7 Prescott T-Rex Mckinley Squadrons IBM GP IBM Z9 Pentium 4 10 9 8 7 6 5 4 3 2 1 Radio Receive for Mesh Maintenance 2-6 ma Typical Current Draw 1 sec Heartbeat 30 beats per sample Sampling and Radio Transmission 9-15 ma Low Power Sleep 0.030-0.050 ma Heartbeat 1-2 ma 0 200 220 240 260 280 300 Time (seconds) Digital Integrated Circuits EECS 312 http://robertdick.org/eecs312/ Review Teacher: Robert Dick Office: 2417-E EECS Email: dickrp@umich.edu Phone: 734 763 3329 Cellphone: 847 530 1824 HW engineers SW engineers GSI: Shengshou Lu Office: 2725 BBB Email: luss@umich.edu Current (ma) What are the historical motivations that have driven changes in digital device implementation technologies? What is the difference between a combinational and sequential network? What substrates (device types) have been used for computation? What are the primary advantages of integrated circuits over these competing technologies? Power density (Watts/cm 2 ) 2 Robert Dick Digital Integrated Circuits Remember the ENIAC? IC ENIAC 1946. 18,000 vacuum tubes. 30 tons. 100 khz. Unreliable. 30 tons 40mm 2. 100kHz 20MHz. Unreliable. What impact would ICs have on it? 4 Robert Dick Digital Integrated Circuits 5 Robert Dick Digital Integrated Circuits First microprocessor Trend for one company Intel 4004. 1971. 2,300 transistors. 12mm 2. 740 khz. 12-bit addresses, 8-bit instructions, 4-bit data words. More than ten generations. Datapath: 4 bits 64 bits. Frequency: 740 KHz 3GHz. In-order, cache-less Architectural features for common-case performance. Uni-processor Chip-multiprocessor (CMP). A few thousand transistors Billions of transistors. 6 Robert Dick Digital Integrated Circuits 7 Robert Dick Digital Integrated Circuits
Moore s law Actual trend 1965. The number of transistors in an IC doubles every 18 24 months. 8 Robert Dick Digital Integrated Circuits 9 Robert Dick Digital Integrated Circuits Feature size trends Logic density trends 10 Robert Dick Digital Integrated Circuits 11 Robert Dick Digital Integrated Circuits Frequency trends Power trends Technology scaling delay by 30% and frequency by 43%. Frequency 1/Delay. 12 Robert Dick Digital Integrated Circuits 13 Robert Dick Digital Integrated Circuits
Power density trends Power supply trends 14 IBM ES9000 CMOS Prescott 12 Bipolar Jayhawk(dual) Power density (Watts/cm 2 ) 10 T-Rex Mckinley 8 Fujitsu VP2000 Squadrons IBM GP IBM 3090S NTT IBM RY5 IBM Z9 6 Fujitsu M-780 IBM RY7 Pentium 4 Pulsar 4 IBM 3090 IBM RY6 CDC Cyber 205 IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced IBM 360 IBM 3033 Vacuum Pentium II(DSIP) 0 1950 1960 1970 1980 1990 2000 2010 Year of announcement 14 Robert Dick Digital Integrated Circuits 15 Robert Dick Digital Integrated Circuits Productivity trends Impact of power consumption and temperature Early ICs used bipolar transistors (BJT). Easier to manufacture reliably, faster. In the 1970s, integration densities rose. Each bipolar device consumes a lot of power. Eventually power became the limiting factor in moving from BJT to MOS devices. Currently CMOS dominates. Complementary MOS logic. Likely to dominate for the next decade. 16 Robert Dick Digital Integrated Circuits 17 Robert Dick Digital Integrated Circuits Power consumption trends Initial optimization at transistor level. Further research-driven gains at this level difficult. Research moved to higher levels, e.g., RTL. Trade area for performance and performance for power. Clock frequency gains linear. Voltage scaling V DD 2 important. Power consumption in synchronous CMOS P = P SWITCH +P SHORT +P LEAK P SWITCH = C V DD2 f A P SHORT = b 12 (V DD 2 V T ) 3 f A t P LEAK = V DD (I SUB +I GATE +I JUNCTION +I GIDL ) C : total switched capacitance V DD : high voltage f : switching frequency A : switching activity b : MOS transistor gain V T : threshold voltage t : rise/fall time of inputs P SHORT usually 10% of P SWITCH Smaller as V DD V T A < 0.5 for combinational nodes, 1 for clocked nodes. 18 Robert Dick Digital Integrated Circuits
Wiring power consumption Other (related) design trends In the past, transistor power wiring power. Process scaling ratio changing. Smaller transistors. Bigger chips (die). Lower power consumption. Higher clock frequencies. More complex designs. Lower voltage. 20 Robert Dick Digital Integrated Circuits 21 Robert Dick Digital Integrated Circuits Other (related) design trends Current status Smaller transistors. Bigger chips (die). Lower power consumption. Higher clock frequencies. More complex designs. Lower voltage. More cores. Some of these trends are slowing. Feature size: 22 nm. Integration: 700,000,000 transistors. Frequency: 2-4 GHz. Power: 100 W. Only two of these characteristics have changes in the past few years. 22 Robert Dick Digital Integrated Circuits 23 Robert Dick Digital Integrated Circuits Multi-core processors Summary of recent IC history Process scaling improves device count, speed. Power density increases, eventually limiting further improvements. Current move to multi-core. Also considering new device technologies, but no clear winners now. Intel Core 2 Duo 24 Robert Dick Digital Integrated Circuits 25 Robert Dick Digital Integrated Circuits
Levels of abstraction What properties must a digital device have? Hardware software system. Processor. Functional unit. Logic stage: flip-flop or combinational logic network. Gate. Transistor or wire. Physical material or doping regions. What allows us to treat a device as digital, and still have the system work? Does this imply certain properties for the transfer function? Derive and explain. 27 Robert Dick Digital Integrated Circuits 28 Robert Dick Digital Integrated Circuits Transfer function Completeness Technology should support implementation of arbitrary Boolean functions. Consider {AND2, OR2} and {NAND2}. V out Derive and explain. V in 29 Robert Dick Digital Integrated Circuits 30 Robert Dick Digital Integrated Circuits CMOS NMOSFET Metal Oxide Semiconductor Positive and negative carriers Complimentary MOS PMOS gates are like normally closed switches that are good at transmitting only true (high) signals source (N) gate dielectric channel drain (N) NMOS gates are like normally open switches that are good at transmitting only false (low) signals silicon bulk (P) 31 Robert Dick Digital Integrated Circuits 32 Robert Dick Digital Integrated Circuits
CMOS CMOS NAND gate NMOS turns on when the gate is high PMOS just like NMOS, with N and P regions swapped PMOS turns on when the gate is low NMOS good at conducting low (0s) PMOS good at conducting high (1s) Use NMOS and PMOS transistors together to build circuits Complementary metal oxide semiconductor (CMOS) pull up network PMOS V DD A B Z NMOS V SS pull down network 33 Robert Dick Digital Integrated Circuits 34 Robert Dick Digital Integrated Circuits What is this? What is this? How would we lay it out? V DD A B V SS 35 Robert Dick Digital Integrated Circuits 36 Robert Dick Digital Integrated Circuits Non-Credit quiz on material covered so far Upcoming topics 1 History of integrated circuits. 1 What happens as a result of process scaling? 2 What have the motivations for major changes in device technology been? 3 What is a digital system? 4 What is a general-purpose computer? 5 What is an embedded system? 6 What is an integrated circuit? 7 What is an ASIC? 8 What is an instruction processor? 9 What is an FPGA? 2 What gate properties support use in digital systems? 1 What properties should V out V in curve have? 2 Describe completeness. Enough overview: time to start building! Diodes Transistor static behavior Transistor dynamic behavior 37 Robert Dick Digital Integrated Circuits 38 Robert Dick Digital Integrated Circuits
Lab one challenges NMOS inverter schematic Learning to use the tools (Friday). Understanding the circuits used in the lab (Tuesday). A note on the CAD tools market. Derive and explain. 40 Robert Dick Digital Integrated Circuits 41 Robert Dick Digital Integrated Circuits NMOS inverter simulation results Upcoming topics 6 September: Discussion in room 1620 BBB will focus on Lab 1. 10 September: MOSFETs. 42 Robert Dick Digital Integrated Circuits 43 Robert Dick Digital Integrated Circuits assignment and announcement 5 September: Email topics of interest. 10 September: Read Sections 3.1, 3.2, and 3.3.1 in J. Rabaey, A. Chandrakasan, and B. Nikolic. Digital Integrated Circuits: A Design Perspective. Prentice-Hall, second edition, 2003. 17 September: Laboratory assignment one. 45 Robert Dick Digital Integrated Circuits