New Pixel Circuit Compensating Poly-si TFT Threshold-voltage Shift for a Driving AMOLED

Journal of the Korean Physical Society, Vol. 56, No. 4, April 2010, pp. 1185 1189 New Pixel Circuit Compensating Poly-si TFT Threshold-voltage Shift for a Driving AMOLED C. L. Fan, Y. Y. Lin, B. S. Lin and J. Y. Chang Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan, R.O.C. C. L. Fan and H. C. Chang Graduate Institute of Electro-optical Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan, R.O.C. This study presents a novel pixel circuit that uses only n-type low-temperature polycrystallinesilicon (poly-si) thin-film transistors (LTPS-TFTs) to simplify the fabrication process of activematrix organic light-emitting diode (AMOLED) displays. The proposed pixel circuit consists of five switching TFTs, one driving TFT (DTFT), and two capacitors. The output current and the OLED anode voltage error rates are about 3% and 0.7%, respectively. Thus, the pixel circuit can realize uniform output current with high immunity to the poly-si TFT threshold voltage deviation. The proposed novel pixel design has great potential for use in large-size, high-resolution AMOLED displays. PACS numbers: 85.30.De,85.60.Bt, and 85.60.Pg Keywords: AMOLED, Voltage programming method, Poly-si TFT DOI: 10.3938/jkps.56.1185 I. INTRODUCTION Organic light-emitting-diode (OLED) display technology has been widely studied recently. The OLED display has several properties, such as light weight, fast response time, wide viewing angle, high efficiency, and flexibility [1 3]. Although the passive-matrix OLED (PMOLED) is more simple in design compared with the active-matrix OLED (AMOLED), the PMOLED has some issues that must be addressed, including how to achieve a larger panel size, a higher resolution, a lower power consumption, and a longer OLED lifetime. Without solving these issues, the PMOLED can only be used for low-level products. In addition, the voltage drop influence on the power line for AMOLED displays is much lower than that for PMOLED displays [4]. The AMOLED can easily generate a constant current at each pixel during the entire frame time. Therefore, the AM technique has been used for large-panel-size display designs. Amorphous-silicon thin-film transistors (a-si TFTs) and low-temperature poly-silicon thin-film transistors (LTPS-TFTs) are commonly used in AMOLEDs. The a-si TFT technology is popular for practical manufacturing because of its well-established fabrication process. However, the applications of a-si TFT technology suffers from low mobility and very high threshold voltage E-mail: clfan@mail.ntust.edu.tw; Tel: +886-2-2737-6374; Fax: +886-2 -2737-6424 (V TH ) deviation, and cannot be used in p-type devices [5]. By contrast, low-temperature polycrystalline-silicon thin film transistors (LTPS-TFTs) are widely utilized in AMOLED displays due to their high current driving capability, which can integrate the data drivers into the panels [6]. However, the threshold voltage (V TH ) variations of LTPS-TFT devices still cause a huge deviation in the OLED current among pixels and image sticking in AMOLED displays. As a result, numerous compensation approaches have been developed to overcome this drawback [7 12]. Among these approaches, the voltage programming methods are more attractive than other methods because they can employ data drivers integrated into the panels. However, some voltage programming pixel circuits consist of both n-type and p-type TFTs, which make it more complicated to fabricate and increases the manufacturing period and complexity. In this paper, we propose a new voltage programming AMOLED pixel circuit to achieve very high immunity to the LTPS-TFT threshold voltage deviation. The simulation results demonstrate that the proposed pixel design effectively compensates for the TFT threshold voltage shifts. The output current error rate is about 3%, leading to a uniform image for AMOLED displays. The proposed new pixel circuit is composed of all n-type TFTs. Thus, the new pixel circuit is more suitable for manufacture due to its simplified process, compared with those reported in other publications [13 16]. Although the pixel circuit structure is 6T2C and may not have an outstand- -1185-

-1186- Journal of the Korean Physical Society, Vol. 56, No. 4, April 2010 Fig. 1. The diagram shows the OLED anode voltage variation simulation results for the conventional 2T1C pixel circuit. ing aperture ratio, we think the top emission structure can be applied to overcome this problem. We believe that this pixel circuit will prove advantageous for AMOLED display manufacture. II. PROPOSED PIXEL CIRCUIT OPERATION Fig. 2. (a) Proposed 6T2C pixel circuit and (b) the control signal timing diagram: (1) pre-charging period, (2) compensating period, (3) data-input period, and (4) emission period. Figure 1 shows the transient response of the conventional 2T1C pixel circuit with n-type LTPS TFTs. In this case, the V TH is set to 1 V, and the V TH is set to ±0.33 V. The variation percentage is about 33%. We believe the variation range should be sufficient enough for the LTPS TFT applications in AMOLEDs [17, 18]. This proves that the OLED anode affects the threshold voltage variation, which plays a key role in image quality. To create immunity to the LTPS-TFT threshold voltage deviation and improve the non-uniform brightness AMOLED issue, we propose a 6T2C pixel circuit. Figure 2 shows both our proposed pixel circuit based on poly-si TFT and the control line timing diagram. The pixel design consists of five switching TFTs (Sw1 Sw5), one driving TFT (DTFT), two capacitors (C1 and C2), and one OLED. There are two column lines (V DATA and V DD ) and three row lines (Scan, Power, EMS). Scan n and Scan n 1 are the present and the previous row lines, respectively. The circuit is separated into four periods: the pre-charging period, the compensating period, the data-input period, and the emission period. to V DD through Sw3 and Sw4. The EMS is set to a low voltage to prevent current from flowing to the OLED. The previously stored voltage at the DTFT gate node is reset for initialization. 2. Compensating Period Scan n and Scan n 1 still remain at low and high voltages as in the pre-charging period. The power is set to a low voltage to turn off Sw4. The EMS has a high voltage and turns on Sw5 for storing the threshold voltage of DTFT. Therefore, the DTFT gate voltage is discharged through Sw3 and Sw5 until DTFT and OLED are turned off. When DTFT turns off, the DTFT gate voltage settles from V DD to V TH (1 V) + V TO (1 V), where V TH and V TO are the threshold voltages of the DTFT and the OLED, respectively. The DTFT gate voltage will be stored in C1 because of the diode connection structure. 1. Pre-charging Period In the pre-charging phase, Scan n is set to a low voltage to turn off Sw1, and Scan n 1 is set to a high voltage to turn on Sw2 and Sw3. The power is set to a high voltage to turn on Sw4. Thus, the DTFT gate is charged 3. Data-input Period After the compensating period, Scan n goes into high voltage to turn on Sw1. Scan n 1 and EMS have low voltages and turn off Sw2, Sw3, and Sw5. Meanwhile, V DATA is stored in C2, and the DTFT gate voltage is boosted to (V DATA + V TH +V TO ) by C1.

New Pixel Circuit Compensating Poly-si TFT Threshold-voltage Shift for a Driving AMOLED C. L. Fan et al. -1187- Fig. 3. Simulation result for 6T2C compared with a conventional 2T1C pixel circuit. 4. Emission Period Fig. 4. Gate, source, and drain voltages of a driving TFT (DTFT) when V DATA = 3 V: (1) pre-charging stage, (2) compensating stage, (3) data-input stage, and (4) emission stage. In this period, Scan n and Scan n 1 are set to low voltages to block the V DATA signal from Sw1. The Power line and the EMS have high voltages. Sw4 and Sw5 are turned on. During this phase, the DTFT starts to saturate the output currentby the voltages stored in C1 and C2, which means the V GS of DTFT. At this time, the output current of DTFT (I OLED ) is given as I OLED = 1 2 K DTFT(V GS DT F T V TH ) 2 = 1 2 K DT F T (V DATA + V TH + V TO V D V TH ) 2 = 1 2 K DT F T (V DATA + V TO V D ) 2 where V D is the OLED voltage when the OLED is emitting light. Therefore, I OLED is independent of the DTFT threshold voltage and is only affected by V DATA, V TO and V D. However, it is difficult to compensate for the mobility variation of the driving TFT because the K DTFT is a constant, (µc W L ), where µ is proportion to the TFT driving current. III. SIMULATION RESULTS AND DISCUSSION The AIM-SPICE simulation was used to confirm the effectiveness of the proposed 6T2C pixel circuit. The OLED was modeled using a diode-connected poly-si TFT and a capacitor. The simulated OLED pixel size was 19200 µm 2. The simulated OLED capacitance was set to 25 nf/cm 2, and the variation in the DTFT threshold voltage was set at ±0.33 V to validate the worst case design. In order to generate the required OLED current, the DTFT was designed with a width of 20 µm and a length of 2 µm. The range of Scan n and Scan n 1 are -3 9 V, and V DD is 9 V. Figure 3 demonstrates the simulation result for the I OLED error rate when the DTFT Fig. 5. The diagram shows the OLED anode voltage variation simulation results. threshold voltage is varied by ±0.33 V ( V TH = ±0.33 V). Compared with the I OLED of the conventional 2T1C pixel circuit, that of the proposed 6T2C pixel circuit is much more stable. Figure 4 shows the gate, drain, and source node voltages of the DTFT when the V DATA is 3 V. The circuit operation is divided into four periods as we mentioned before. At the end of the compensating period, the DTFT gate voltage is charged from V DD to (V TH + V TO ), where V TH is the DTFT threshold voltage and V TO is the OLED threshold voltage. During the emission period, the DTFT gate voltage is boosted to (V DATA + V TH + V TO ). Thus, the DTFT V GS becomes (V DATA + V TH + V TO - V D ), where V D is the OLED anode voltage when the OLED is emitting. According to Fig. 4, the DTFT is operated in the saturation region. Therefore, the proposed circuit can successfully compensate for the DTFT threshold voltage deviation. Figure 5 shows the simulation results of the OLED anode voltage variation caused by DTFT threshold voltage deviations ( V TH = ±0.33 V). Apparently, the OLED current stability depends very strongly on the voltage differences between the OLED anode and cathode. Thus, the influence of the OLED anode voltage is a critical problem. The insert in Fig. 5 shows a detailed data for

-1188- Journal of the Korean Physical Society, Vol. 56, No. 4, April 2010 Fig. 6. OLED current as a function of V DATA with the deviation of the threshold voltage for 6T2C. Fig. 8. Modified pixel circuit schematic and the control signal timing diagram. IV. MODIFIED PIXEL CIRCUIT FOR AMOLED Fig. 7. OLED luminance error rate as a function of V DATA owing to the variation in the threshold voltage for 6T2C. the OLED anode voltage variation in the proposed pixel design. The OLED anode voltage is maintained perfectly as 2.418 and 2.444 V due to the DTFT threshold voltage variation of +0.33 V and -0.33 V, respectively. The OLED anode voltages are observed to be insensitive to the DTFT threshold voltage deviation. Moreover, the error rate of the OLED anode voltage when the DTFT threshold voltage varies by ±0.33 V ( V TH = ±0.33 V) is below 0.7% for the proposed pixel design. Figure 6 shows the transfer characteristics of the proposed pixel circuit for threshold voltage variations for different input data voltage (V DATA ). The plot indicates that OLED currents for the proposed 6T2C pixel circuit are nearly independent of the V TH deviations for different input data signals. In other words, a improved significant image uniformity was demonstrated against threshold voltage variations from the DTFT. As shown in Fig. 7, the average OLED output current error rate is about 3% when the V DATA is varied by 1 5 V. The simulation results show that the proposed 6T2C pixel circuit successfully compensates for the DTFT V TH variations to achieve display uniformity for the AMOLED. To increase the aperture ratio of the pixel, we modified the pixel circuit by eliminating a TFT, as shown in Fig. 8. The modified circuit is 5T2C. The simulation result indicates that the average output current error rate is about 3.5%, compared to the 3% for the 6T2C pixel circuit. However, the 5T2C circuit is composed of a p- type TFT and four n-type TFTs. Therefore, the aperture ratio and the simplified process will be a trade-off and should be considered at the same time. For the modified pixel circuit, a detailed analysis will be completely realized and will be proposed in the future. V. CONCLUSION A new voltage modulated low-temperature polycrystalline-silicon TFT pixel circuit for AMOLEDs was proposed. The proposed circuit will simplify the manufacturing process time because the device is composed of only n-type TFTs. The simulation results demonstrate that the proposed pixel design effectively compensates for TFT threshold voltage shifts. The OLED current error rate is about 3%, which leads to a uniform image quality for the AMOLED displays. We believe that this pixel circuit design will be advantageous for the manufacture of AMOLED displays.

New Pixel Circuit Compensating Poly-si TFT Threshold-voltage Shift for a Driving AMOLED C. L. Fan et al. -1189- ACKNOWLEDGMENTS The authors would like to acknowledge the financial support from the National Science Council (NSC) under contract no. NSC 98-2221-E-011-141 and the technical support from the Active-Matrix and Full-Color Department, RiT display Corporation, Taiwan. REFERENCES [1] T. Funamoto, Y. Matsueda, O. Yokoyama, A. Tsuda, H. Takeshita and S. Miyashita, SID Int. Symp. Dig. Tec. 33, 899 (2002). [2] C. W. Lin, D. Z. Peng, R. Lee, Y. F. Shih, C. K. Jan, M. H. Hsieh, S. C. Chang and Y. M. Tsai, International Display Manufacturing Conference and Exhibition (Taipei, 21 Feb., 2005), p. 315. [3] M. Stewart, R. S. Howell, L. Pires, M. K. Hatalis, W. Howard and O. Prache, Technical Digest - International Electron Devices Meeting (San Francisco, 6 Dec., 1998), p. 871. [4] M. Kimura et al., IEEE Trans. Electron Dev. 46, 2282 (1999). [5] A. Nathan, A. Kumar. K. Sakariya, P. Servati, S. Sambandan and D. Striakhilev, IEEE J. Solid-State Circuits 39, 1477 (2004). [6] J. C. Goh, H. J. Chung and J. Jang, IEEE Electron Device Lett. 23, 544 (2002). [7] J. C. Goh, J. Jang, K. S. Cho and C. K. Kim, IEEE Electron Device Lett. 24, 583 (2003). [8] J. C. Goh, C. K. Kim and J. Jang, SID Int. Symp. Dig. Tec. 34, 494 (2003). [9] J. Lee, W. Nam, S. Jung and M. Han, IEEE Electron Device Lett. 25, 280 (2003). [10] T. Sasaoka et al., SID Int. Symp. Dig. Tec. 32, 384 (2001). [11] M. Mizukami, K. Inukai, H. Yamagata, T. Konuma, T. Nishi, J. Koyama, S. Yamazaki and T. Tsutsui, SID Int. Symp. Dig. Tec. 31, 912 (2000). [12] Y. C. Lin and H. P. D. Shsieh, IEEE Electron Device Lett. 25, 728 (2004). [13] S. H. Jung, H. K. Lee, T. J. Ahn, C. Y. Kim, C. D. Kim and I. J. Chung, J. Soc. Inf. Display 15, 541 (2007). [14] Y. Tanada, M. Osame, R. Fukumoto, K. Saito, J. Sakata and S. Yamazaki, SID Int. Symp. Dig. Tec. 35, 1398 (2004). [15] Y. M. Tsai, D. Z. Peng, C. W. Lin, C. H. Tseng, S. C. Chang, P. Y. Lu and L. J. Chen, SID Int. Symp. Dig. Tec. 37, 1451 (2006). [16] Y. H. Tai, B. T. Chen, Y. J. Kuo, C. C. Tsai, K. Y. Chiang, Y. J. Wei and H. C. Cheng, IEEE/OSA J. Disp. Technol. 1, 100 (2005). [17] H. Y. Lu, T. C. Chang, Y. H. Tai, P. T. Liu and S. Chi, IEEE/OSA J. Disp. Technol. 3, 398 (2007). [18] C. L. Lin, T. T. Tsai and Y. C. Chen, IEEE/OSA J. Disp. Technol. 4, 54 (2008).