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Transcription:

RELIABILITY REPORT FOR MAX3612ETM+T PLASTIC ENCAPSULATED DEVICES December 22, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Richard Aburano Quality Assurance Manager, Reliability Engineering Maxim Integrated Products. All rights reserved. Page 1

Conclusion The MAX3612ETM+T successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I....Device Description V....Quality Assurance Information II....Manufacturing Information III....Packaging Information VI....Reliability Evaluation IV....Die Information...Attachments I. Device Description A. General The MAX3612 is a high-performance, precision phase-locked loop (PLL) clock generator optimized for next-generation high-speed Ethernet applications that demand low-jitter clock generation and distribution for robust high-speed data transmission. The device features subpicosecond jitter generation, excellent power-supply noise rejection, and pin-programmable LVDS/LVPECL output interfaces. The MAX3612 provides nine differential outputs divided into three banks. The frequency and output interface of each output bank can be individually programmed, making this device an ideal replacement for multiple crystal oscillators and clock distribution ICs on a system board, saving cost and space. This 3.3V IC is available in a 7mm x 7mm, 48-pin TQFN package and operates from -40C to +85C. Maxim Integrated Products. All rights reserved. Page 2

II. Manufacturing Information A. Description/Function: Low-Jitter Clock Generator with Nine LVDS/LVPECL Outputs B. Process: MB3 C. Number of Device Transistors: 32219 D. Fabrication Location: USA E. Assembly Location: China, Taiwan and Thailand F. Date of Initial Production: November 13, 2009 III. Packaging Information A. Package Type: 48-pin TQFN 7x7 B. Lead Frame: Copper C. Lead Finish: 100% matte Tin D. Die Attach: Conductive E. Bondwire: Au (1 mil dia.) F. Mold Material: Epoxy with silica filler G. Assembly Diagram: #05-9000-3657 H. Flammability Rating: Class UL94-V0 I. Classification of Moisture Sensitivity per Level 1 JEDEC standard J-STD-020-C J. Single Layer Theta Ja: 36 C/W K. Single Layer Theta Jc: 1 C/W L. Multi Layer Theta Ja: 25 C/W M. Multi Layer Theta Jc: 1 C/W IV. Die Information A. Dimensions: 130 X 130 mils B. Passivation: BCB C. Interconnect: Al/0.5%Cu D. Backside Metallization: None E. Minimum Metal Width: Metal1 = 0.23 / Metal2 = 0.6 / Metal3 = 1.2 / Metal4 = 4 microns (as drawn) F. Minimum Metal Spacing: Metal1 = 0.23 / Metal2 = 0.5 / Metal3 = 1.2 / Metal4 = 4 microns (as drawn) G. Bondpad Dimensions: H. Isolation Dielectric: SiO 2 I. Die Separation Method: Wafer Saw Maxim Integrated Products. All rights reserved. Page 3

V. Quality Assurance Information A. Quality Assurance Contacts: Richard Aburano (Manager, Reliability Engineering) Don Lipps (Manager, Reliability Engineering) Bryan Preeshl (Vice President of QA) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate ( ) is calculated as follows: = 1 = 1.83 (Chi square value for MTTF upper limit) MTTF 192 x 4340 x 48 x 2 (where 4340 = Temperature Acceleration factor assuming an activation energy of 0.8eV) = 22.9 x 10-9 = 22.9 F.I.T. (60% confidence level @ 25 C) The following failure rate represents data collected from Maxim's reliability monitor program. Maxim performs quarterly life test monitors on its processes. This data is published in the Reliability Report found at http://www.maxim-ic.com/qa/reliability/monitor. Cumulative monitor data for the MB3 Process results in a FIT Rate of 0.06 @ 25C and 1.05 @ 55C (0.8 ev, 60% UCL) B. E.S.D. and Latch-Up Testing (lot SVPZB3001H, D/C 0927) The HQ01 die type has been found to have all pins able to withstand a transient pulse of: ESD-HBM: ESD-CDM: +/- 2500V per JEDEC JESD22-A114 +/- 750V per JEDEC JESD22-C101 Latch-Up testing has shown that this device withstands a current of +/- 250mA and overvoltage per JEDEC JESD78. Maxim Integrated Products. All rights reserved. Page 4

Table 1 Reliability Evaluation Test Results MAX3612ETM+T TEST ITEM TEST CONDITION FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF COMMENTS FAILURES Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. DC Parameters 48 0 SVPZB3001J, D/C 0927 & functionality Note 1: Life Test Data may represent plastic DIP qualification lots. Maxim Integrated Products. All rights reserved. Page 5