Digital Systems Laboratory 3 Counters & Registers Time 4 hours

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Transcription:

Digital Systems Laboratory 3 Counters & Registers Time 4 hours Aim: To investigate the counters and registers constructed from flip-flops. Introduction: In the previous module, you have learnt D, S-R, J- flip-flops. These flip-flops can be connected together to perform certain operations. In this laboratory, we will focus on registers and counters. We look at how to construct the counters using J flip-flops. We will also look at how to build registers for storage and shifting from simple D -type flip-flops sharing common clock lines. Counters A counter is a sequential machine that produces a specified count sequence. The count changes whenever the input clock is asserted. There are a great variety of counters based on their construction. 1. Clock: Synchronous or Asynchronous 2. Clock Trigger: Positive edged or Negative edged 3. Counts: Binary, Decade 4. Count Direction: Up, Down, or Up/Down 5. Flip-flops: J or D Registers Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip -flops connected in a chain so that the output from one flip -flop becomes the input of the next flip -flop. Most of the registers possess no characteristic internal sequence of states. The flip-flops are driven by a common clock and can be set or reset simultaneously. The basic types of shift registers are serial in - serial out, serial in - parallel out, parallel in serial out, parallel in - parallel out, and bidirectional shift registers. Procedure: Complete the following parts and fill in your results in the laboratory sheet provided. You must show the demonstrator your working circuit to be signed off. Failure to sign off will mean that the circuit will be deemed as not constructed.

Section 1: Shift Register (Serial in - Parallel Out) Construct the following circuit using D flip-flops (). Then connect L1-L4 to the LED board and the clock line to a function generator. The out pulse from the function generation should be set to a 5V square wave with a frequency of 1 Hz. Ask your demonstrator to sign off your working circuit. Clear Line Input L1 L2 L3 L4 Clock Line Figure 1 Shift Register 1.1 1.2 Describe the operation of the above circuit, including in your explanation the function of the clear line, and the clock line. Can you ignore the unused preset inputs and the terminals? 1.3 Describe briefly how you load in the binary number 1001. Section 2: Ring Counter Change the circuit from figure 1 to the following configuration given in figure 2. Ask your demonstrator to sign off your working circuit. Clear Line L1 L2 L3 L4 Clock Line Preset Figure 2 Ring Counter

2.1 2.2 Section 3: What are the initial states of the outputs when the combined clear/preset line is set LOW? Set the combined clear/preset line HIGH and describe the result. Decade Ripple Counter Construct the circuit shown below using the J flip-flops. A,B,C, and D are inputs to a numeric display or to an LED board. Note that J and must be connected to HIGH. Ask your demonstrator to sign off your working circuit. A B C D 1:A 1:B 2:A 2:B 7473 7473 7473 7473 J J J J CLR CLR CLR CLR 7400 Figure 3 Decade Ripple Counter 3.1 What is the capacity (modulus) of this counter? 3.2 What is the function of the NAND gate? Explain in some detail what it does. 3.3 What happens if you remove the NAND gate connections? Does this change the modulus of the counter, if so what to?

Section 4: Two Stage Counter Use two 7490 integrated decade counters to construct the circuit below. Ask your demonstrator to sign off your working circuit. A A Figure 4 Two Stage Counter 4.1 4.2 4.3 4.4 Consider the functional block diagram of the 7490 chip in the data sheet and explain the connection from A back to the B input. What is the capacity of this Counter? Connect the 100kHz signal to the input. Use the CRO to monitor and record the frequency of the input, the first decade output, and the second decade output. Explain the terms divide-by-ten and divide-by-hundred. How would you modify the circuit to make it into a divide-by twenty-five counter?

Laboratory 3 Date.././. Name:.. Registers and Counters Partner:... Section 1: Shift Register (Serial in Parallel-out) 1.1... 1.2... 1.3...... Demonstrator Section 2: Ring Counter 2.1. 2.2...... Demonstrator

Section 3: Decade Ripple Counter 3.1.. 3.2............ 3.3.... Section 4: Two Stage Counter 4.1... 4.2... 4.3 Input Signal Freq. =.... 1st Decade output Freq. = 2nd Decade output Freq. = Explanation...

4.4...