High ResolutionCross Strip Anodes for Photon Counting detectors

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High ResolutionCross Strip Anodes for Photon Counting detectors Oswald H.W. Siegmund, Anton S. Tremsin, Robert Abiad, J. Hull and John V. Vallerga Space Sciences Laboratory University of California Berkeley, CA 94720 Cross strip anodes, O. Siegmund SSL UCB <OS> 1

Cross Strip Anode Configuration Cross strip readout is a multilayer anode with ~0.5mm period strip sets in orthogonal directions. This is comparable to cross delay line anodes, however without the delay line, Instead each strip is connected to an amplifier. Cross strip is a multi-layer layer cross finger layout. Fingers have ~0.5mm period on ceramic. Charge spread over 5 strips per axis, Event position derived from charge centroid. Can encode multiple simultaneous events. Fast event propagation (few ns). Compact and robust (900 C). MCP Pair Charge distribution on strips Charge cloud Cross strip anodes, O. Siegmund SSL UCB <OS> 2

High ResolutionCross Strip Anodes Collector strips Charge cloud Fingers have ~0.5mm period on ceramic. Charge spread over 5 strips per axis Lower strips are exposed 50% Upper strips cover other 50% Connect amps to each strip Use ASIC multi amplifier chips Y amplifiers X amplifiers Cross strip anodes, O. Siegmund SSL UCB <OS> 3

Cross Strip Anode Configuration Initial 8 x 8 mm test XS anode 0.5mm period, all metal/ceramic Onboard wire-bonded preamplifier chips. External amp, digitization and software centroid Cross Strip Scheme Characteristics Low MCP gain (few x 10 6 ) Resolutions <10µm FWHM Linear images (few µm nonlinearity ) Compact & robust (900 C capable) Very fast signal propagation ( - 1ns) Future potential advances Large formats >50mm possible Small, low power ASIC encoding High event rates (>1 MHz) Multiple simultaneous event capable 16 channel preamps X axis strips, 0.5mm period Y axis strips 0.5mm period Photo of the 8 x 8mm test XS anode with its wire-bonded preamplifier chips. Cross strip anodes, O. Siegmund SSL UCB <OS> 4

Cross Strip Anode Electronics Chain MCP s anode Preamplifier chip Shaping amplifier Multichannel ADC To PC I/F Discriminator Schematic of the cross strip anode position encoding electronics test-bed system. All signals amplified and digitized. Choose up to 12 bits per signal. Slow ADC s (10µs per digitization) using standard lab electronics, but sufficient for evaluation tests and flexible to select & diagnose parameter dependence. ICD-2 preamplifier (16 ch) chip design that is being used for the current tests on the XS. ~1500e- rms noise, <20ns output, 10mW/ch. Cross strip anodes, O. Siegmund SSL UCB <OS> 5

Initial Images with 12µm MCP Pair and Cross Strip Anode 2 x 2 mm area imaged by cross strip anode. 12µm pore MCP s in a back to back pair with ~5 x 10 6 gain. Shows MCP multifiber modulation, dead pores, pore misalignments, and Moire beat modulation between the MCP s. Cross strip anodes, O. Siegmund SSL UCB <OS> 6

12µm MCP Detector Image Resolution 15 10 5 0 0 20 40 60 80 100 120 Position (µm) Image section of a 12µm pore MCP pair obtained at 5 x 10 6 gain with the XS anode. An image histogram slice of the 12µm pore MCP image showing the significant level of modulation. Cross strip anodes, O. Siegmund SSL UCB <OS> 7

10µm MCP Detector Image Resolution 14 12 Counts 10 8 6 4 2 0 0 20 40 60 80 100 120 Position (µm) Image detail of a 10µm pore MCP pair obtained at 2 x 10 6 gain with the XS anode shows the defective MCP material. Image histogram slice of the 10µm pore MCP image showing the significant level of modulation. Cross strip anodes, O. Siegmund SSL UCB <OS> 8

7µm MCP Detector Image Resolution 100 80 Counts 60 40 20 0 0 10 20 30 40 50 60 Position (µm) Histogram in X of the 7µm pore MCP image at 2 x 10 6 gain showing a few µm resolution. Images of the 7µm pore MCP pair at 2 x 10 6 gain showing multifiber boundaries and misaligned pores Cross strip anodes, O. Siegmund SSL UCB <OS> 9

7µm MCP Detector Image Resolution 12 bits 9 bits 10 bits Image section of a 7µm MCP pair taken with the XS anode at different values of the signal digitization accuracy showing that the resolution does not degrade until 9 bits is reached. Cross strip anodes, O. Siegmund SSL UCB <OS> 10

Encoding Electronics Development Scheme A1 ADC 10 bits A2 A3 ADC ADC 12x12 Multiply & Accumulate ΣnQ Centroid Table (ΣnQ/ΣQ) Add LSB FIFO A4 ADC 12x12 Multiply & Accumulate ΣQ MSB To Comp. A5 ADC 10 bit Control Logic FPGA Amp/Disc./ADC Correction Table Coarse Addr. 7 bits High speed hardware electronics chain downstream electronics can be implemented in standard modules Overall processing speed should support >10MHz rates 15 in /5 out, second generation amplifier design Cross strip anodes, O. Siegmund SSL UCB <OS> 11

Integrated Cross Strip Anode Design Anodes up to 32 x 32mm have been made Signals are routed to anode backside by hermetic vias Packaging can be compact with amp on anode backside Anodes can be sealed to tube package with all electronics external 32mm x 32mm cross delay line 32mm x 32mm XS anode backside & proposed design showing fan-in, amp chip, & outputs Cross strip anodes, O. Siegmund SSL UCB <OS> 12

Small Pore and Silicon MCP Developments Hexagonal pore Si MCP with ~7µm pores, >75% open area Small pore MCP s are now available (5-66 µm) Better spatial resolution - Faster response times Tight PHD at low gain - Lower background Now available in >100 x 50mm formats Silicon MCP s Silicon MCP s are made by photo-lithographic methods Photolithographic etch process - very uniform pore pattern No multifiber boundaries and array distortions of glass MCP s Scalable to large substrate sizes (200mm) with small pores (5µm) High temperature tolerance - CVD and hot processes OK UHV compatible, low background (No radioactivity) In collaboration with Nanosciences. Diamond coated Si MCP Silicon microchannel plates in test program 25mm diameter (75mm currently feasible) 40:1 L/D (>100:1 possible) 7µm pore size, hexagonal and square pore ~2 bias and 8 bias, resistances ~GΩ, to <100MΩ possible Cross strip anodes, O. Siegmund SSL UCB <OS> 13

Silicon MCP Performance Characteristics! Many Si MCP s of 25mm diameter with ~7µm pores have been tested! The performance is improving as production is being refined.! Gain, quantum detection efficiency and pulse height are now very similar to glass MCP s! Open area ratio is up to >75% for hexagonal pores! The background rate is lower (0.02 events cm -2 sec -1 ) than normal or low background glass! CVD/MBE deposition of high temperature cathodes possible (Diamond made & measured) Gain 1.00E+05 1.00E+04 1.00E+03 1.00E+02 1.00E+01 1.00E+00 Si 208 CVD 105-1 CVD107-5 CVD106-1 CVD120-2 CVD114-1-c CVD122-2 CVD122-4 CVD122-4-BEO CVD134-1 CVD134-4 CVD139-2 CVD139-4 ITT Glass MCP CVD169-3 Glass MCP 0 500 1000 1500 2000 Voltage (V) Gain evolution of single Si MCP s Cross strip anodes, O. Siegmund SSL UCB <OS> 14 Background Rate (events cm -2 sec -2 ) 0.07 0.06 0.05 0.04 0.03 0.02 0.01 Residual counts from glass MCP's? 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Threshold (% modal gain) Si MCP background rate as a function of gain threshold.

Silicon MCP Performance Characteristics Gain and response uniformity are reasonably good.! We have tested the first stacks of Si MCP s (4) with gain up to 10 6! Scrubbing of Si MCP s shows a tendency for the gain to increase!! Si MCP s lack of any periodic modulation in the flat field images but do show evidence of defects Gain curve for a stack of 4 back to back Si MCP s with 6µm pores and 40:1 L/D. An image of the fixed pattern response to a Hg vapor lamp with a stack of 4 Si MCP s. ~14mm area, 10 7 counts, ~50µm resolution XDL. Cross strip anodes, O. Siegmund SSL UCB <OS> 15

Cross Strip Readout Status Summary! ~7µm pores are being resolved, <3µm electronic resolution 3cm = 10k x 10k = 100 x 10 6 pixels!!! $1/pixel = $100 x 10 6 (ARISAKA!), will take $0.01/pixel, $10 6 bids!! Image linearity is ~1µm level and shows pore misalignments! Gain required is ~2 x 10 6, allows higher local event rates! Lower gain means longer overall lifetime! Packaging can be compact with amp on anode! 32mm anode format implemented, test with Si MCP s soon! Development Plan! Fabrication of amp/disc/sparse chips! Integrate downstream electronics into small package! Power requirement of ~2W for 30mm readout! High counting rates of 5MHz feasible! Develop 40mm+ anode formats Cross strip anodes, O. Siegmund SSL UCB <OS> 16