UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD. In Re: U.S. Patent 7,116,710 : Attorney Docket No

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1 UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD In Re: U.S. Patent 7,116,710 : Attorney Docket No Inventor: Hui Jin, et. al. : Filed: May 18, 2001 : Claimed Priority: May 18, 2000 : Issued: October 3, 2006 : IPR No. Unassigned Assignee: Title: California Institute of Technology Serial Concatenation of Interleaved Convolutional Codes Forming Turbo-Like Codes Mail Stop PATENT BOARD Patent Trial and Appeal Board U.S. Patent and Trademark Office P.O. Box 1450 Alexandria, Virginia Submitted Electronically via the Patent Review Processing System PETITION FOR INTER PARTES REVIEW OF CLAIMS 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 OF U.S. PATENT NO. 7,116,710 UNDER ET SEQ. BASED ON FREY AS A LEAD REFERENCE

2 Petition for Inter Partes Review of U.S. Patent No. 7,116,710 TABLE OF CONTENTS I. MANDATORY NOTICES, STANDING, AND FEES... 1 II. OVERVIEW OF CHALLENGE AND RELIEF REQUESTED... 2 A. Publications Relied Upon... 2 B. Grounds For Challenge... 3 III. OVERVIEW OF THE 710 PATENT... 4 A. Summary of the Claimed Subject Matter... 4 B. Prosecution History of the 710 Patent... 4 IV. SUMMARY OF PRIOR ART... 6 A. State of the Art... 6 B. Summary of References Relied Upon... 9 V. CLAIM CONSTRUCTION A. Level of Ordinary Skill in the Art B. Repeating Terms C. Irregularly D. Interleaving / Interleaver / Scramble E. Rate close to one F. Stream VI. A REASONABLE LIKELIHOOD EXISTS THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE A. Ground 1: The 710 Patent Claim 1 is Anticipated Under 35 U.S.C. 102 by Frey B. Ground 2: The 710 Patent Claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are Obvious Under 35 U.S.C. 103 over Frey in view of Divsalar i

3 Petition for Inter Partes Review of U.S. Patent No. 7,116,710 C. Ground 3: The 710 Patent Claims 15, 16, 21, and 22 are Obvious Under 35 U.S.C. 103 Over Frey in View of Divsalar and in Further View of Hall D. Ground 4: The 710 Patent Claim 20 is Obvious Under 35 U.S.C. 103 over Frey in View of Divsalar and in further view of Ping E. Ground 5: The 710 Patent Claim 20 is Obvious Under 35 U.S.C. 103 over Frey in View of Divsalar and Ping and in further view of Hall VII. CONCLUSION ii

4 Petition for Inter Partes Review of U.S. Patent No. 7,116,710 LIST OF EXHIBITS 1001 U.S. Patent No. 7,116,710 by Hui Jin, et. al. entitled Serial Concatenation of Interleaved Convolutional Codes Forming Turbo- Like Codes. (the 710 Patent ) 1002 Prosecution History of the 710 Patent 1003 U.S. Patent No. 7,421,032 by Hui Jin, et. al. entitled Serial Concatenation of Interleaved Convolutional Codes Forming Turbo- Like Codes. (the 032 Patent ) 1004 Prosecution History of the 032 Patent 1005 U.S. Patent No. 7,421,781 by Hui Jin, et. al. entitled Serial Concatenation of Interleaved Convolutional Codes Forming Turbo- Like Codes. (the 781 Patent ) 1006 Prosecution History of the 781 Patent 1007 U.S. Patent No. 8,284,833 by Hui Jin, et. al. entitled Serial Concatenation of Interleaved Convolutional Codes Forming Turbo- Like Codes. (the 833 Patent ) 1008 Prosecution History of the 833 Patent 1009 U.S. Provisional Application Ser. No. 60/205,095 by Hui Jin, et. al. (the 095 Provisional Application ) 1010 Declaration of Henry D. Pfister, Ph.D D. Divsalar, H. Jin, and R. J. McEliece, Coding Theorems for "Turbo-like" Codes. Proc. 36th Allerton Conf. on Comm., Control and Computing, Allerton, Illinois, pp , Sept ( Divsalar ) (published no later than April 30, 1999 at the University of Texas library) 1012 B.J. Frey and D.J.C. MacKay, Irregular Turbocodes. from the 37th Allerton Conference ( Frey ) (published no later than October 8, 1999 at the website of D.J.C. MacKay) iii

5 Petition for Inter Partes Review of U.S. Patent No. 7,116, E.K. Hall and S.G. Wilson, Stream-Oriented Turbo Codes. 48th IEEE Vehicular Technology Conference, pp , 1998 ( Hall ) (published no later than June 23, 1998 at the Library of Congress) 1014 L. Ping, W. K. Leung, N. Phamdo, Low Density Parity Check Codes with Semi-random Parity Check Matrix. Electron. Letters, Vol. 35, No. 1, pp , Jan. 7th, 1999 ( Ping ) (published no later than April 22, 1999 at the Library of Congress) 1015 M. Luby, M. Mitzenmacher, A. Shokrollah, D. Spielman, Analysis of Low Density Codes and Improved Designs Using Irregular Graphs. STOC 98 Proceedings of the Thirtieth Annual ACM symposium on Theory of Computing, pp , 1998 ( Luby ) (published no later than July 30, 1998 at the University of Washington) 1016 U.S. Patent No. 6,081,909 by Michael Luby, et. al. entitled Irregularly Graphed Encoding Technique. ( the Luby 909 Patent ) (filed November 6, 1997 and issued June 27, 2000) 1017 F. R. Kschischang and B. J. Frey, Iterative decoding of compound codes by probability propagation in graphical models. IEEE Journal on Selected Areas in Communications, 16, ( Kschischang ) (published no later than Febuary 23, 1998 at the Library of Congress) 1018 U.S. Patent No. 7,089,477 by Michael Divsalar, et. al. entitled Interleaved Serial Concatenation Forming Turbo-Like Codes. ( the 477 Patent ) 1019 RA.c code (including RA.c, and supporting files) 1020 J.L. Hennessy and D.A. Patterson, Computer organization and design: the hardware/software interface ( Hennessy ) (published no later than November 8, 1994 at the Library of Congress) 1021 Complaint, California Institute of Technology v. Hughes Communications, Inc. et. al., No. 13-CV (CACD) 1022 Amended Complaint, California Institute of Technology v. Hughes Communications, Inc. et. al., No. 13-CV (CACD) iv

6 Petition for Inter Partes Review of U.S. Patent No. 7,116, D. J. C. MacKay, S. T. Wilson, and M. C. Davey, Comparison of Constructions of Irregular Gallager codes. IEEE Trans. Commun., Vol. 47, No. 10, pp , Oct ( MacKay ) (published no later than December 3, 1999 at the Library of Congress) 1024 Corrected Claim Construction Order (D.I. 105) 1025 Joint Claim Construction and Prehearing Statement (D.I. 60) 1026 Reporter s Transcript of Claims Construction and Motion Hearing of July 9, U.S. Patent No. 4,623,999 by Patricia Patterson, entitled Look-up Table Encoder for Linear Block Codes. ( the 999 Patent ) (issued November 18, 1986) 1028 Luby, Mitzenmacher, Shokrollahi, Spielman, and Stemann, Practical loss-resilient codes in STOC '97 Proceedings of the twenty-ninth annual ACM symposium on Theory of Computing, Richardson, Shokrollahi, and Urbanke, Design of Provably Good Low-Density Parity Check Codes 1030 Bond, Hui, and Schmidt, Constructing Low-Density Parity-Check Codes with Circulant Matrices ITW 1999, Metsovo, Greece (June 27-July ) Viterbi and Viterbi, New results on serial concatenated and accumulated-convolutional turbo code performance in Annales Des Télécommunications Benedetto, Divsalar, Montorsi, and Pollara, Serial concatenation of interleaved codes: Performance analysis, design, and iterative decoding in IEEE Transactions on Information Theory, Vol. 44 (3), McEliece, MacKay, and Cheng Turbo Decoding as an Instance of Pearl s Belief Propagation Algorithm, as published to under the filename BPTD.ps.gz by August 14, 1997 v

7 Petition for Inter Partes Review of U.S. Patent No. 7,116, B.J. Frey and D.J.C. MacKay, slide presentation entitled Irregular Turbocodes presented at the 1999 Allerton Conference held September 22-24, 1999 (Published Sept 22-24, 1999) 1035 B.J. Frey, slide presentation entitled Irregular Turbocodes presented at the 2000 ISIT conference, on June 25, 2000 (Published June 25, 2000) 1036 B.J. Frey, slide presentation entitled Irregular Turbocodes presented at the Second International Symposium on Turbocodes and Related Topics in Brest, France in September 2000 (Published June 25, 2000) 1037 D.J.C. MacKay, slide presentation entitled Gallagher Codes-Recent presented at the 1999 IMA Summer Program at the University of Minnesota in Minneapolis, Minnesota (Published Aug. 3-5, 1999) 1038 Wayback Machine capture of the May 7, 1999 contents of D. J. C. MacKay, S. T. Wilson, and M. C. Davey, Comparison of Constructions of Irregular Gallager Codes as published to under the filename ldpcirreg.ps.gz on July 30, 1998 (Published July 30, 1998) 1040 Screen capture of last-modified time information of MacKay website content 1041 D. J. C. MacKay, Gallager codes Recent Results as published to under the filename sparsecodes.ps.gz by July 16, 1999 (Published July 16, 1999) 1042 D.J.C. Mackay, Abstract Gallager Codes Recent Results as published to under file name sparsecodes0.ps.gz by June 2, D. J. C. MacKay, Gallager codes Recent Results. Proceedings of the International Symposium on Communication Theory and Applications, Ambleside, 1999, ed. by M. D. B. Honary and P. Farrell. Research Studies Press, 1999 (the Ambleside Presentation ). (published no later than July 16, 1999 at the website of D.J.C. MacKay) vi

8 Petition for Inter Partes Review of U.S. Patent No. 7,116, Portion of electronic log of D.J.C. MacKay dated July 16, McEliese, et. al., slide presentation entitled RA presented at the Institute for Mathematics and its Applications conference on August 3, Screen capture of last modified dates of slides from B.J. Frey and D.J.C. MacKay, Irregular Turbocodes. Proc. 37th Allerton Conf. on Comm., Control and Computing, Monticello, Illinois, Sep (published no later than May 11, 2000 at the British Library Boston Spa) 1048 B.J.Frey and D.J.C. MacKay, Irregular Turbocodes ISIT 2000 Conference, Sorrento, Italy June 25-30, D.J.C. MacKay, R.J. McEliece, J-F.Cheng, Turbo Decoding as an Instance of Pearl s Belief Propagation Algorithm as appearing on the MacKay websites as of May 7, D.J.C. MacKay, Encyclopedia of Sparse Graph Codes as it appeared on the MacKay websites as of May 7, D.J.C. MacKay, Low Density Parity Check Codes over GF(q) as it appeared on the MacKay websites as of May 7, D.J.C. MacKay, Decoding Times of Irregular Gallager Codes as it appeared on the MacKay websites as of May 7, D.J.C. MacKay, Good Error-Correcting Codes Based on Very Sparse Matrices as it appeared on the MacKay websites as of May 7, D.J.C. MacKay, Decoding Times of Repeat-Accumulate Codes as it appeared on the MacKay websites as of May 7, B.J. Frey, D.J.C. MacKay, Trellis-Constrained Codes as it appeared on the MacKay websites as of May 7, 1999 vii

9 Petition for Inter Partes Review of U.S. Patent No. 7,116, D.J.C. MacKay, Turbo Codes are Low Density Parity Check Codes as it appeared on the MacKay websites as of May 7, H. D. Pfister and P. H. Siegel, The serial concatenation of rate-1 codes through uniform random interleavers. Proc. 37th Allerton Conf. on Comm., Control and Computing, Monticello, Illinois, pp , Sep ( Pfister ) (published no later than May 11, 2000 at the British Library Boston Spa) 1058 R. J. McEliece, Repeat-Accumulate Codes [A Class of Turbo-like Codes that we can analyse] Summer Program: Codes, Systems, and Graphical Models, University of Minnesota, Institute for Mathematics and its Applications, Aug. 2-13, 1999 (the IMA Presentation ) Declaration of Brendan J. Frey 1060 Declaration of David J.C. Mackay 1061 C. Berrou, A. Glavieux, and P. Thitimajshima, Near Shannon Limit Error Correcting Coding and Decoding. IEEE International Conference on Communications, ICC '93 Geneva. Technical Program, Conference Record, (1993) 1062 MacKay and Neal, Near Shannon Limit Performance of Low Density Parity Check Codes. Electronic Letters(August 29, 1996) 1063 S. Benedetto, G. Montorsi, Unveiling Turbo Codes: Some Results on Parallel Concatenated Coding Schemes. IEEE Transactions on Information Theory, vol. 42, no. 2 (March 1996) 1064 Declaration of Robin Fradenburgh Concerning the Proceedings, 36th Allerton Conference on Communications, Control, and Computing Reference 1065 Wayback Machine capture of the December 9, 2006 contents of from Paul Siegel to Henry F. Pfister viii

10 I. MANDATORY NOTICES, STANDING, AND FEES Real Party in Interest: Hughes Network Systems, LLC and Hughes Communications, Inc. ( Petitioner or Hughes ) are the real parties in interest. Hughes is a provider of broadband satellite services. EchoStar Corporation is the parent of Hughes Satellite Systems Corporation, which is the parent of Hughes Communications, Inc. Related Matters: The 710 Patent is currently involved in a pending lawsuit entitled California Institute of Technology v. Hughes Communications, Inc. et. al., No. 13-CV (CACD) (the Lawsuit ). See Ex The Lawsuit includes the following patents: (i) U.S. Patent No. 7,116,710; (ii) U.S. Patent No. 7,421,032; (iii) U.S. Patent No. 7,916,781; and (iv) U.S. Patent No. 8,284,833. The complaint was filed on October 1, 2013 and waiver of service was filed on November 12, Petitioner is contemporaneously filing petitions for Inter Partes review for the other patents identified above. Lead Counsel and Request for Authorization: Pursuant to 37 C.F.R. 42.8(b)(3) and 42.10(a), Petitioner designates the following: Lead Counsel is Eliot D. Williams (Reg. No. 50,822) of Baker Botts L.L.P.; Back-up Counsel is G. Hopkins Guy (Reg. No. 35,886) of Baker Botts L.L.P. Service Information: Service information is as follows: Baker Botts L.L.P., 1001 Page Mill Rd., Palo Alto, CA Tel ; Fax

11 7699. Petitioner consents to service by electronic mail at and A Power of Attorney is filed concurrently herewith under 37 C.F.R (b). Certification of Grounds for Standing: Petitioner certifies under 37 C.F.R (a) that the 710 Patent is available for inter partes review and that Petitioner is not barred or estopped from requesting inter partes review on the grounds set forth herein. Fees: The Office is authorized to charge the fee set forth in 37 C.F.R (a) to Deposit Account No as well as any additional fees that might be due in connection with this Petition. II. OVERVIEW OF CHALLENGE AND RELIEF REQUESTED Petitioner challenges claims 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 of U.S. Patent No. 7,116,710 by Hui Jin, et. al. ( the 710 Patent ), titled Serial Concatenation of Interleaved Convolutional Codes Forming Turbo-Like Codes. See Ex A. Publications Relied Upon Petitioner relies upon the following patents and publications: Exhibit Irregular Turbocodes by B.J. Frey and D.J.C. MacKay ( Frey ), published at least by May 11, 2000 and available as prior art under 35 U.S.C. 102(a); see also Ex at

12 Exhibit Coding Theorems for "Turbo-like" Codes by D. Divsalar, H. Jin, and R. J. McEliece ( Divsalar ), published at least by April 30, 1999 and available as prior art under 35 U.S.C. 102(b); see also Ex Exhibit Stream-Oriented Turbo Codes by E.K. Hall and S.G. Wilson ( Hall ), published at least by June 23, 1998 and available as prior art under 35 U.S.C. 102(a). Exhibit Low Density Parity Check Codes with Semi-random Parity Check Matrix by L. Ping, W. K. Leung, N. Phamdo ( Ping ), published at least by April 22, 1999 and available as prior art under 35 U.S.C. 102(b). Exhibit U.S. Patent No. 6,081,909 entitled Irregularly Graphed Encoding Technique by M. Luby, et. al. ( the Luby 909 Patent ), filed on November 6, 1997 and issued on June 27, The Luby 909 Patent is available as prior art under 35 U.S.C. 102(e). B. Grounds For Challenge Petitioner requests cancellation of the claims on the following grounds: 1. Claim 1 is anticipated by Frey. 2. Claims 1, 3, 4, 5, 6, 15, 16, 21, and 22 are obvious over Frey in view of Divsalar. 3. Claims 15, 16, 21, and 22 are obvious over Frey in view of Divsalar and Hall. 3

13 4. Claim 20 is obvious over Frey in view of Divsalar and in further view of Ping. 5. Claim 20 is obvious over Frey in view of Divsalar and Ping and in further view of Hall. III. OVERVIEW OF THE 710 PATENT A. Summary of the Claimed Subject Matter The 710 Patent relates to irregular repeat accumulate ( RA ) coding for transmission of communication signals. Claims 1, 15 and 16 describe taking data or information bits (known in claim 1 as data elements ) and repeating them irregularly to determine parity bits (which the claims vaguely refer to as a second encoding or a further encode ). Claims 5 and 22 describes that these parity bits are generated using accumulation. Claim 6 describes that the irregular encoding is performed according to a determined profile. Claim 20 describes that the information bits are repeated using a low-density generator matrix coder. B. Prosecution History of the 710 Patent The application resulting in the 710 Patent was filed on May 18, 2001, and claims priority to U.S. Provisional Application Serial No. 60/205,095, filed on May 18, Ex The patent examiner initially rejected various claims over U.S. Patent 4

14 6,014,411 to Wang ( Wang ). Ex at 58, 61, 63. Applicants thereafter amended the priority of the pending application to further claim priority from U.S. Patent Application Ser. No. 09/922,852, filed August 18, 2000, and corrected informalities. Ex at 71. Applicants further argued that Wang did not disclose or teach one to repeat bits irregularly and scramble the repeated bits. Id. at 79. Applicants further argued that [t]here is no indication in Wang that the rate r is irregular and noted that various claims recite[] that in a first encoding, bits are repeated irregularly or a different number of times. Id. at 79. On March 4, 2005, the patent examiner issued a non-final office action allowing various claims and objecting to others. Ex at 87. The examiner also rejected various claims over United States Patent 6,396,423 to Laumen ( Laumen ). Id. at 87, 89. In response, Applicants amended pending claims 15 and 24 to recite a second coder operative to further encode bits output from the first coder at a rate close to within 50% of one. Ex at 99. Furthermore, Applicants argued that because Laumen s coders 12 are disclosed with transmission rates of 1/2, 1/3, 1/4, that they are not close to one. Id. at 104. The patent examiner issued a final rejection on July 21, 2005 maintaining the rejections. Ex at 107. Specifically, the patent examiner noted that 1/2 was within 50% of one. Id. at 110. In response, Applicants amended claims 15 and 24 to require that a second coder operative to further encode bits 5

15 output from the first coder at a rate within [[50%]] 10% of one. Ex at 119. The examiner thereafter issued a notice of allowance. Ex at 129. On February 24, 2006, Applicants submitted a Request for Continued Examination so that the patent examiner could consider the article "Efficient encoding of lowdensity parity check codes," in IEEE Trans. Inform. Theory, 47: (February 2001) by T. Richardson and R. Urbanke, which purportedly post-dated the Applicant s provisional filing date, and disclosed the use of irregular LDPC codes. Ex at 141. On March 24, 2006, the patent examiner issued a notice of allowance. Ex at 142. Applicants later requested a change in priority to application 09/922,852 as a continuation-in-part through a certificate of correction. Ex at 165. IV. SUMMARY OF PRIOR ART A. State of the Art The 710 Patent relates to error detection and correction codes used in encoding information before transmission as a communication signal over a communication channel. In particular, the 710 patent is directed to irregular repeat-accumulate ( Irregular RA ) coding techniques. Ex at 34. During transmission, information contained in communication signals may be affected by channel noise, leading to potential errors in the information when received at the receiver. Ex at 15. Accordingly, various coding 6

16 techniques were used in the art to generate parity bits, which are then combined with the information bits into a codeword that is sent in the communication signal. Id. The recipient of the codeword uses the parity bits to check the integrity of the information bits and perform subsequent remedial action, such as error correction, in order to recover the transmitted information. Id. at 15-20, 130. One prior art technique for generating parity information based on bipartite graphs was known as low density parity check ( LDPC ) codes, which were first introduced by Robert G. Gallager in 1963 and later refined by David J.C. MacKay. Ex at 25. Another technique, known as repeat/accumulate ( RA ) encoding, was published by two of the three inventors of the 710 Patent in September 1998, more than one year before the earliest priority claim of the 710 Patent. Ex at 31; Ex Turbo codes were also known in the prior art. Ex at 23. One paper, which Patent Owner has attached to and quoted from in its parallel district court complaint, published by authors that the Patent Owner has admitted are experts in the field, classified LDPC codes, RA codes, and turbo codes as members of the field of random-like codes. Ex at 24 & at p. 88 (hereinafter, the Roumy paper ). It was also known that making a coding technique irregular, wherein different message bits contribute to different numbers of parity bits, would improve performance of coding techniques. Ex at 27-28, 32. For 7

17 instance, by 1998 Michael Luby and others investigated whether codes based on regular graphs would give rise to codes that are close to optimal and concluded that They do not. Ex at 9. Instead, Luby et al. showed that making codes irregular yields much better performance than regular codes. Ex at 27; Ex at 249; Ex at 9. By mid-1999, a paper by Richardson, Shokrollahi & Urbanke was circulating within the academic community touting new results indicating the remarkable performance that can be achieved by properly chosen irregular codes Ex at 28; Ex at In August 1999, Dr. David MacKay presented a talk at the IMA academic conference on sparse graph codes, in the speaking slot directly before one of the named inventors of the 710 patent (McEliece). Ex at p. 3. In his slides presented at that talk, Dr. MacKay showed on one page a graph of a Gallager code, a Repeataccumulate code, a turbo code, and a recursive convolutional code. Id. at 42. On 1 A 2001 version of this paper dated after the applicants provisional filing date was disclosed during prosecution. Applicants did not disclose that earlier 1999 versions of this paper were published and well known within the relevant academic community more than 1 year before the applicant s priority date. Ex at 28. By April 5, 1999, the author (Richardson) circulated the paper via Internet link to colleagues within the academic community by . Id. 8

18 the very next slide, the suggestion make irregular appears as the second bullet under the heading Where to go from Regular Gallagher Codes. Id. at 43. The immediate juxtaposition of these sparse graph codes, which includes a repeataccumulate code, with a suggestion to make irregular, demonstrates that a person of ordinary skill in the art would recognize that irregularity would improve a repeat-accumulate code. Ex at 125. The McEliece presentation, entitled, Repeat Accumulate Codes [A Class of Turbo-Like Codes that we can analyse], at the same IMA conference discussed only repeat-accumulate and did not mention making them irregular. See Ex. 1045; Ex at 39. Thus, the prior art provided clear motivation to modify encoding schemes using irregularity to improve performance. Ex at 32. Indeed, the Roumy paper, which Patent Owner has featured prominently in its district court complaint, makes clear that this is exactly what happened -- explaining that this prior work actually motivated the inventors of the 710 Patent to modify the prior art regular RA codes by introducing irregularity: The introduction of irregular LDPCs motivated other schemes such as irregular RA... and irregular turbo codes. (emphasis supplied) Ex at page 88 (Exhibit F therein). B. Summary of References Relied Upon Frey (Exhibit 1012) The Frey reference built upon the work of Luby by applying irregular 9

19 coding techniques to prior art turbocodes. Ex at 27, 39. The Frey reference describes this as tweaking the regular turbocode originally introduced by Berrou et al. Ex at 7. This reference graphically depicts a generalized two-step irregular code involving (1) a permutation and (2) a convolution. Id. at 3-4 (Figs. 1 & 2). The Luby 909 Patent (Ex. 1016) The Luby 909 Patent (Ex. 1016) is a patent corresponding to work by Luby, Mitzenmacher, Shokrollahi, Spielman, and Stemann that was academically published in a paper entitled Practical loss-resilient codes. This paper discusses irregularizing low-density parity check codes. See Ex at 4 n.2 ( A good candidate for the code C is the low-density parity check ). In the Luby paper, the authors reported on techniques they had developed to analyze regular codes, and concluded that they cannot yield codes that are close to optimal. Hence irregular graphs are a necessary component of our design. Id. at 2 (emphasis added). In view of this, the Luby 909 Patent describes irregular codes (i.e. codes based on irregular graphs) and touts their benefits: [I]rregular graphing of the edges is particularly beneficial for large numbers of data items. For example, encoding based upon irregular graphing of the edges can be used very effectively in high bandwidth video transmissions. 10

20 Ex at 11: Divsalar (Exhibit 1011) The Divsalar reference described a rate-1 accumulate convolutional encoder that was shown to produce useful codes that could be easily decoded. This type of code is known in the field as a repeat-accumulate or RA code. Ex at 34. Hall (Exhibit 1013) The Hall reference describes a streaming-oriented turbocode, showing how to use prior art coding and decoding principles which were traditionally block coding approaches in a streaming paradigm without explicit block boundaries. Ex at 96; Ex at 71. Ping (Exhibit 1014) The Ping reference discloses using a low-density generator matrix (LDGM) coder to perform low-density parity check coding. Ex at 105. V. CLAIM CONSTRUCTION Claims 1, 3, 4, 5, 6, 15, 16, 20, 21, and 22 of the 710 Patent are unpatentable when given their broadest reasonable construction in light of the specification. See 37 C.F.R (b). 2 Consistent with the broadest 2 Petitioner reserves the right to seek different claim constructions than those 11

21 reasonable standard, claim terms are generally given their ordinary and customary meaning, as understood by a person of ordinary skill in the art in question at the time of the invention. Phillips v. AWH Corp., 415 F.3d 1303, (Fed. Cir. 2005). The claim terms of the 710 Patent should be given their plain and ordinary meaning under the broadest reasonable construction with the considerations discussed infra. A. Level of Ordinary Skill in the Art A person of ordinary skill in the art would have a very high skill level, and would have a Ph.D. in electrical or computer engineering with emphasis in signal processing, communications, or coding, or a master s degree in the above area with at least three years of work experience in this field at the time of the alleged invention. Ex at 43. The patent owner admitted to this level of ordinary skill in the art in the Lawsuit. Ex at 98. B. Repeating Terms Claim 1 of the 710 patent requires, in part, repeating the data elements. Claim 15 requires, in part, that the claimed coder repeat said stream of bits. In the District Court Action, the court held that the plain meaning of repeat determined by the Board or sought herein in a different forum (e.g., District Court) that applies different standards of proof and analysis. 12

22 requires the creation of new bits corresponding to or reflecting the value of the original bits. Ex 1024 (Corrected Claim Construction Order, D.I. 105) at 10. Furthermore, the plaintiff in the District Court Action proposed that the ordinary meaning of the repeat terms was re-use in forming a code. Ex at 2. C. Irregularly Claim 15 requires that the coder repeat said stream of bits irregularly. The parties in the District Court Action agreed that the term irregularly meant a different number of times. Ex at 1. The broadest reasonable interpretation of these irregularly terms would include this definition. Ex at 46. D. Interleaving / Interleaver / Scramble Claim 1 requires that the claimed method interleaving the repeated data elements in the first encoded data block. Claim 15 requires that the claimed coder said first coder operative to repeat said stream of bits irregularly and scramble the repeated bits. Claim 19 depends from claim 15 and further requires that wherein the first coder comprises a repeater having a variable rate and an interleaver. The parties in the District Court Action agreed that the terms interleaving and scramble meant changing the order of data element and the term interleaver meant module that changes the order of data elements. Ex at 1. The broadest reasonable interpretation of these terms would at least include 13

23 the agreed definitions. Ex at E. Rate close to one Claim 1 requires an encoder rate that is close to one. That the rate is close to one means that the number of parity bits and information bits for a given codeword are approximately equal. Ex at 49. The specification states: [t]he inner coder 210 can have a rate that is close to 1, e.g., within 50%, more preferably 10% and perhaps even more preferably within 1% of 1. Ex at 2: The broadest reasonable interpretation of close to one, therefore includes a coder with a rate of 0.50 or more. Ex at 49. F. Stream Claim 15 recites that the first coder receives a stream of bits. The broadest reasonable reading of the term to a person of ordinary skill in the art includes a sequence of bits. Ex at A narrower definition occasionally used in the art is discussed in the Hall reference, where a stream is distinguished from blocks of data, the boundaries of a data block are not explicit and the data are essentially indefinitely long strings. Ex at 71. The specification is consistent with the broader (i.e. block-based) definition. Ex at 2:35-38 (discussing the formatting of blocks of data in the context of the stream of data ); Ex at The broadest reasonable construction of stream is therefore a sequence of bits. 14

24 VI. A REASONABLE LIKELIHOOD EXISTS THAT THE CHALLENGED CLAIMS ARE UNPATENTABLE Pursuant to 37 C.F.R (b)(4)-(5), all of the challenged claims are unpatentable for the reasons set forth in detail below. A. Ground 1: The 710 Patent Claim 1 is Anticipated Under 35 U.S.C. 102 by Frey As demonstrated below, each and every element of claim 1 is disclosed by Frey thus anticipating the claim. 1. The cited reference combination discloses all limitations The following chart shows how all elements of claim 1 are disclosed by Frey. 710 Claim 1 Frey 1[p]. A method of encoding a signal, comprising: See, e.g., We construct irregular turbocodes bringing the irregular turbocode within 0.3 db of capacity Ex at 1 (Abstract). The subject of Frey is the encoding and decoding of error-correcting codes and it would be clear to a person having ordinary skill in the art that all encoding methods necessarily perform this step. Ex at Claim 1 Frey 1[a] obtaining a block of data in the signal to be encoded; See, e.g., Ex at 4. (the bits f 2, f 3,...f D of Figure 2) 15

25 710 Claim 1 Frey See, e.g., Ex at 3. (the circles at the bottom of Figure 1) The input data bit are the bits f 2, f 3,.. f D, as shown in in Frey s Figure 2. Ex at 4. When the system of Frey receives input data bit f 2, f 3,.. f D, the system obtains a block of data in the signal to be encoded. Ex at 55. The input bits are also shown as the bottom circles in Figure 1 of Frey. Ex at 3; Ex at 55. A person of ordinary skill in the art would interpret the circles at the bottom of this figure as meeting the broadest reasonable interpretation of obtaining a block of data in the signal to be encoded. Id. at 56. Furthermore, it is not possible to perform the encoding and decoding methods of Frey without first obtaining the block of data in the signal to be encoded. Id. at 16

26 57. Thus, this limitation is taught in Frey. Id. 710 Claim 1 Frey 1[b] partitioning said data block into a plurality of subblocks, each subblock including a plurality of data elements; See, e.g., Ex at 4. (the bits f 2, f 3,...f D of Figure 2) Section 2 in Frey discloses that [e]ach codeword bit with degree is repeated times before being fed into the permuter. Ex at 2-3. This operation is also described graphically by the bottom of Figure 2 in Frey as shown above. Ex at 58. The figure shows that codeword bits are first partitioned into multiple sub-blocks (labeled by ) before repeating. Ex at 5; Ex at 59. Frey s partitioning of the codeword bits into multiple sub-blocks meets the broadest reasonable interpretation of partitioning said data block into a plurality of sub-blocks, each sub-block including a plurality of elements. Ex at Claim 1 Frey 1[d] said first encoding including repeating the data elements in different See, e.g., Ex at 2-3 Each codeword bit with degree d is repeated d times before being fed into the permuter. See, e.g., Ex at 4: 17

27 710 Claim 1 Frey sub-blocks a different number of times; Section 2 of Frey discloses that [e]ach codeword bit with degree is repeated times before being fed into the permuter. Ex at 2-3. The numbers denote the fraction of bits that are repeated times and the example described in Section 4 of Frey suggests the choice. Ex at 5-6; Ex at 60. Frey s repetition of input data blocks a different number of times, which is shown graphically in Figure 2 as Rep 2, Rep 3,... Rep D blocks therefore meets the broadest reasonable interpretation of this element. Id. 710 Claim 1 Frey 1[e] interleaving the repeated data elements in the first encoded data block; See, e.g., Ex at 2-3, Each codeword bit with degree d is repeated d times before being fed into the permuter. See, e.g., Ex at 4, For d=1,, D, [a] fraction f d of the codeword bits are repeated d times, permuted and connected to a convolutional code. ; (repeat blocks pass repeated data blocks to the permuter block, which interleaves them before passing them to the convention code block): 18

28 710 Claim 1 Frey Frey s Permuter in Figure 2 performs the broadest reasonable interpretation of this element. Ex at 61. The repeat blocks ( Rep 2, Rep 3,... Rep D) are attached to, and pass repeated data block to the block labeled Permuter, which, in turn, interleaves the bits before passing them to the Convolutional code block. Ex at 4; Ex at 62. This is within the broadest reasonable interpretation of interleaving the repeated data elements in the first encoded data block. Ex at Claim 1 Frey 1[f] and second encoding said first encoded data block using an encoder that has a rate close to one See, e.g., Ex at 4, For d=1,, D, [a] fraction f d of the codeword bits are repeated d times, permuted and connected to a convolutional code. See, e.g., Ex at 2, In particular, if the bits in the convolutional code are partitioned into systematic bits and parity bits, then by connecting each parity bit to a degree 1 codeword bit, we can encode in linear time. See, e.g., Ex at 5, [The profile is] giving the required convolutional code rate of R - 2/3. See, e.g., Ex at 5, 19

29 710 Claim 1 Frey. (when applied to Equation 9, R becomes approximately Figure 2 of Frey describes a second encoder (i.e. the convolutional code ) having a rate close to one. In this context, the rate is the ratio of the number of input bits to output/code bits. Ex at 18. The fifth paragraph of Section 2 in Frey, discusses using the output of the permuter as inputs to a convolutional encoder. Ex at 2; Ex at 63. Thus, a person having ordinary skill in the art would recognize that the last step in this method of Frey consists of feeding the repeated bits into a convolutional encoder whose output (or parity) bits are attached only to degree-1 input bits. Ex at 63. In the second paragraph of Section 4, Frey states that the convolutional encoder (i.e., second encoding) has rate. Ex at 5. While this is already close to 1, the fourth paragraph of Section 4 also suggests a second embodiment, where the puncturing rate is increased with the average repetition rate to keep the overall code (including both encoding steps) rate at 1/2. Ex at 63. Substituting the numbers into Equation 9 of Frey, one finds the rate of the second encoding (convolutional encoder) increases to. Ex at 5-6; Ex at 63. The rate is within the broadest reasonable interpretation of the claimed second encoding said first 20

30 encoded data block using an encoder that has a rate close to one. Ex at 63. B. Ground 2: The 710 Patent Claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are Obvious Under 35 U.S.C. 103 over Frey in view of Divsalar As demonstrated below, each and every element of claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 is disclosed by Frey in view of Divsalar. Petitioner respectfully submits that claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are obvious. 1. The cited reference combination discloses all limitations The following shows how all elements of claims 1, 3, 4, 5, 6, 15, 16, 21 and 22 are disclosed by the proposed combination. Further explanation with respect to claim 1 and Frey is discussed above in section VI.A. 710 Claim 1 Frey in view of Divsalar Claim elements 1[p]-1[e]. 1[f] and second encoding said first encoded data block using an encoder that has a rate close to one See discussion of Frey s applicability to element 1[p] -1[e] in ground 1 supra. Frey: See, e.g., Ex at 4, For d=1,, D, [a] fraction f d of the codeword bits are repeated d times, permuted and connected to a convolutional code. See, e.g., Ex at 2, In particular, if the bits in the convolutional code are partitioned into systematic bits and parity bits, then by connecting each parity bit to a degree 1 codeword bit, we can encode in linear time. See, e.g., Ex at 5, [The profile is] giving the required convolutional code rate of R - 2/3. See, e.g., Ex at 5,. (when applied to Equation 9, R becomes 21

31 710 Claim 1 Frey in view of Divsalar approximately Divsalar: See, e.g., Ex at 5, An information block of length N is repeated q times, scrambled by an interleaver of size qn, and then encoded by a rate 1 accumulator. As discussed above in section VI.A, Frey alone meets all the limitations of Claim 1 under the broadest reasonable interpretation of the term a rate close to one which should include Frey s rate encoder. Alternatively, if the Board disagrees that Frey s rate encoder is not within the broadest reasonable interpretation of the a rate close to one then this limitation is disclosed by Divsalar. In Divsalar, there is a second encoding with a rate-one second encoding. Ex at 64. In particular, Divsalar describes repeat and accumulate codes and discloses their encoding process with the statement, [a]n information block of length is repeated times, scrambled by an interleaver of size, and then encoded by a rate 1 accumulator. Ex 1011 at 5. The described encoder has two stages of encoding with a second encoding that is rate one. Divsalar s RA encoder is shown graphically in Figure 3: 22

32 Ex 1011 at 5 (Figure 3) (annotated). Divsalar s Figure 3 and the associated text explicitly state that the second encoder is rate 1. Because Divsalar s rate-one encoding accumulator is within the broadest reasonable interpretation of an encoding with a rate close to one, the combination of Frey with the rate-one seconding encoding of Divsalar discloses all elements of claim 1. Ex at Claim 3 Frey in view of Divsalar 3. The method of claim 1, wherein said first encoding is carried out by a first coder with a variable rate less than one, and said second encoding is carried out by a second coder with a rate substantially close to one. See, e.g., Ex at 4, For d=1,, D, [a] fraction f d of the codeword bits are repeated d times, permuted and connected to a convolutional code. See, e.g., Ex at 2, In particular, if the bits in the convolutional code are partitioned into systematic bits and parity bits, then by connecting each parity bit to a degree 1 codeword bit, we can encode in linear time. See, e.g., Ex at 5, [The profile is] giving the required convolutional code rate of R - 2/3. See, e.g., Ex at 5 suggests the choice (when applied to Equation 9, R becomes approximately ). Ex at 63. See, e.g., Ex at 5, An information block of length N is repeated q times, scrambled by an interleaver of size qn, and then encoded by a rate 1 accumulator. ; Figure 3:. 23

33 710 Claim 3 Frey in view of Divsalar 710 Claim 4 Frey in view of Divsalar 4. The method of claim 3, wherein the second coder comprises an accumulator. See, e.g., Ex at 4 (convolutional code) See, e.g., Ex at 3, (open circles performing convolutional code on data output from the permuter) See, e.g., Ex at 5, An information block of length N is repeated q times, scrambled by an interleaver of size qn, and then encoded by a rate 1 accumulator. ; Figure 3: 24

34 710 Claim 3 Frey in view of Divsalar Section 2 of Frey discloses that [e]ach codeword bit with degree is repeated times before being fed into the permuter. Ex at 2-3. The numbers denote the fraction of bits that are repeated times and the example described in Section 4 of Frey suggests the choice. Id.; Ex at 69. Because the number of output bits from the repeaters is greater than the number of input bits in all instances, the rate of the first coder, which includes the repeaters, is less than one by definition. Ex at 69. This limitation is further disclosed by Frey s figure 1, which repeats input bits a different number of times before passing those repeated input bits to a permuter, as shown in the annotated figure below: 25

35 Ex at 3. The rate of the coder defined by the repetition of the input bits a variable number of times is less than one because some input bits are repeated at least two times. Ex at 70. Frey therefore discloses wherein said first encoding is carried out by a first coder with a variable rate less than one. As discussed above in section VI.A within the context of claim 1 (limitation 1[f]), Frey discloses a second encoding having rate. Ex at 5-6; Ex at 63. The rate is within the broadest reasonable interpretation of the claimed second encoding is carried out by a second coder with a rate substantially close to one. Ex at 63. If the Board finds that Frey s rate is not within the broadest reasonable interpretation of the claimed rate substantially close to one, then this limitation is met by Divsalar s rate-1 accumulator. See, e.g., Ex at 63-65; discussion supra in section VI.B.1 (within the context of Claim 1 and limitation 1[f]). Claim 4 depends from claim 3 and adds the limitation wherein the second encoder comprises an accumulator. Frey s disclosure of a convolutional code, (for example, in Figure 2) is within the broadest reasonable interpretation of the 26

36 claimed accumulator. Ex at 3; Ex at 74. Because an accumulator is a very simple convolutional code, a person of ordinary skill in the art would consider Frey's convolutional code to be within the broadest reasonable interpretation of claims 4 s accumulator. Ex at 30, 74. The claimed accumulator is also disclosed in Figure 1 of Frey. Ex at 3; Ex at 75. The open circles above the permuter in Figure 1 perform a convolutional code on data output from the permuter. Ex at 76. The caption to Figure 1 states that the code copies the systematic bits, permutes both sets of these bits and then feeds them into a convolutional code. Ex at 2. The open circles above the permuter in Figure 1 depict the performance of a convolutional code. Ex at 76. The simplest recursive convolutional code is an accumulator, such as the one shown in Divsalar. Ex at 76. In other words, because an accumulator is a very simple convolutional code, a person of ordinary skill in the art would consider Frey s convolutional code to be within the broadest reasonable interpretation of an accumulator. ; Ex at 74, 76. The claimed accumulator is also disclosed in Divsalar by the rate-1 accumulator. Ex at 5; Ex at Claim 5 Frey in view of Divsalar 5. The method of claim 4, wherein the data elements comprises See, e.g., Ex at 2-3 Each codeword bit with degree d is repeated d times before being fed into the 27

37 bits. 710 Claim 5 Frey in view of Divsalar permuter. 710 Claim 6 Frey in view of Divsalar 6. The method of claim 5, wherein the first coder comprises a repeater operable to repeat different subblocks a different number of times in response to a selected degree profile. See, e.g., Ex at 2-3 Each codeword bit with degree d is repeated d times before being fed into the permuter. See, e.g., Ex at 5, Finding a good profile... Claim 5 depends from claim 4 and adds the limitation that wherein the data elements comprises bits which are taught by Frey and Divsalar. Ex at 78. Claim 6 depends from claim 5 and adds the limitation that wherein the first coder comprises a repeater operable to repeat different sub-blocks a different number of times in response to a selected degree profile. Section 2 in Frey discloses that [e]ach codeword bit with degree is repeated times before being fed into the permuter. Ex at 2-3. This operation is also described graphically by the bottom of Figure 2 in Frey (shown above). The figure shows that codeword bits are first partitioned into multiple sub-blocks (labeled by ) before repeating. Ex at 2-3; Ex at 81. Section 2 of 28

38 Frey discloses that [e]ach codeword bit with degree is repeated times before being fed into the permuter. Ex at 2-3. The numbers denote the fraction of bits that are repeated times and the example described in Section 4 of Frey suggests the choice Ex at 5-6; Ex at 81. Frey therefore discloses that the data elements comprises bits. Ex at 81. The encoder of Divsalar is also for encoding data in the form of bits. Ex at 5. Frey s repetition of a selected fraction of input bits a different number of times, which is shown graphically in Figure 2 as Rep 2, Rep 3,... Rep D blocks, meets the broadest reasonable interpretation of wherein the first coder comprises a repeater operable to repeat different sub-blocks a different number of times in response to a selected degree profile. Ex at Claim 15 Frey in View of Divsalar 15[p]. A coder comprising: See, e.g., Ex at 2 This can be done by puncturing the convolutional code or by designing a new, higher rate convolutional code. See, e.g., Ex at 1 we discuss coding systems which are built from fixed convolutional codes To the extent that the preamble of this claim is limiting, Frey s turbocode is an encoder and therefore meets this limitation. Ex at 2-3; Ex at 84. Divsalar s RA code also meets this limitation. Ex at 5; Ex at

39 710 Claim 15 Frey in View of Divsalar 15[a] a first coder having an input configured to receive a stream of bits, See, e.g., Ex at 4 ( input configured to receive a stream of bits step as part of encoding or decoding. The input data bit are the bits f2, f3,.. fd, as show in in Figure 2); Figure 2. See, e.g., Ex at 3 (input bits as circles at the bottom of Figure 1) See, e.g., Ex at 5, An information block of length N is repeated q times, scrambled by an interleaver of size qn, and then encoded by a rate 1 accumulator. ; Figure 3: 30

40 The specification of the 710 patent provides no instruction on what constitutes a stream of bits. Instead, the specification uses the term stream twice without offering any special meaning for the term stream. At 2:3-5, the specification states [t]he inner coder may include one or more accumulators that perform recursive modulo two addition operations on the input bit stream. At 2:35-38, the specification states [t]he coder may be used to format blocks of data for transmission, introducing redundancy into the stream of data to protect the data from loss due to transmission errors. The prior art references show that stream of data generally refers to sequence of bits. For example, the Luby 909 Patent uses the term to refer to data that is transmitted over the Internet. Ex at 1: Under this interpretation of stream, Frey discloses a first coder having an input configured to receive a stream of bits, said first coder operative to repeat said stream of bits irregularly and scramble the repeated bits. Ex at 85. The subject of Frey is the encoding and decoding of error-correcting codes and it would be clear to a person having ordinary skill in the art that encoders and decoders, such as Frey s, have input configured to receive a stream of bits step as part of encoding or decoding. Id. The input data bit are the bits f 2, f 3,.. f D, as shown in in Figure 2 of Frey above. Ex at 85. Because the system of Frey receives input data bit f 2, f 3,.. f D, the system of Frey has an input configured to receive a stream of bits, 31