Specification V1.1. NLC320F240BTM4 (Status: June 2010) Approval of Specification. Approved by. Admatec Customer

Transcription

1 LCD Module NLC320F240BTM4 (Status: June 2010) RoHS Specification V1.1 Approval of Specification Admatec Customer Approved by Date This product complies to EU directive 2002/95/EC (RoHS) of January 27th,2003. admatec GmbH Elektronische Systeme und Komponenten Wendenstrasse 29, D Hamburg fon +49 (0) fax +49 (0) internet

2 REVISION RECORD Rev. Date Pages Description PM TM First Issue JR CS DC/DC Converter Content Modified JR CS New Drawing added JR CS Revision: 1.1 Author: MB/SK Date: Page: 2/19

3 1. MECHANICAL DATA NO. ITEM CONTENTS UNIT 1 Product No. NLC320F240BTM4 2 Module Size 168.0(W)*111.0(H)*7.4(T) mm 3 Dot Size 0.10(W)*0.34(H) mm 4 Dot Pitch 0.12(W)*0.36(H) mm 5 Number of Dots 320 x RGB (W)*240(H) -- 6 Duty 1/ LCD Type FSTN, Color STN Module -- 8 Rear Polarizer Color Transmissive Type -- 9 Viewing Direction 6 O clock Backlight CCFL Controller Excluded DC/DC Converter Included Touch Panel Excluded Weight 185 (Approx.) g Note: NLC320F240 B T M 4 Back Light Option B: CCFL Backlight 4: Module-Family Number Reflective/Transmissive Mode/View Angle T: Transmissive M: Color STN Module, 6 o'clock Revision: 1.1 Author: MB/SK Date: Page: 3/19

4 2. ABSOLUTE MAXIMUM RATINGS 2.1 ELECTRICAL ABSOLUTE MAXIMUM RATINGS VSS=0V ITEM SYMBOL MIN. MAX. UNIT COMMENT Power Supply for Logic V DD -V SS V --- VLCD Voltage V LCD -V SS V --- Input Voltage V I -0.3 V DD V --- Static Electricity Note(1) NOTE (1): LCM should be grounded during handling LCM. 2.2 ENVIRONMENTAL MAXIMUM RATINGS OPERATING STORAGE ITEM COMMENT MIN. MAX. MIN. MAX. AMBIENT 0 C 50 C -20 C 70 C --- TEMPERATURE HUMIDITY Note(2,4) Note(3,4) NO CONDENSATION NOTE (2): Ta 50 C: 80%RH MAX. NOTE (3): Please refer to item of reliability test. NOTE (4): Background color will change slightly depending on ambient temperature. That phenomenon is reversible. Revision: 1.1 Author: MB/SK Date: Page: 4/19

5 3. ELECTRICAL CHARACTERISTICS 3.1 ELECTRICAL CHARACTERISTICS OF LCM ITEM SYMBOL CONDITION MIN. TYP. MAX. UNIT Power supply for Logic Contrast Adjust Voltage V DD -V SS -- VLCD-VSS Duty= 1/240 V DD = 5.0V Duty= 1/240 V DD= 3.3V 0 C 50 C 0 C 50 C V V Input Voltage Power Supply Current Recommended Frame Frequency for Optimum Contrast V IH H level 0.8V DD --- V DD V V IL L level V DD I DD I LCD V DD -V SS =5.0V V LCD-V SS=1.8V Ta=25 C PATTERN : I DD V DD-V SS=3.3V V LCD -V SS =1.8V I LCD Ta=25 C PATTERN : ma F LM Hz Revision: 1.1 Author: MB/SK Date: Page: 5/19

6 3.2 ELECTRICAL CHARACTERISTICS OF BACKLIGHT Used Lamp Rating T a = 25 C ITEM SYMBOL MIN. TYP. MAX. UNIT CONDITION Lamp Voltage V L Vrms --- Lamp current I L marms --- Lamp power consumption P L W (*1) Starting voltage V S Vrms Ta=25 C Vrms Ta=0 C Lamp life time L L hrs At IL = 5 marms Ta=25 C (*2) NOTE (*1): Power consumption excluded inverter loss. (*2): Lamp life time is defined as follows: The final brightness is at 50% of original brightness. Recommended Inverter: ADL10ALF (5V) ADL10LLF (12V) Revision: 1.1 Author: MB/SK Date: Page: 6/19

7 4.1 OPTICAL CHARACTERISTICS at V op ITEM MODE Cr(Contrast Ratio) θ(viewing Angle) φ(viewing Angle) 0 C 25 C 50 C 25 C 25 C MIN TYP MIN TYP MIN TYP MIN TYP MIN TYP T M F:55 R:30 NOTE Note 3,6 Note 3,5 NOTE: T: Transmissive M: Color, 06 o'clock L:45 R:45 at φ=0, θ =0 ITEM SYMBOL CONDITION MIN. TYP. MAX. UNIT COMMENT Response 0 C Time Tr 25 C ms Note 2,3 (rise) 50 C Response 0 C Time Tf 25 C ms Note 2,3 (Fall) 50 C Surface Luminance of LCM L L I L= 5 marms Ta=25 C Pattern: Dots ALL ON(white) I L= 5 marms Ta=25 C Pattern: Dots ALL OFF(black) cd/m² -- Revision: 1.1 Author: MB/SK Date: Page: 7/19

8 4.2 Color of CIE Coordinate Color of CIE Coordinate Ta=25 C ITEM SYMBOL CONDITION VALUE NOTE Red Green Blue x 0.50 Ø=0, θ=0 y 0.32 x 0.29 Ø=0, θ=0 y 0.52 x 0.16 Ø=0, θ=0 y 0.14 Note 3 x 0.28 White Ø=0, θ=0 y 0.31 Note Measuring at position 3 on Fig.1 Tolerance: ±0.05 CIE chromaticity diagram Revision: 1.1 Author: MB/SK Date: Page: 8/19

9 Revision: 1.1 Author: MB/SK Date: Page: 9/19

10 Revision: 1.1 Author: MB/SK Date: Page: 10/19

11 5. BLOCK DIAGRAM LCD 1 FLM ROW Driver x x R.G.B. x 240 Dots 2 LP 4 DISPOFF 3 CP Column Driver x 4 8~15 D0~D7 LP 8 M Circuit 7 VLCD DC/DC Circuit (Included Temp. Compensation) Bias Circuit To LSI 6,16 VSS 5 VDD To LSI Logic CCFL 1 HOT CCFL Backlight 4 GND Revision: 1.1 Author: MB/SK Date: Page: 11/19

12 6. INTERNAL PIN CONNECTION FFC: 16-pin, pitch 1.0mm PIN No. SYMBOL LEVEL FUNCTION 1 F LM H/L First line Marker 2 L P H L Data Latch Signal 3 C P H L 4 DISPOFF H/L Clock Signal for Shifting Data Display Control Signal, H : Display on, L : Display off 5 V DD --- Power Supply for Logic 6 V SS --- Power Supply (0V, GND) 7 V LCD --- Power Supply for LCD Drive 8 D0 H/L Display Data 9 D1 H/L Display Data 10 D2 H/L Display Data 11 D3 H/L Display Data 12 D4 H/L Display Data 13 D5 H/L Display Data 14 D6 H/L Display Data 15 D7 H/L Display Data 16 V SS --- Power Supply (0V, GND) Mating Connector: FPC2x16xx CCFL PIN No. SYMBOL LEVEL FUNCTION 1 HOT --- Power Supply for CCFL (GND) 2 NC --- Non-connection 3 NC --- Non-connection 4 GND --- Power Supply for CCFL (GND) Revision: 1.1 Author: MB/SK Date: Page: 12/19

13 7. POWER SUPPLY LCM VDD VSS +3.3 V / +5V POWER SUPPLY (LOGIC) VLCD 1.0V~2.6V (TYP. 1.8V) HOT CCFL Backlight 5mA 3 4 CCFL Inverter 1 + Vin=10.8V (Recommended Vaule) GND R1+R2+VR=10~20KOhm C1,C2=10uF Revision: 1.1 Author: MB/SK Date: Page: 13/19

14 8. TIMING CHARACTERISTICS 8.1 INTERFACE TIMING VDD=3.3/5.0 ± 10% Parameter SYMBOL MIN. MAX. UNIT CLOCK PULSE CYCLE TIME t WCK 66/ ns CLOCK PULSE HIGH LEVEL WIDTH t WCKH 23/ ns CLOCK PULSE LOW LEVEL WIDTH t WCKL 23/ ns LATCH PULSE HIGH LEVEL WIDTH t WLPH 30/ ns CP LP RISE TIME t LD 10/5 --- ns CP LP FALL TIME t SL 30/ ns LP CP RISE TIME t LS 30/ ns LP CP FALL TIME t LH 30/ ns CLOCK PULSE RISE/FALL TIME t r, t f ns DATA SETUP TIME t DS 10/5 --- ns DATA HOLD TIME t DH 25/ ns DISP LOW LEVEL WIDTH t WDL µs DISP CANCELLATION TIME t SD ns FLM SETUP TIME t SU ns FLM HOLD TIME t H ns twlph LP tsl tld tls tlh twckl CP tr tf twckh twck tds tdh D7~D0 LAST DATA TOP DATA DISP twdl tsd tsu th FLM Revision: 1.1 Author: MB/SK Date: Page: 14/19

15 8.2 TIMING CHART OF INPUT SIGNALS LP CP D7 G318 R1 B3 G6 R9 B11 G14 R17 B19 G318 R1 D6 B318 G1 R4 B6 G9 R12 B14 G17 R20 B318 G1 D5 R319 B1 G4 R7 B9 G12 R15 B17 G20 R319 B1 D4 G319 R2 B4 G7 R10 B12 G15 R18 B20 G319 R2 D3 B319 G2 R5 B7 G10 R13 B15 G18 R21 B319 G2 D2 R320 B2 G5 R8 B10 G13 R16 B18 G21 R320 B2 D1 G320 R3 B5 G8 R11 B13 G16 R19 B21 G320 R3 D0 B320 G3 R6 B8 G11 R14 B16 G19 R22 B320 G3 FLM CPX(320x3)/8 Pulse LP (Reduction) D7 Y1 Y2 Y240 Y1 ~ D0 FLM (Reduction) Revision: 1.1 Author: MB/SK Date: Page: 15/19

16 8.3 POWER ON/OFF TIMING VDD 0.9VDD VSS 0 ~ 50ms 0 ~ 50ms 0.9VDD VSS VDD Signal VSS VSS Signal 20ms min. 0 min. VLCD VSS VSS VEE 20ms min. 0 min. DISP VSS VSS DISP POWER ON POWER OFF The missing pixels may occur when the LCM is driven beyond above power interface timing sequence. Revision: 1.1 Author: MB/SK Date: Page: 16/19

17 8.4 DISPLAY PATTERN STARTING DOT Y1 (R1) D7 X1 X2 X320 (G1) (B1) (R2) (G2) (B2) (R320)(G320)(B320) D6 D5 D4 D3 D2 D2 D1 D0 Y240 D0~D7 are 8 bits transmitted data, where D0 is LSB and D7 is MSB Revision: 1.1 Author: MB/SK Date: Page: 17/19

18 9. RELIABILITY TEST 9.1 TEST CONDITION No. Item Condition Standard Note 1 High temp. storage 70 C 120 Hrs 2 Low temp. storage -20 C 120 Hrs High temp. & High humi. storage High temp. operating display Low temp. operating display 6 Thermal shock 50 C 90%RH 120 Hrs 50 C 120 Hrs Hrs -20 C, 30min. 70 C, 30min. (1cycle) Appearance without defect 10 cycles 9.1 INSPECTION PROVISION For the inspection provision please refer to the document: Reliability_Test_LCD Revision: 1.1 Author: MB/SK Date: Page: 18/19

19 10. DRAWING R G B R G B max ± ±0.3 (WINDOW OF BEZEL) ±0.2 (A.A.) 320X3(RGB.)x240 DOTS 67.5±7.5 CN ± ±0.5 FIXED HOLES POSITION 1 2XR ±0.5 Contact Side FIXED HOLES POSITION DOT SIZE SCALE : 50: ± ±0.5 CENTER OF A.A. 0.3± ± ± CN1 P1.0x15= ± ±0.2 (A.A.) 90.0±0.3 (WINDOW OF BEZEL) ± ±0.5 2XR1.75 CN1: PIN NO SIGNAL FLM LP CP DISP OFF VDD VSS VLCD D0 PIN NO SIGNAL D1 D2 D3 D4 D5 D6 D7 VSS CN2: M63M83-04 (MITSUM) PIN NO SIGNAL HOT NC NC GND Revision: 1.1 Author: MB/SK Date: Page: 19/19