MSCI 222C Class Readings Schedule. MSCI 222C - Electronics 11/27/18. Copyright 2018 C.P.Rubenstein Class Seating Chart Mondays

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222-01 Class Seating Chart Mondays Electronics Door MSCI 222C Fall 2018 Introduction to Electronics Charles Rubenstein, Ph. D. Professor of Engineering & Information Science Session 11: Mon/Tues 11/19/18 & 11/20/18 (H10,Q9,L9) Mondays 1:00-3:50pm; Tuesdays 2:00-4:50pm ARC E-13 1 MONDAY 1pm 13 14 15 Sitai Justin Jordan 10 11 12 Jane David 7 8 9 Ava 4 5 6 Luke Toni Aidan 1 2 3 Jingyi Khalil Instructor Station Whiteboard and Screen 2 222-02 Class Seating Chart Tuesdays TUESDAY 2pm Electronics Door 28 29 30 25 26 27 Jairo Yeri Yide 22 23 24 Danni Elaine Brandon 19 20 21 Leo Andy Stephanie 16 17 18 Instructor Station Whiteboard and Screen 3 MSCI 222 Fall 2018 - Class Schedule & Due Dates MONDAY TUESDAY NOTES 27 August 28 August Session 1. Introduction, Review of Syllabus, Basic Concepts 3, 10 September 11 September NO CLASSES Labor Day / Instructor Unavailable 17 September 4 September Session 2. Basic Electronic Devices (Homework #1 Due) 24 September 18 September Session 3. Semiconductor Materials & Diodes (H2, Q1,L1) 1 October 25 September Session 4. Decimal and Computer Number Systems (H3, Q2,L2) 8 October 2 October Session 5. Transistors as Switches and Amplifiers (H4, Q3,L3) 15 October 9 October Session 6. Analog and Digital Concepts (H5, Q4. L4) 16 October NO Tuesday CLASSES Midterm Break 22 October (*) 23 October (*) Session 7. The Operational Amplifier (H6, Q5, L5) 29 October(**) 30 October (**) Session 8. Digital Integrated Circuit Logic Gates (H7, Q6, L6) 5 November (***) 6 November (***) Session 9. Flip-Flops & "Clocks" (H8, Q7, L7) 12 November 13 November Session 10. Digital Counters (H9, Q8, L8) 19 November 20 November Session 11. Digital Shift Registers (H10, Q9, L9) 26 November 27 November Session 12. Using Analog and Digital IC Circuits Together (Q10, L10) 3 December 4 December Session 13. Interfacing Computers; RFID: Last Day for Labs 10 December 11 December In-class 2.5 hour Final Examination NOTE: 5-minute Quizzes one week after homework due & reviewed session MIDTERM: (*) Distributed; (**) Exam/Draft Paper Due; (***) Reviewed in class In-class Final Exams 10/11 December (Monday 10 December = Conflict Day) 4 MSCI 222C Class Readings Schedule In addition to the Class Notes (222Notes.pdf)!!! Session Due Notes 2 EW1: Pp 1-27; Armstrong: Chapters 1 3 (Pp 1-16) 3 EW1: Pp 28-65; Armstrong: Chapters 4 6 (Pp 17-63) 4 EW1: Pp 66-76; Armstrong: Chapters 7 9 (Pp 64-126) 5 EW1: Pp 77 -End; Armstrong: Chapters 10 11 (Pp 127-173) 6 EW2: Pp 1-50 and Pg 90; Armstrong: Chapters 12 13 (Pp 174-230) 7 EW2: Pp 51-79, Review Pg 12; Armstrong: Ch. 14 End (Pp 231-270) 8 EW2: Pp 80 - End, Review Pg 12 (CD4013, CD4017) 9 EW2: Review Pg 12 (CD4013, CD4017) 10 EW2: Review Pg 37 (555 Timer) 11 Review EW1 and EW2 as necessary, Sensors Lab Manual if interested 12 and on Review EW1 and EW2 as necessary EW1 = Basic Electronics: Transistors and Integrated Circuits, Workbook I by Forrest M. Mims, III (ew1.pdf) KEY EW2 = Digital Electronic Projects, Workbook II by Forrest M. Mims, III (ew2.pdf) Armstrong = Man of High Fidelity (armstrong2.pdf) Sensors = Radio Shack Electronic Sensors Lab by Forrest M. Mims, III (sensors.pdf) 5 MSCI 222C Hands-on Lab Modules #01: Measuring Resistance and Voltage #02: Voltage Sources, LEDS, Diodes & Characteristic Curves #03: Capacitors, Time Constants & Transistor Gain #04: Voltage Regulation & Transistor Switching #05: Analog IC Voltage Comparator #06: Basic Digital Logic #07: Set-Reset Latches & Type D Flip-Flops #08: Decade Counter and One Shot Switch Debouncer #09: Three Stage Type D Flip-Flop Shift Register #10: NE555 IC Timer Circuits Optional Labs (Additional Labs may be added or substituted): #A: Sound Detector Circuit (Audio-triggered One-shot) #B: Seven Segment Display Decoder-Driver Circuit 6 1

Instructor Contact Information Dr. Charles Rubenstein <crubenst@pratt.edu> Professor of Engineering & Information Science Pratt Brooklyn Campus Office: ARC G-49 Fall 2018 Office hours (by appointment *) Mondays: 4:00pm - 5:00 pm = ARC G-49 (or E-13) Tuesdays: 5:00pm - 6:00pm = ARC G-49 (or E-13) (*Please email me at least a day in advance if you plan on coming to office hours ) Send me an email crubenst@pratt.edu Subject line: 222C or Electronics 7 * Class Session Archives http://www.charlesrubenstein.com/222/ 18fa11.pdf (Class PowerPoint slides)* 18fa11_h.pdf (6-slide/page handout format)* *Power points normally available by Wednesday evening After last class of the session 8 UPDATED: Fall 2018 Tutoring Sessions Fall 2018 - OPEN LAB TIME - ARC E-13 Mondays 9am - 1pm Wednesdays 12 noon - 5pm Thursdays 12 noon - 5pm Fridays 9am - 5pm BY PRE-ARRANGEMENT ONLY CONTACT: Mrs. Margaret Dy-So, Assistant to the Chairperson Mathematics & Science Department ARC G-41 On pre-arranged day, access to E-13 and the White Console is obtained from Ms. Dy-So or the student assistant in room G-39 9 10 Today s Class - Session #11: DUE: Homework Set #10 Readings: Review Pg 12 (CD4013, CD4017) Lecture: Digital Shift Registers 2 Do: Quiz #09, Review Homework Set #10 and Lab #08 Module #09: Three Stage Type D Flip-Flop Shift Register Happy Thanksgiving! 21-24 November 2018 For Session 12: Readings: EW2: Review Pg 12 (CD4013, CD4017) Lecture: Using Analog and Digital IC Circuits Together 2 Do: Quiz #10, Review Lab #09 Module #10: NE555 IC Timer Circuits Questions? 11 12 2

MSCI 222C Electronics Review Kirchhoff s Laws - KCL & KVL Ohms Law Power Law emath Calculations Combining Resistors Time Constants Voltage Divider Equation 13 Kirchhoff s Laws: KCL and KVL KCL: The current going into any point has to be the same as the current going out of the point also called The Law of Conservation of Current KVL: The sum of all the voltages, as you go around a circuit from some fixed point and return there from the opposite direction, and taking polarity into account, is always ZERO also called The Law of Conservation of Voltage 14 OHMS LAW & the POWER LAW There are three common forms for each Equation: Ohms Law: V=IR V = I R R = V / I I = V / R Power Law: P = I V P = I V P = I 2 R P = V 2 / R About Electronics Math Calculations Ohms Law equation: V=IR and I = V / R 1. If R is 1 Ohm = 1 Ω and V is 1 volt: then I = 1 Ampere 2. If R is 1MΩ = 1,000,000 Ω and V is 1 volt: then I = 1 microampere = (1 ua = 1 µa) 15 3. If R is 1k Ohm = 1kΩ = 1000Ω and V is 1 volt: then I = 1 milliampere ( = 1 ma) This is the most common calculation for our labs 16 Series Resistors CURRENT THROUGH resistors is the same in series circuits Parallel Resistors The VOLTAGE ACROSS Resistors is the same in parallel circuits 1. Resistors in SERIES add R ab = R 1 + R 2 + + R n 2. For n Like Resistors in SERIES: R ab = n R 17 1. The Inverse of Resistances in PARALLEL add 1/R ab = 1/R 1 + 1/R 2 + + 1/R n 2. For TWO Resistors in Parallel; R ab = R 1 R 2 / (R 1 + R 2 ) 3. For n Equal Resistances in Parallel; R ab = R / n 18 3

Simple Series/Parallel Resistor Circuits Time Constant NOTES The time required to charge or discharge a capacitor requires calculating: The Equivalent Resistance of the circuit above: R ab = [ R 1 R 2 / (R 1 + R 2 ) ] + R 3 τ = R C with τ in seconds, R in ohms, C in Farads 19 20 The Voltage Divider Equation Typical Voltage Dividers Math Analysis Drawing: More Realistic Schematic: Vout = Vin [ R 2 / (R 1 + R 2 ) ] When a voltage is applied to two (or more) resistors in series, the voltage across a particular resistor is the applied voltage times the selected resistor divided by the sum of the resistors 21 Voltage Divider Equation: Vout = Vin [ R 2 / (R 1 + R 2 ) ] 22 About Transistor Calculations The NPN schematic symbol can be divided into: 1. A Base-Emitter circuit where the base-emitter junction forms a silicon diode: and V be = V d = 0.6v NOTES: Non-Inverting NPN Transistor Switch As shown, with switch DOWN: V in = 0 Voltage at the base, V b = 0 And the LED is OFF 2. And a Collector-Emitter circuit where: a. I C = I B h FE b. And the transistor saturation current is calculated as if the C-E junction is a short circuit thus giving a maximum collector current possible: when the transistor is fully on (V CE 0) 23 With the switch in the UP position: V in = +Vcc Voltage at the base, V b = V cc V R1 KVL: LED Voltage, V LED = V cc V R1 V be And the LED is ON NOTE: V CE à zero apx short circuit when transistor is ON ) 24 4

NOTES: Inverting NPN Transistor Switch As shown, with switch DOWN: V in = 0, voltage at the base, V b = 0 Note: V CE à apx OPEN circuit And the LED is ON With the switch in the UP position: V in = +Vcc Voltage at the base, V b = 0.6v Note: V CE à apx SHORT circuit And the LED is OFF as V c is at ground 25 LOGIC Gates & Truth Tables Truth Table Review A B AND NAND OR NOR 0 0 0 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 0 1 0 ExOR 0 1 1 0 8-Bit Binary Decoding Chart ExNOR 1 0 0 1 2 7 = 128 2 6 = 64 2 5 = 32 2 4 = 16 2 3 = 8 2 2 = 4 2 1 = 2 2 0 = 1 - - - - - - - - 26 +5 Volt Voltage Regulator Circuit You ALREADY have the 7805 Voltage Regulator connected as a 5 Volt Source (with a 1K Resistor and Green LED): DO NOT REMOVE REGULATOR CIRCUIT!!! You will be using it as the power source for the remainder of the semester Switch Output Bouncing Review A push button switch is a metal piece that can be pressed onto a contact to close the switch allowing current to flow. In inexpensive switches, the metal is not far from the contact and when released may actually bounce up and down giving the appearance of more than one output pulse to a fast (high speed) IC gate: Note that an IC Gate has a threshold voltage above which the Gate sees a Logical 1 27 28 Flip-Flop: Review A Flip-Flop normally has TWO outputs, Q and Q-not which is the inverse of the Q output often noted as Q on a schematic diagram. The CD4013 has TWO Type D Flip-Flops in it with the following schematic: Clocking a One Stage Shift Register One Stage Shift Register: The Truth Table for the Flip-Flop outputs is therefore: Q Q-NOT 0 1 1 0 29 30 5

4017 Decade Counter IC - NOTES CD4017 Decade Counter Pulses 1) The 4017 counts, or is clocked by rises of the input clock line 2) Note that CE the "clock enable" line actually disables the clock when high connect it to ground if you don t get the clock to work... 3) IC Pin 14 is marked Clk meaning Clock input pin 4) The ten states of the CD4017 Decade Counter are labeled 0-9 to represent the count of clock pulses after reset. After all CD4017 counters have been reset, input pulses increase the count and set the individual output states 0, 1, 2, 9, then resets and restarts at 0. 5) Your first step in understanding what is going on is to label the diagram and mark each pin with its function (e.g., pin 15 = "reset", pin 11 = "output count 9"). 31 Output pulse widths are equal to the space between rises of the input clock 32 Questions? Homework #09 Quiz Decade Counters When you DO NOT show work, I have to guess. When you DO show work, I can try to see what you are doing and give an O.K. 33 34 Homework QUIZ #09 Homework #09 1 9.1a) After all CD4017 counters have been reset, how many input clock pulses are required to get one output pulse? Figure 9.2 The CD4017 Decade Counter with pins 11 and 15 connected together and Output from pin 11 9.1a) In figure 9.2, after the CD4017 counter has been reset, how many input clock pulses are required to get one output pulse? pulse(s) 9.1b) Check one answer: a) The output pulse is very brief, just wide enough to reset the counter. b) The output pulse has a width equal to the space between rises of the input clock. c) The output pulse goes high and stays high. You have five minutes to solve 35 CD4017 with Output from Pin 11 and pins 11 and 15 connected together Pin 11 = 9 Pin 15 = Reset; thus NINE pulse(s): Starts at 0 resets on 9 9.1b) Choose one answer: a) The output pulse is very brief, just wide enough to reset the counter b) The output pulse has a width equal to the space between rises of the input clock c) The output pulse goes high and stays high. 36 6

Homework #10 1, 2 MSCI 222 Electronics Homework #10 Review VERY IMPORTANT!!! STUDY THESE PROBLEMS FOR FINAL EXAM!!! 10.1) For binary (base 2) numbers, is the highest weighted bit at extreme Left or extreme Right? Extreme Left 10.2) For decimal (base ten) numbers, is the highest weighted bit at extreme Left or extreme Right? Extreme Left (Hint: If your answers to 10.1 and 10.2 are not both the same, please review this material!) 37 38 Homework #10 3a PROBLEM Consider a 4-stage shift register made from four D-type flip-flops and sitting horizontally on a table with the serial Data input at the left. Homework #10 3b Consider a 4-stage shift register made from four D-type flip-flops and sitting horizontally on a table with the serial Data input at the left. 10.3) If an experimenter enters a 1 (by holding the Data line high, raising and then lowering the clock input) and then enters a 0, then a 1, then a 0 so that all four flip-flops have outputs that correspond to numbers he entered (1010); 10.3a) where is the last number entered: At the extreme Left or Right? Extreme Left (A out = 0 ) 39 10.3) If an experimenter enters a 1 (by holding the Data line high, raising and then lowering the clock input) and then enters a 0, then a 1, then a 0 so that all four flip-flops have outputs that correspond to numbers he entered (1010); 10.3b) Convert the binary number in the shift register to decimal (base ten). The binary is 0101 and the decimal number is: 0101 = 0 8 + 1 4 + 0 2 + 1 1 = 4 + 1 = 5 40 Homework #10 3 Consider a 4-stage shift register made from four D-type flip-flops and sitting horizontally on a table with the serial Data input at the left. 10.3c) Repeat the shift register problem of 10.3, but with the experimenter entering a 0 (by holding the Data line low, raising and then lowering the clock input) and then entering a 1, then a 0, then a 1 so that all four flip-flops have outputs that correspond to numbers he entered (0101); Convert the binary number now in the shift register to decimal (base ten). The binary is 1010 and the decimal number is: 1010 = 1 8 + 0 4 + 1 2 + 0 1 = 8 + 2 = 10 41 Questions? 42 7

Module 8 Part 1: CD4017 Decade Counter MSCI 321 Electronics The Numbers on OUTSIDE of the IC rectangle are the Pin Numbers Hands-On Lab Module #08 Review 43 DO NOT DISASSEMBLE USED LATER IN LAB 9 44 CD4017 Decade Counter Pulses Module 8 Pt 2: One-Shot Switch De-bouncer Output pulse widths are equal to the space between rises of the input clock 45 For each S1 pressing there is a single pulse output Using the de-bounced output as the new S1 input to Pin 14 of the CD4017 provides a clean decade counter output and the ability to set up the LED outputs to illustrate Count to N and Halt and Divide by N (see next slides) DO NOT DISASSEMBLE ALSO USED IN LAB 9 46 Count to 5 and HOLD 4017 with Output from Pin 1 (= 5 ) pins 1 and 13 (= CE ) connected together; thus After all 4017 counters have been reset After FIVE pulse(s) the count HOLDS: Starts at 0, CE=1 on 5, counter stops Count to 5 and HOLD Counter Pulses After count is reached output pulse goes high and stays high The output pulse goes high and stays high. (see pulse diagrams, next slide) 47 48 8

Count to 5 and RESET 4017 with Output from Pin 1 (= 5 ) pins 1 and 15 (= Reset ) connected together; thus Count to 5 and Reset Counter Pulses After all 4017 counters have been reset After FIVE pulse(s) counter resets: restarts at 0, resets on 5, etc. The output pulse is very brief, just wide enough to reset the counter (see pulse diagrams, next slide) After count is reached, the output pulse is very brief, just wide enough to reset counter 49 50 Questions? MSCI 222 Electronics Hands-On Lab GENERAL NOTES 51 52 MSCI 222 Electronics Module #09 Digital Shift Registers A shift register is a sequence of flip-flops (F/F). The output of one F/F being the input to the next Thus flip-flops can be used to store 0 s and 1 s and shift them down a line. CD4013 Dual Type-D Flip-Flop The CD4013 is a CMOS logic integrated circuit containing two D-Type Flip-Flops in a 14-pin DIP package. A clock pulse will store data in the D input. Connecting Clock and Q outputs makes a toggle Flip-Flop for counting circuits. This action could be used for serial to parallel or parallel to serial data conversion. Reading for next week: Review pg. 37 EW2 (re: the NE555 IC) Supply Voltage Range: +3 to +18 volts Note: +Vcc at pin 14 and Common Ground at pin 7 (See Precautions for working with CMOS circuits) 53 54 9

Kept FROM Lab Module 8 Part 2 CD4013 One-Shot Switch De-bouncer Circuit MSCI 222 Electronics Hands-On Lab Each time S1 is pressed there is a single pulse output from Pin 1 (Q) You may want to connect it to the Decade Counter s input pin 14 Module #09 55 56 CMOS Precautions!!! CMOS (Complementary Metal-Oxide-Silicon) ICs Please note that CMOS ICs require special handling In industry, a grounding strap is typically used when handling more sensitive CMOS devices to avoid static discharge from your hands getting into a gate input. Our chips are not THAT sensitive 1. ALWAYS insert CMOS ICs into circuits with the power OFF 2. Connect any UNUSED pins that feed logic gates to ground or +Vcc to avoid erroneous outputs 3. The voltage at any CMOS input gate must NOT exceed +Vcc ** CAUTION ** Most electronic component leads have been tinned with a tin-lead coating to make them easier to solder into a circuit. Although we will NOT do soldering in this class, AFTER working with components, please avoid lead poisoning by washing your hands. Thank You! 57 58 Bill of Materials Module #09 In this Module we will be using: 2 @ CD4013 Dual Type D Flip-flop ICs (IC1, IC2) 1 @ Red LED (LED1) 1 @ 1K Resistor (R3) 2 @ 4.7 K Resistors (R2, R4) 1 @ 10K Resistor (R1) 1 @ 100 µf Capacitor (C1) On Learning Lab Console: (Regulator Circuit) 2 @ Push Button Switches (Springs: 46/47, 48/49) 4 @ LED Displays (Springs: 12/11, 14/13, 16/15, 18/17) 59 Lab Module 09 Shift Register Assemble a Three (3) Stage Shift Register with De-bounced Clock from two CD4013 Dual Flip-flop ICs: With S2 (Data) OFF: Pressing S1 Input, Output is always 000 Pressing S2 (Data ON) and then Pressing S1: Output increments for each S1 key press: Output = 100, 110, 111 and so on 60 10

Any Questions? Send me an email crubenst@pratt.edu or c.rubenstein@ieee.org End 61 62 11