An Adaptive Length Frame Synchronization Scheme

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Send Orders for Reprints to reprints@bentamscience.ae 244 Te Open Automation and Control Systems Journal, 2014, 6, 244-249 An Adaptive Lengt Frame Syncronization Sceme Open Access Gang Li 1 and Jin Xia 1,* 1 Engineering practice center, Senyang Ligong University, Senyang, 110159, Cina; 2 Equipment engineering college, Senyang Ligong University, Senyang, 110159, Cina Abstract: In order to improve te frame syncronization performance of te adaptive lengt frame transmission system, a frame syncronization sceme is proposed. Te sceme considers te false loss probability relating to te bit error rate and te false alarm probability relating to te model of syncronous eader are considered syntetically. Ten te performance formulas of general frame syncronization are given and analyzed to obtain te relevant frame syncronization parameters. In te end, based on te frame syncronization parameters, te sceme performance of adaptive lengt frame syncronization is simulated. Te simulations sow te adaptive lengt frame transmission system can realize frame syncronization effectively. Keywords: Adaptive lengt frame, frame syncronization eader, frame syncronization, performance parameters, reliability, Z transform. 1. ITRODUCTIO Te reliability for backside data disposal and te wole performance of a communications system are insured by te tecnique of frame syncronization by cecking te frame syncronization mark and picking up te frame data [1, 2], [3]. Te tecnique of frame syncronization as gained considerable attention in teory and application, suc as te selecting standard for syncronization eader model [4, 5], te searcing aritmetic for syncronous eader [6, 7], design of appointed frame syncronization system [8-10], and so on. Te tecnique of adaptive lengt frame transmission can increase te trougput to a certain extent and add te difficulty of frame syncronization [11-13]. Aiming at te difficulty for identifying te adaptive lengt frames, a frame syncronization sceme for adaptive lengt frame transmission system is researced to realize te frame syncronization adequately and ensure te reliability of data transmitting and processing. In tis sceme, te probability of false loss relating to te bit error rate and te probability of false alarm relating to te model of syncronization eader are considered syntetically. Ten te performance formulas of general frame syncronization are given and analyzed to obtain te relevant frame syncronization parameters. Finally, based on te frame syncronization parameters, te performance of tis sceme is simulated. Simulations sow tis sceme can realize frame syncronization of te adaptive frame lengt system effectively and ensure te reliability of data transmission and processing. 2. RESEARCH O FRAME SYCHROIZATIO SCHEME Te serial data uses a frame to be a discriminating unit. At frame start is laid a Frame Syncronization Header (FSH wit te excellent relativity. Te Frame Lengt Marker (FLM is placed between te FSH and te frame. Te lengt of FSH, FLM and frame are, fm and f bits respectively. In te frame syncronization Searcing States (SS, te frame syncronization system analyses te FSH bit by bit. Once te FSH is analyzed, te frame syncronization system enters te frame syncronization Cecking States (CS. In te CS, system reads te frame lengt information in te FLM and cecks te next FSH. If cecking anoter FSH before te next frame, te previous FSH will be discarded. Secondly, system cecks te FSH until te next frame start. If te FSH is not cecked in tis course, te previous FSH will be considered as a false FSH or some error bits are in te FLM, ten system returns te SS. Oterwise, in te CS, if cecking a 1 FSHs continuously, system enters te frame syncronization Locking States (LS and begins to deal wit frame data. After entering te LS, te frame syncronization system needs to still ceck te FSH. If te false FSH is not cecked in te frame syncronization locking and olding process, te system will enter te frame syncronization Holding States (HS In HS, system reads te FLM and cecks te FSH of te next frame. If tere are error bits in te FLM, te system will pick up te frame lengt information f based on te seriate of two FSHs. Losing te continuous b-1 FSHs or once cecking te false FSH, system will stop taking count of olding frame syncronization and enter te SS. Oterwise, system returns to te LS. So te frame syncronization olding process can be partitioned, te frame syncronization olding process I(HS-I arose by bit error in te FLM and te FSH and te frame syncronization olding process II(HS-II arose only by bit error in te FSH. During te HS-I, FSH is real loss. So te time of HS-I and te frame syncronization analyzing and cecking process are defined to be te frame syncronization 1874-4443/14 2014 Bentam Open

An Adaptive Lengt Frame Syncronization Sceme Te Open Automation and Control Systems Journal, 2014, Volume 6 245 Fig. (1. Relation of fm, ber and fm. loss time. During te HS-II, te FSH is unreal loss. So te time of HS-II is defined as te frame syncronization duration time. 3. ERFORMACE AALYSIS OF FRAME SYCHROIZATIO SCHEME Te probability of cecking a false FSH, and te probabilities of including error bits in te FLM or FSH are defined as M ff = 0.5 i! C (1 i=0 fm = 1! (1! ber fm (2 M i = 1! " C (1! ber!i ber i (3 i=0 Were, M bits is te bounds of admitting bit error in te FSH, and ber is te bit error rate in cannel. Te best frame syncronization code type is sown as Table 1. Wen f =8192 bits, te ff is sown as (Fig. 1. Table 1. Te best frame syncronization code type. (bits code type 8 B8 16 EB90 32 1ACFFC1D 64 FFF2D58B65466000 As sown as (Fig. 1, ff as relation to M and but as no relation wit ber. If M or is larger ten ff is smaller. Wen =32 bits (namely, te frame syncronization code type is EB90 and M<3 bits, ff 10-7. Wen =32 bits and f =8192 bits, te fm and are sown as (Fig. 2 and (Fig. 3. (Fig. 2 sows tat fm as relation to ber and fm but not wit M. If ber or fm is larger ten fm is bigger. fm =k bits can denote 2 k frame lengt. (Fig. 3 sows tat as relation to ber and M. If ber is larger or M is smaller ten is bigger. Let M=2 bits, wen ber<10-2, 0. Te probability of researcing te true FSH in a frame is 1 = 1! f f + 1! (1! ff + + 1! (1! f ff f!1 f " (1! (1! ff k!1 k=1 = (4 f Let =(1 (1 fm, ten te states of system entering LS transfer is sown as Fig. (4. Te Z switc is sown as follows separately. SS 1 Z 1! (1! 1 Z (5 Z CS 1 (6 1! SS(Z(1! Z Z CS 2 (7 1! SS(ZCS 1 (Z(1! Z

246 Te Open Automation and Control Systems Journal, 2014, Volume 6 Li and Xia Fig. (2. Relation of fm, ber and fm. Fig. (3. Relation of, ber and M. So wen i =2,,a-1, CSi ( Z is sown as follow. Z CS i (8 i!1 1! SS(Z " CS j (Z(1! Z j=1 Ten te unitary time of te system entering LS can be given as a!1 T ELS = 1 d(ss(z " CS i (Z [ i=1 ] dz = (1+ 1!! 1 a!1 1 (1! a!1 (9 Z=1 (1 1 Z Z 1 Z SS Z... Z Z CS1 CS2 CSa-1 LS (1 Z (1 Z (1 Z SS SS(Z CS1(Z... CS2(Z CSa-1(Z CS1 CSa-1 LS Fig. (4. States transfering of LS. Te states of system entering te HS-I is sown as Fig. (5. So, we can get te Z switc for system entering te HS-I state as (10.

An Adaptive Lengt Frame Syncronization Sceme Te Open Automation and Control Systems Journal, 2014, Volume 6 247 HS-I Z Z... Z Z 1 HS-I2 HS-Ib 1 SS HS I( Z = (1 Z HS-I Fig. (5. States transferring of HS-I. Z b 3 m= 0 ( 1 Z ( 1 Z HS-I(Z SS ( 1 Z Z... Z Z LS HS-II1 HS-IIb-1 SS Z ( 1 ( 1 Z ( Z m + ( Z b 2 Z (10 Te states of system entering te HS-II are sown as Fig. (6. Ten, we can get te Z switc for system entering te HS-II state as follows. LS Z (11 1! (1! Z HS! II 1 Z 1! LS(Z(1! Z (12 HS! II 2 Z 1! LS(ZHS! II 1 (Z(1! Z (13 LS LS(Z... HS-IIb-2(Z HS-IIb-1(Z HS-IIb-1 SS Fig. (6. States transferring of HS-II. So wen i =2,,b-1, HS! II i (Z is sown as follows. HS! II i Z (14 i!1 1! LS(Z " HS! II j (Z(1! Z Te unitary time of entering HS-I is T HS!I = (1! b!1 (1! j=1 (15 Te time of frame syncronization loss arose by bit error in te FLM and FSH is T L1 = fm (1+ T HS!I = (1! b!1 fm (1! So te time of syncronization loss is (16 T L = T L1 + T ELS (17 T H = Te time of syncronization duration is (1! b (1! (18 b 4. ERFORMACE SIMULATIO OF FRAME SYCHROIZATIO SCHEME Letting M=2, =8000 and fm =1 bits, te numerical simulation of frame syncronization performances for adaptive frame lengt system are sown as (Fig. 7 and (Fig. 8. Fig. (7 sows tat T L is small at lower ber, but large at iger ber. Wen ber 10-2, T L 0 no matter wat values b and a are. And if a is greater, ten T L increases faster. Be- Fig. (7. Te curve of T L.

248 Te Open Automation and Control Systems Journal, 2014, Volume 6 Li and Xia Fig. (8. Te curve of T H. cause, during searcing FSH bit by bit and cecking FSH frame by frame, te increase of ber and a leads FSH and FLH to be leaked frequently. So T L is prolonged. Wen te cannel condition is good (namely ber is smaller, T L is only related to a (T L =a. Terefore, for decreasing T EL, te smaller a sould be taken. So making a=2 can ensure te reliability of LS. Fig. (8 sows tat T H is large at lower ber, but is small at iger ber. Obviously, wen cannel condition is good, fm and are low and << fm. System will keep in HS-II. And b is larger, te time in HS-II is longer. Ten T H is larger. Wen cannel condition is bad, FSH will be lost frequently and T H is small. To improve T H, te larger value of b sould be taken. But, te lengt of frame is not fixed in frame lengt adaptive system. Once losing FSH for FLH error, system will lose all data contained in te frame. Terefore, to increase data reliability, b sould not be too large. So making b=2 can enance T H. Table 2. Error lock probability. a=1 a=2 a=3 a=4 M=16 2.0 10-4 5.9 10-8 1.1 10-11 3.0 10-15 M=32 6.7 10-9 8.5 10-15 1.1 10-20 1.4 10-26 M=64 6.0 10-18 2.3 10-28 8.7 10-39 3.3 10-49 Under different parameters, te simulation results about te probability of frame syncronization error lock are sown as Table 2. Under different parameters, te simulation results about te probabilities of frame syncronization unlock after error lock are sown as Table 3. According to te results of Table 2 and Table 3, te values of frame syncronization parameter can be advice as Table 4. Wen a=b=2, te simulation results of trougput in te adaptive frame lengt sceme and te fixed frame lengt sceme are sown as (Fig. 9. As a wole, te trougput of adaptive sceme is superior to te fixed sceme obviously. COCLUSIO Te time of frame syncronization loss T L and te time of frame syncronization duration T H are important performance parameters to frame syncronization sceme. Te good frame syncronization sceme must make T L sort but T H long. From te performance formulas of tis sceme, te relevant frame syncronization parameters can be obtained. Based on tose, te frame syncronization performances of adaptive frame lengt system are simulated. Simulations sow wen a=b=2 tis sceme can realize adaptive lengt Table 3. Unlock probability of after error lock. Table 4. Advice values of frame syncronization parameter. b=1 b=2 b=3 b=4 M=16 0.9997 0.9995 0.9992 0.9989 M=32 0.99998 0.99997 0.99997 0.99994 M=64 0.99999999996 0.99999999992 0.99999999988 0.99999999984 M a b =16 1 3 3 =32 2 2 or 1 2 or 3 =64 5 1 2 or 1

An Adaptive Lengt Frame Syncronization Sceme Te Open Automation and Control Systems Journal, 2014, Volume 6 249 Fig. (9. Te curve of trougtput. frame syncronization effectively and ensure te reliability of data transmission and processing for te adaptive lengt frame transmission system. Simulations sow tat te proposed sceme is suitable for te adaptive frame lengt system adequately and te system outstanding trougput can be ensured effectively. So te new sceme presented in te paper is valid. COFLICT OF ITEREST Te autor confirms tat tis article content as no conflict of interest. ACKOWLEDGEMETS Tis work was funded by te Science Tecnology Bureau Applied Basic Researc lan of Senyang City (F14-231-1-31, SFC (61301256, te Dr. Start fund of Senyang Ligong University, and te Science ublic Researc Funded rojects in Science Department of Liaoning rovince GY2014-D-024. REFERECES [1] S. Tascioglu, and O. Ureten, A tecnique to determine number and locations of frame syncronization pilot carriers in pilot-based OFDM systems, IEEE Transactions on Wireless Communications, vol.8, no. 1, pp. 61-64, 2011. [2] E. M. Bastaki, H. H. Tan, and Y. Si, Frame syncronization based on multiple frame observations, IEEE Transactions on Wireless Communications, vol. 9, no. 3, pp. 1097-1100, 2010. [3] Z. X. Cen, and J. S. Yuan, A code-aided soft frame syncronization algoritm for quasi-cyclic LDC coded system, International Conference on Wireless Communications etworking and Mobile Computing, vol. 9, pp. 1-4, 2009. [4] W. S. Sun, J. Song, A frame syncronization algoritm in burst OFDM communication based on IEEE802.11a, International Conference on Electric Information and Control Engineering, vol. 4, pp. 5631-634, 2011. [5] Y.. Sa, and L. G. Zeng, Design and performance analysis for frame syncronization of ig speed, Communications Transactions, vol. 22, no. 9: pp. 104-107, 2007. [6] S. Tascioglu, and O. Ureten, A tecnique to determine number and locations of frame syncronization pilot carriers in pilot-based OFDM systems, IEEE Transactions on Wireless Communications,vol. 8, no. 3, 61-64, 2008. [7] D.Yin, Z. Li, and B. J. Hao, Optimum design of frame lengt for meteor burst communication, Acta Electrinica Sinca, vol. 38, no. 10, pp. 2229-2233, 2010. [8] Q. Jian, A. Sonia, and X. S. Zao, Optimal frame lengt for keeping normalized goodput wit lowest requirement on BER, IEEE Communications Magazine, vol. 1, no. 8, pp. 715-719, 2008. [9] C. Giovanni, D. B. Mario, M. ierluigi,. Cosimo, and. Luigi, An algoritm for controlling packet size in IEEE 802.16e etworks, Computer etworks, vol. 55, no. 6, pp. 2873-2885, 2011. [10] M. X. Bi, C. S. an, and Y. T, Zao, Simulation researc on AOS adaptive frame lengt systems, Journal of Systems Simulation, vol. 32, no. 2, pp. 358-362, 2011. [11] M. Villanti, M. Iubatti, C. A. Vanelli, and G. E. Corazza, Design of distributed unique words for enanced frame syncronization, IEEE Transactions on Communications, vol. 57, no. 8, pp. 2430-2440, 2009. [12] J. Sun, and H. B. Zu, Detection parameters design based on capacity analysis of secondary users in OSA systems, Journal of Electronics & Information Tecnology, vol. 33, no. 1, pp. 205-210, 2011. [13] Z. Y. Yang, H. X. Yao, and K. Zeng, Design and implementation of te advanced orbit system link controller s simulation, Microelectronics & Computer, vol. 24, no. 24, pp. 211-213, 2007. Received: September 22, 2014 Revised: ovember 02, 2014 Accepted: ovember 05, 2014 Li and Xia; Licensee Bentam Open. Tis is an open access article licensed under te terms of te Creative Commons Attribution on-commercial License (ttp://creativecommons.org/licenses/by-nc/3.0/ wic permits unrestricted, non-commercial use, distribution and reproduction in any medium, provided te work is properly cited.