Semester III. Subject Name: Digital Electronics. Subject Code: 09CT0301. Diploma Branches in which this subject is offered: Computer Engineering

Similar documents
Course Plan. Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes (POs) PSO-1 PSO-2

Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology

Nirma University Institute of Technology. Electronics and Communication Engineering Department. Course Policy

Bachelor Level/ First Year/ Second Semester/ Science Full Marks: 60 Computer Science and Information Technology (CSc. 151) Pass Marks: 24

R13 SET - 1 '' ''' '' ' '''' Code No: RT21053

CS6201 UNIT I PART-A. Develop or build the following Boolean function with NAND gate F(x,y,z)=(1,2,3,5,7).

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic

R13. II B. Tech I Semester Regular Examinations, Jan DIGITAL LOGIC DESIGN (Com. to CSE, IT) PART-A

AM AM AM AM PM PM PM

North Shore Community College

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS)

SRM UNIVERSITY FACULTY OF ENGINEERING AND TECHNOLOGY SCHOOL OF ELECTRONICS AND ELECTRICAL ENGINEERING DEPARTMENT OF ECE COURSE PLAN

Department of Computer Science and Engineering Question Bank- Even Semester:

Find the equivalent decimal value for the given value Other number system to decimal ( Sample)

PURBANCHAL UNIVERSITY

1. a) For the circuit shown in figure 1.1, draw a truth table showing the output Q for all combinations of inputs A, B and C. [4] Figure 1.

[2 credit course- 3 hours per week]

4.S-[F] SU-02 June All Syllabus Science Faculty B.Sc. II Yr. Instrumentation Practice [Sem.III & IV] S.Lot

DIGITAL FUNDAMENTALS

MODU LE DAY. Class-A, B, AB and C amplifiers - basic concepts, power, efficiency Basic concepts of Feedback and Oscillation. Day 1

Minnesota State College Southeast

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it,

Subject : EE6301 DIGITAL LOGIC CIRCUITS

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York

LESSON PLAN. Sub Code: EE2255 Sub Name: DIGITAL LOGIC CIRCUITS Unit: I Branch: EEE Semester: IV

GUJARAT TECHNOLOGICAL UNIVERSITY, AHMEDABAD, GUJARAT. COURSE CURRICULUM COURSE TITLE: DIGITAL ELECTRONICS AND DIGITAL INSTRUMENTS (Code: )

1. Convert the decimal number to binary, octal, and hexadecimal.

St. MARTIN S ENGINEERING COLLEGE

Sequential Logic. Analysis and Synthesis. Joseph Cavahagh Santa Clara University. r & Francis. TaylonSi Francis Group. , Boca.Raton London New York \

Contents Circuits... 1

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics

MODULAR DIGITAL ELECTRONICS TRAINING SYSTEM

EXPERIMENT: 1. Graphic Symbol: OR: The output of OR gate is true when one of the inputs A and B or both the inputs are true.

MODEL QUESTIONS WITH ANSWERS THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER CS 203: Switching Theory and Logic Design. Time: 3 Hrs Marks: 100

Microprocessor Design

1 Hour Sample Test Papers: Sample Test Paper 1. Roll No.

QUICK GUIDE COMPUTER LOGICAL ORGANIZATION - OVERVIEW

BHARATHIDASAN ENGINEERING COLLEGE, NATTRAMPALLI DEPARTMENT OF ECE

CSE Latches and Flip-flops Dr. Izadi. NOR gate property: A B Z Cross coupled NOR gates: S M S R Q M

HS Digital Electronics Pre-Engineering

WINTER 15 EXAMINATION Model Answer


Digital Principles and Design

Theory Lecture Day Topic Practical Day. Week. number systems and their inter-conversion Decimal, Binary. 3rd. 1st. 1st

Question Bank. Unit 1. Digital Principles, Digital Logic

INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad ELECTRICAL AND ELECTRONICS ENGINEERING

UNIVERSITI TEKNOLOGI MALAYSIA

TRAINING KITS ON DIGITAL ELECTRONIC EXPERIMENTS. Verify Truth table for TTL IC s AND, NOT, & NAND GATES

Laboratory Objectives and outcomes for Digital Design Lab

UNIVERSITY OF MASSACHUSSETS LOWELL Department of Electrical & Computer Engineering Course Syllabus for Logic Design Fall 2013

2 Marks Q&A. Digital Electronics. K. Michael Mahesh M.E.,MIET. Asst. Prof/ECE Dept.

Chapter 8 Functions of Combinational Logic

MODULE 3. Combinational & Sequential logic

Dev Bhoomi Institute Of Technology Department of Electronics and Communication Engineering PRACTICAL INSTRUCTION SHEET

BCN1043. By Dr. Mritha Ramalingam. Faculty of Computer Systems & Software Engineering

TYPICAL QUESTIONS & ANSWERS

ELE2120 Digital Circuits and Systems. Tutorial Note 8

EEE130 Digital Electronics I Lecture #1_2. Dr. Shahrel A. Suandi

COE328 Course Outline. Fall 2007

MUHAMMAD NAEEM LATIF MCS 3 RD SEMESTER KHANEWAL

FUNCTIONS OF COMBINATIONAL LOGIC

Define the outline of formal procedures and compare different digital components like multiplexers, flip flops, decoders, adders.

EE292: Fundamentals of ECE

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari

CHAPTER 4 RESULTS & DISCUSSION


A.R. ENGINEERING COLLEGE, VILLUPURAM ECE DEPARTMENT

ROEVER COLLEGE OF ENGINEERING & TECHNOLOGY ELAMBALUR, PERAMBALUR DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

UNIT 1: DIGITAL LOGICAL CIRCUITS What is Digital Computer? OR Explain the block diagram of digital computers.

Digital Electronic Circuits and Systems

THE KENYA POLYTECHNIC

List of the CMOS 4000 series Dual tri-input NOR Gate and Inverter Quad 2-input NOR gate Dual 4-input NOR gate

VeriLab. An introductory lab for using Verilog in digital design (first draft) VeriLab

Introduction to Digital Electronics

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath

PHYSICS 5620 LAB 9 Basic Digital Circuits and Flip-Flops

Date: Author: New: Revision: x SAULT COLLEGE OF APPLIED ARTS & TECHNOLOGY SAULT STE. MARIE, ONTARIO ELN TWO

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam

CPE 200L LABORATORY 3: SEQUENTIAL LOGIC CIRCUITS UNIVERSITY OF NEVADA, LAS VEGAS GOALS: BACKGROUND: SR FLIP-FLOP/LATCH

GUJARAT TECHNOLOGICAL UNIVERSITY, AHMEDABAD, GUJARAT COURSE CURRICULUM COURSE TITLE: VLSI (COURSE CODE: )

Bell. Program of Study. Accelerated Digital Electronics. Dave Bell TJHSST

VU Mobile Powered by S NO Group

Lesson No Lesson No

LECTURE NOTES. ON Digital Circuit And Systems

Registers and Counters

Chapter 5 Sequential Circuits

ME 515 Mechatronics. Introduction to Digital Electronics

Dev Bhoomi Institute Of Technology PRACTICAL INSTRUCTION SHEET EXPERIMENT NO. ISSUE NO. : ISSUE DATE: REV. NO. : REV. DATE : PAGE:

DIGITAL FUNDAMENTALS AND APPLICATIONS

Helping Material of CS302

UNIT III. Combinational Circuit- Block Diagram. Sequential Circuit- Block Diagram

Prepared By Verified By Approved By Mr M.Kumar Mrs R.Punithavathi Dr. V.Parthasarathy Asst. Professor / IT HOD / IT Principal

SEMESTER ONE EXAMINATIONS 2002

G. D. Bishop, Electronics II. G. D. Bishop, Electronics III. John G. Ellis, and Norman J. Riches, Safety and Laboratory Practice

Analogue Versus Digital [5 M]

CHAPTER 4: Logic Circuits

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

Lab #12: 4-Bit Arithmetic Logic Unit (ALU)

IT T35 Digital system desigm y - ii /s - iii

Registers and Counters

Transcription:

Semester III Subject Name: Digital Electronics Subject Code: 09CT0301 Diploma Branches in which this subject is offered: Objective: The subject aims to prepare the students, To understand the basic of Digital Electronic concepts required in analysis and design of digital electronic circuits and systems To understand the number system, logic gates, Boolean algebra, etc To understand Construction and operation of various digital circuits such as Adder, Subtractor, Multiplexer, Demultiplexer, Decoder, Encoder, Flip-flops, Counters Registers To devolve the capability to Simplify, Analyze Various Digital Electronic Circuits Credits Earned: 4 Credits Course Outcomes: After completion of this course, student will be able to Perform conversion between various number systems Apply knowledge of Boolean algebra and other minimization techniques for digital circuit design Identify, formulate and solve a problem based on combinational and sequential circuits Select the appropriate hardware and software tools for combinational and sequential circuit design Design various counters Verify the functions of various digital integrated circuits Evaluate the specifications of logic families Create a course project using digital integrated circuits Pre-requisite of course: Elementary knowledge of science and mathematics

Teaching and Examination Scheme Tutorial/ Practical Teaching Scheme (Hours) Theory Marks Marks Total Credits Term Marks Theory Tutorial Practical ESE IA CSE Viva work 0 4 50 30 0 5 5 150 Contents: Unit Topics Contact hours Weightage (%) 1 Introduction: Digital and Analog systems, logic level and pulse waveforms, elements of digital logic, Functions of digital logic Number systems and binary codes : Number System: Binary number system (addition, subtraction, multiplication, Division), Octal and Hexadecimal Number system, Conversion from binary to decimal, octal and hexadecimal and vice versa, Representation of Signed Numbers Codes : BCD, XS-3, Gray Code ( with Conversion), Alphanumerical Code 3 Logic Gates & Boolean Algebra Logic Gates: Positive and Negative logic, AND, OR, NOT, NAND, NOR, X-OR Gate, X-NOR Gate ( all gates with symbol, working principal and truth table), Conversion from Universal Gate to all other Gates, Boolean Algebra & Mapping Methods for Simplification: Boolean Algebra, Karnaugh Maps, Realizing Logic Function with Gates 4 Combinational logic design: Combinational Circuits and its implementations, Arithmetic Circuits - Adders and Subtractor, BCD Adder, Look-Ahead Carry Generator, Multiplier, Magnitude comparator Multiplexer and it s application, Encoders, Demultiplexers and Decoders and it s application, Parity Generation and Checking, Code Conversion 5 Sequential circuits: Flip-flops: Latch and Flip-flop, S-R flip-flops, D flip flop, J-K flip flop, Application of flip flops Registers: Classification, Serial in serial-out, serial-in parallel-out, parallel-in serial-out and parallel-in parallel out shift register Counters: Asynchronous (ripple) 4-bit binary counter, BCD Counter, 1 6 13 7 4 75 33 5 5

Synchronous counters, UP/DOWN counter, Ring counters 6 Programmable Devices: Introduction to Programmable Logic Devices, Programmable Logic Arrays (PLA), Programmable Array Logic (PAL) 15 TOTAL HOURS 8 100 3 Suggested Theory distribution: The suggested theory distribution as per Bloom s taxonomy is as per follows This distribution serves as guidelines for teachers and students to achieve effective teaching-learning process Distribution of Theory for course delivery and evaluation Remember Understand Apply Analyse Evaluate Create 15% 0% 30% 0% 10% 5% Suggested List of Experiments: Sr No Unit No Name of Topics 1 Implement and verify the functionality of Basic and Advance Logic Gates Implement and verify input basic logic gates using NAND gate 3 Implement and verify input basic logic gates using NOR gate 4 1 Implement and verify a circuit to Convert 4 bit Binary to Gray Code using logic gates and vice versa Contact Hours 5 3 Implement and verify half and full Adder Circuit 6 3 Implement and verify half and full Subtractor Circuit 7 3 Implement and verify 4 bit Parallel Adder circuit 8 3 Implement and verify the 3X8 Decoder circuit 9 3 Implement and verify the 8X1Multiplexer circuit 10 3 Implement and verify BCD to Seven segment LED Display circuit 11 4 Implement and verify the functionality of the SR & JK

Flip-Flop 1 4 Implement and verify the working of the Shift Register 13 4 Implement and verify the working of the 4 bit Ripple Counter 14 4 Implement and verify the working of 4 bit UP - DOWN Counter Student Activity: Design and Develop mini project using Various Digital IC and display devices Instructional Method: a The course delivery method will depend upon the requirement of content and need of students The teacher in addition to conventional teaching method by black board, may also use any of tools such as demonstration, role play, Quiz, brainstorming, MOOCs etc b The internal evaluation will be done on the basis of continuous evaluation of students in the laboratory and class-room c Practical examination will be conducted at the end of semester for evaluation of performance of students in laboratory d Students will use supplementary resources such as online videos, NPTEL videos, e-courses, Virtual Laboratory References: 1 Fundamentals of Digital Circuits A Anand Kumar PHI Learning, New Delhi, nd Edition or latest Digital Logic and Computer Design M Morris Mano Pearson Education, New Delhi, 011 or latest 3 Digital Principles and Application Malvino and Leech TMH Pub, New Delhi, 6th Edition or latest 4 5 Morden Digital Electronics Jain, R P TMH Education, New Delhi, 3rd Edition or latest Digital Electronics Kharate GK OXFORD University Press, 010 Supplementary Resources / Open Source Software:

1 PSpices and NGSpice Xcircuit 3 NPTEL website and IITs virtual laboratory 4 Multisim 5 Quartus