I/O Interfacing ECE 5: Digital System & Microprocessor What we are going to learn in this session: M6823 Parallel Interface Timer. egisters in the M6823. Port initialization method. How M6823 interfaces with various devices. Delay subroutine.
The M623 Parallel Interface/Timer M6823 Parallel Interface/Timer Used by M68 to communicate with external devices. Parallel data transfer. Has three ports: Port A, Port B, Port C. Each port is 8-bits long. Ports connect to devices. Ports need to be initialized before used. M6823 Datasheet 2
M6823 Interfacing Memory CS* M68k MAD (LED, Switches, Motor, 7-Segment, Keypad, etc.) Data Bus CS* Port A Device # M6823 Port B Device #2 Port C Device #3 How M6823 connects to M68k D-D7 D-D7 PA-PA7 DTACK* DTACK* /W* /W* PB-PB7 ESET* CLK CLK ESET* PC-PC7 A6-A23 MAD CS* A-A5 S-S5 (egister select pins) M68k M6823 3
M6823 Ports egisters in M6823 M6823 contains 23 registers. Each of the registers have a unique address that refers to them. To initialize ports, some registers need to be configured. Port General Control egister. Port X Control egister (A, B). Port X Data Direction egister (A, B, C). Port X Data egister (A, B, C). 4
PGC Port General Control egister. Used to set the operation of Port A & Port B. You only need to know (and use) Mode. #$,PGC PGC Settings PGC= Mode Description $ Unidirectional 8-bit transfer (Port A, Port B) $4 Unidirectional 6-bit transfer (Port A + Port B) $8 2 Bidirectional 8-bit transfer on Port B, bit I/O on Port A. $C 3 Bidirectional 6-bit transfer (Port A + Port B) 5
Port X Control egister Used to set buffering of input/output on PXD. Three modes: Mode. Mode. Mode X. You only need to know (and use) mode X. PXC Settings PXC= Sub-mode Description $ Double-buffered input $4 Double-buffered output $8 X Bit I/O 6
Port X Data Direction egister Used to specify the direction of data transfer for each bit in the port. Two states: If PXDD bit =, will be set as input. If PXDD bit =, will be set as output. Port X Data egister Contains the data sent/received to/from devices. Each PXD carries 8-bits of data. There are three data registers in the M6823: PAD, PBD, PCD. 7
Port Initialization To perform port initialization: Assign the register addresses to a unique name. PGC must be set to #$. PXC must be set to #$8. Set PXDD to input or output. Port Initialization Example Port Address PGC $A PAC $AD PBC $AF PADD $A5 PBDD $A7 PCDD $A9 PAD $A PBD $A3 PCD $A9 STAT OG $XXXXXX PGC EQU $A PAC EQU $AD PBC EQU $AF PADD EQU $A5 PBDD EQU $A7 PCDD EQU $A9 PAD EQU $A PBD EQU $A3 PCD EQU $A9 #$,PGC #$8,PAC/PBC #$XX,PADD/PBDD/PCDD (DEPENDING ON THE H/W) 8
6823 Interfacing M6823 Interfacing M6823 interfacing is similar to memory interfacing in last chapter. Instead of interfacing memory, M6823 is interfaced. A-A5 is reserved for M6823, the rest used for decoder. 9
Example: Full Decoding Interface M6823 with M68k so that its base address is $A5. Discussion For M6823 interfacing, 5 lines are automatically reserved for M6823.
Step : Allocate Address Line A23 A22 A2 A2 A9 A8 A7 A6 A5 A4 A3 A2 A A A9 A8 A7 A6 A5 A4 A3 A2 A A X X X X X 5 lines allocated UDS/LDS (reserved) Step 2: Set Base Address A23 A22 A2 A2 A9 A8 A7 A6 A5 A4 A3 A2 A A A9 A8 A7 A6 A5 A4 A3 A2 A A X X X X X A 5 UDS/LDS (reserved)
Step 3: Find Lower ange A23 A22 A2 A2 A9 A8 A7 A6 A5 A4 A3 A2 A A A9 A8 A7 A6 A5 A4 A3 A2 A A A 5 Step 4: Find Upper ange A23 A22 A2 A2 A9 A8 A7 A6 A5 A4 A3 A2 A A A9 A8 A7 A6 A5 A4 A3 A2 A A A 5 3 F 2
Step 5: Design Decoder A23 A22 A2 A2 A9 A8 A7 A6 A5 A4 A3 A2 A A A9 A8 A7 A6 A 5 SELIO* NAND NAND NAND A23 A6 A5 A8 A7 A6 AS* Memory Block Diagram $ unused Interfaced with M68k (M6823 I/O) $A5 $A53F (Lower ange) (Upper ange) unused $FFFFFF 3
Sample Programs LEDs & Switches 4
Example Example : Set LED A set of LEDs are connected to Port B in M6823. Write a program that turns on LED3 and LED4, and turns off the rest. Port Address PGC $8 PAC $85 PBC $87 PADD $89 PBDD $8D PCDD $8F PAD $8 PBD $83 PCD $89 M6823 PB PB PB2 PB3 PB4 PB5 PB6 PB7 LED LED LED2 LED3 LED4 LED5 LED6 LED7 5
Discussion Port B should be initialized before being used. To turn on LED, the voltage at Port B bits should be high. To turn off LED, the voltage at Port B should be low. LED Operation A B A B LED Zero biased (OFF) everse biased (OFF) Forward biased (ON) Zero biased (OFF) 6
Solution STAT OG $ PGC EQU $8 PBC EQU $87 PBDD EQU $8D PBD EQU $83 INIT #$,PGC #$8,PBC #$FF,PBDD ONLED #%,PBD END STAT Example : Set LED M6823 PB PB PB2 PB3 PB4 PB5 PB6 PB7 LED LED LED2 LED3 LED4 LED5 LED6 LED7 7
Example 2 Example 2: ead Switches & Output to LED A set of switches are connected to Port A, and a set of LEDs are connected to Port B in M6823. Write a program that reads the value in the switches and turns on the respective LEDs. 8
Switch Operation +5V Switch A OPEN A CLOSE Switch Operation +5V A Switch A OPEN CLOSE 9
Circuit Diagram +5V M6823 PA PB PA PB PA2 PB2 PA3 PB3 PA4 PB4 PA5 PB5 PA6 PB6 PA7 PB7 LED LED LED2 LED3 LED4 LED5 LED6 LED7 Port Assignments Port Address PGC $A PAC $AD PBC $AF PADD $A5 PBDD $A7 PCDD $A9 PAD $A PBD $A3 PCD $A9 2
Discussion Both Port A & B should be initialized before being used. When the switch is OPEN, 5V is passed to M6823 (logic high). When the switch is CLOSE, V is passed to M6823 (logic low). Solution Initialize Ports INIT #$,PGC #$8,PAC #$8,PBC #$,PADD #$FF,PBDD 2
Solution Solve Problem LOOP PAD,D D,PBD BA LOOP Solution Complete Program STAT OG $ PGC EQU $A PAC EQU $AD PBC EQU $AF PADD EQU $A5 PBDD EQU $A7 PAD EQU $A PAD EQU $A3 INIT #$,PGC #$8,PAC #$8,PBC #$,PADD #$FF,PBDD LOOP PAD,D D,PBD BA LOOP END STAT 22
Sample Output +5V M6823 PA PB PA PB PA2 PB2 LED LED LED2 PA3 PB3 LED3 PA4 PB4 LED4 PA5 PB5 LED5 PA6 PA7 PB6 PB7 LED6 LED7 PAD D PBD 7-Segment 23
7-Segment Consists of 7-LEDs arranged together. Can display numbers and characters. Each segment is marked with a letter (a to g). To display characters, need to turn on/off certain segments. Also has E (enable) pin to turn on/off 7-segment. Interfacing 7-Segment with M6823 To interface with M6823, each segment (a to g) is connected to a port in M6823. The E signal must also be connected to a port to enable/disable the 7-segment. 24
7-Segment Types There are two types of 7-segment displays: Common cathode. Common anode. Each type differs in how they behave with certain inputs. Common Cathode 7-Segment Input (from M6823) E E Input Output OFF ON OFF ON 25
Example: Interfacing CC 7-Segment with M6823 (No Transistor) M6823 B B B2 B3 B4 B5 B6 B7 a b c d e f g E (Common cathode) To turn on the 7-segment, E must be set to, and the input to be turned on must be set to. Example: Interfacing CC 7-Segment with M6823 (With Transistor) M6823 B B B2 B3 B4 B5 B6 a b c d e f g B7 To turn on the 7-segment, E must be set to, and the input to be turned on must be set to. By setting E to, the transistor is turned ON, providing a path to GND. E (Common cathode) 26
Displaying Numbers: CC7S (No Transistor) E a X b c d e f g Number X X X X X X None 2 3 4 5 6 7 8 9 Displaying Numbers: CC7S (with Transistor) E a X b c d e f g Number X X X X X X None 2 3 4 5 6 7 8 9 27
Common Anode 7-Segment E Input (to M6823) E Input Output OFF OFF ON OFF Example: Interfacing CA 7-Segment with M6823 M6823 B B B2 B3 B4 B5 B6 B7 a b c d e f g E (Common anode) To turn on the 7-segment, E must be set to, and the input to be turned on must be set to. 28
Displaying Numbers: CA7S (No Transistor) E a X b c d e f g Number X X X X X X None 3 4 5 6 7 8 9 Example 29
Example: Displaying C on 7-Seg M6823 B B B2 B3 B4 B5 B6 a= b= c= d= e= f= g= B7 E= #$,PGC #$8,PBC #$FF,PBDD ULANG #$B9,PBD BA ULANG (Common cathode) Displaying More Numbers/Characters 7-Segments can also be grouped together to display multiple numbers/characters. Usually done using a technique called multiplexing. 3
Interfacing 2 7-Segments with M6823 M6823 B B B2 a b c a b c B3 d d B4 e e B5 f f B6 g g B7 A A E E2 (Common cathode) Example 2 3
Example: Displaying on Multiple 7-Segs Write a program to display 2 on 2 7- Segment displays. The circuit diagram is shown. Example: Displaying 2 on 2 7-Segments M6823 B B B2 a b c a b c B3 d d B4 e e B5 f f B6 g g B7 A A E E2 (Common cathode) 32
Step : Init Ports #$,PGC #$8,PAC #$8,PBC #$FF,PADD #$FF,PBDD Step 2: Activate E2, Send First Number #$,PAD * activate E2 #$5B,PBD * display 2 BS DELAY * delay for a while to * allow 7-seg to * turn on. 33
Example: Displaying 2 on 2 7-Segments B= a a B= b b B2= c c B3= B4= d e OFF d e B5= f f B6= g g B7 A A E = (off) E2 = (on) (Common cathode) M6823 Step 2: Activate E, Send Second Number #$2,PAD * activate E #$6,PBD * display BS DELAY * delay for a while to * allow 7-seg to * turn on. 34
Example: Displaying 2 on 2 7-Segments B= a a B= b b B2= c c B3= B4= d e d e OFF B5= f f B6= g g B7 A A E = (on) E2 = (off) (Common cathode) M6823 Step 3: Activate E2 Back, Send First Number Again #$,PAD * activate E2 #$5B,PBD * display 2 BS DELAY * delay for a while to * allow 7-seg to * turn on. 35
Example: Displaying 2 on 2 7-Segments B= a a B= b b B2= c c B3= B4= d e OFF d e B5= f f B6= g g B7 A A E = (off) E2 = (on) (Common cathode) M6823 Discussion Using multiplexing, only one digit may be turned on at one time. But, if the delay is fast enough (<ms), our eyes won t be able to catch the change. 36
Example: Displaying 2 on 2 7-Segments M6823 B B B2 a b c a b c B3 d d B4 e e B5 f f B6 g g B7 A A E E2 (Common cathode) Complete Program OG $8C DELAY MOVE.L #5,D7 DELLOOP SUB.L #,D7 CMP.L #,D7 BNE DELLOOP TS STAT OG $8D INIT #$,PGC #$8,PAC #$8,PBC #$3,PADD #$7F,PBDD BEGIN #$,PAD #$5B,PBD BS DELAY PGC EQU $ PADD EQU $5 PBDD EQU $7 PCDD EQU $9 PAD EQU $ PBD EQU $3 PCD EQU $9 PAC EQU $D PBC EQU $F BS BA END #$2,PAD #$6,PBD DELAY BEGIN STAT 37
Example 2 Example: Displaying on 5 7-Segs. A set of 7-segment displays are connected on Port A and Port B in M6823. Write a program to display the message HELLO on the 7-segment display. 38
Circuit Diagram M6823 A A A2 A3 A4 A5 A6 A7 B B B2 B3 B4 B5 B6 B7 E4 E3 E2 E E Algorithm Turn on E4, Display H. Delay for a while. Turn on E3, Display E. Delay for a while. Turn on E2, Display L. Delay for a while. Turn on E, Display L. Delay for a while. Turn on E, Display O. Delay for a while. Do E4 again. 39
Character H A = B = C = D = E = F = G = O #%,PBD #$76,PBD Character E A = B = C = D = E = F = G = O #%,PBD #$79,PBD 4
Character L A = B = C = D = E = F = G = O #%,PBD #$39,PBD Character H A = B = C = D = E = F = G = O #%,PBD #$3F,PBD 4
Program OG $8C DELAY MOVE.L #5,D7 * 8 MS DELAY DELLOOP SUB.L #,D7 CMP.L #,D7 BNE DELLOOP TS STAT OG $8D PGC EQU $ PADD EQU $5 PBDD EQU $7 PAD EQU $ PBD EQU $3 PAC EQU $D PBC EQU $F INIT #$,PGC #$8,PAC #$8,PBC #$FF,PADD #$FF,PBDD HELLO #$F,PAD * ACTIVATE E4 #$76,PBD * DISPLAY H BS DELAY #$7,PAD * ACTIVATE E3 #$79,PBD * DISPLAY E BS DELAY #$B,PAD * ACTIVATE E2 #$39,PBD * DISPLAY L BS DELAY #$D,PAD * ACTIVATE E #$39,PBD * DISPLAY L BS DELAY #$E,PAD * ACTIVATE E #$3F,PBD * DISPLAY O BS DELAY BA END HELLO STAT 7-Segment + BCD Decoder 42
7-Segment + BCD Decoder A BCD 7-Segment decoder can be used to simplify the interface to M6823. Just send a BCD number, and it will be automatically displayed at 7-segment. Also reduces the number of connections required to display 7-segment values. Example: 7-Segment + BCD Decoder M6823 B B B2 B3 B4 BCD 7-Seg Decoder a b c d e a b c d e B5 f f B6 g g B7 A A E E2 (Common cathode) 43
BCD Decoder I/O B3 B2 B B Number 2 3 4 5 6 7 8 9 Example 3 44
Displaying 2 on 7-Segments A circuit is wired as in the next figure. Write a program that displays 2 on the 7-Segment. Example: 7-Segment + BCD Decoder M6823 B B B2 B3 B4 B5 BCD 7-Seg Decoder a b c d e f a b c d e f B6 g g B7 A A E E2 (Common cathode) 45
Step : Init Ports #$,PGC #$8,PAC #$8,PBC #$FF,PADD #$FF,PBDD Step 2: Activate E2, Send First Number #$,PAD * activate E2 #$2,PAD * display 2 BS DELAY * delay for a * while to allow 7-seg * to turn on. 46
Example: Displaying 2 on 2 7-Segments B= B= B2= B3= B4 BCD 7-Seg Decoder a b c d e OFF a b c d e B5 f f B6 g g B7 (Common cathode) A E = (off) A E2 = (on) M6823 Step 2: Activate E, Send Second Number #$2,PAD * activate E #$,PAD * display BS DELAY * delay for a while * to allow 7-seg * to turn on. 47
Example: Displaying 2 on 2 7-Segments B= B= B2= B3= B4= BCD 7-Seg Decoder a b c d e a b c d e OFF B5= f f B6= g g B7 (Common cathode) A E = (on) A E2 = (off) M6823 Step 4: Activate E2 Back, Send First Number Again #$,PAD * activate E2 #$2,PAD * display 2 BS DELAY * delay for a * while to allow 7-seg * to turn on. 48
Example: Displaying 2 on 2 7-Segments B= B= B2= B3= B4 BCD 7-Seg Decoder a b c d e OFF a b c d e B5 f f B6 g g B7 (Common cathode) A E = (off) A E2 = (on) M6823 Discussion Using multiplexing, only one digit may be turned on at one time. But, if the delay is fast enough (<ms), our eyes won t be able to catch the change. 49
Example: Displaying 2 on 2 7-Segments M6823 B B B2 B3 B4 B5 BCD 7-Seg Decoder a b c d e f a b c d e f B6 g g B7 A A E E2 (Common cathode) Complete Program OG $8C DELAY MOVE.L #5,D7 DELLOOP SUB.L #,D7 CMP.L #,D7 BNE DELLOOP TS STAT OG $8D PGC EQU $ PADD EQU $5 PBDD EQU $7 PCDD EQU $9 PAD EQU $ PBD EQU $3 PCD EQU $9 PAC EQU $D PBC EQU $F INIT #$,PGC #$8,PAC #$8,PBC #$FF,PADD #$FF,PBDD BEGIN #$,PAD #$2,PBD BS DELAY #$2,PAD #$,PBD BS DELAY BA BEGIN END STAT 5
DC Motor Controlling DC Motors Has two terminals (positive/negative), connected to DC voltage. If positive voltage applied at positive terminal, motor moves clockwise. If negative voltage applied at positive terminal, motor moves anti-clockwise. 5
DC Motor +2V +2V + - + - + with + = clockwise + with - = anti-clockwise Interfacing DC Motor with M6823 Single Direction +2V M6823 A A + A2 A3 A4 A5 - #$,PGC #$8,PAC #$FF,PADD #$,PAD A6 A7 52
Interfacing DC Motor with M6823 (Two Directions) +2V A T T2 A2 + - A T4 T3 A3 PNP transistors are turned on by at base. NPN transistors are turned on by at base. Moving the Motor Clockwise #$,PGC #$8,PAC #$FF,PADD #%,PAD (Turn on T and T3) 53
Interfacing DC Motor with M6823 (Clockwise) +2V A T T2 A2 + - A T4 T3 A3 Positive meets positive, clockwise direction Moving the Motor Anti-clockwise #$,PGC #$8,PAC #$FF,PADD #%,PAD (Turn on T2 and T4) 54
Interfacing DC Motor with M6823 (Anti-clockwise) +2V A T T2 A2 + - A T4 T3 A3 Positive meets negative, anti-clockwise direction Keypad 55
Keypad A set of switches. CPU determines what button pressed by scanning each column in turn. Need to be de-bounced after each key press: Done using de-bouncing subroutine. Keypad P P P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 56
Step : Initialization Lets say Port A is connected to keypad. #$,PGC #$8,PAC #$F,PADD Step 2 Scan st Column P= P P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 57
Step 2: Scan st Column COL BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD AND.B CMP.B BEQ CMP.B BEQ CMP.B BEQ CMP.B BEQ BNE PBD,D #$F,D #$,D IS #$2,D IS4 #$4,D IS7 #$8,D ISSTA COL2 IS #,D BS WAIT #9,D3 TAP # BA COL IS4 #4,D BS WAIT #9,D3 TAP # BA COL IS7 #7,D BS WAIT #9,D3 TAP # BA COL ISSTA #$,D BS WAIT #9,D3 TAP # BA COL * #9,D3 and TAP # are used as an example to display the output to screen. eplace it with your own code. Step 3 Scan 2 nd Column P P= P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 58
Step 3: Scan 2 nd Column COL2 BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS2 CMP.B #$2,D BEQ IS5 CMP.B #$4,D BEQ IS8 CMP.B #$8,D BEQ IS BNE COL3 IS2 #2,D BS WAIT #9,D3 TAP # BA COL IS5 #5,D BS WAIT #9,D3 TAP # BA COL IS8 #8,D BS WAIT #9,D3 TAP # BA COL IS #,D BS WAIT #9,D3 TAP # BA COL Step 4 Scan 3 rd Column P P P2= 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 59
Step 4: Scan 3 rd Column COL3 BCL.B #,PBD BCL.B #,PBD BSET.B #2,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS3 CMP.B #$2,D BEQ IS6 CMP.B #$4,D BEQ IS9 CMP.B #$8,D BEQ ISHASH BNE COL IS3 #3,D BS WAIT #9,D3 TAP # BA COL IS6 #6,D BS WAIT #9,D3 TAP # BA COL IS9 #9,D BS WAIT #9,D3 TAP # BA COL ISHASH #,D BS WAIT #9,D3 TAP # BA COL Complete Program OG $8C DELAY #$F,D4 NEXTDEL SUB.B #,D4 BNE NEXTDEL WAIT PBD,D2 AND.B #$F,D2 CMP.B #$,D2 BNE WAIT TS STAT OG $8D PGC EQU $ PAC EQU $D PBC EQU $F PADD EQU $5 PBDD EQU $7 PCDD EQU $9 PAD EQU $ PBD EQU $3 PCD EQU $9 INIT #$,PGC #$8,PAC #$8,PBC #$F,PBDD #$,PBD COL BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS CMP.B #$2,D BEQ IS4 CMP.B #$4,D BEQ IS7 CMP.B #$8,D BEQ ISSTA BNE COL2 IS #,D BS WAIT #9,D3 TAP # BA COL IS4 #4,D BS WAIT #9,D3 TAP # BA COL IS7 #7,D BS WAIT #9,D3 TAP # BA COL ISSTA #$,D BS WAIT #9,D3 TAP # BA COL END STAT COL2 BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS2 CMP.B #$2,D BEQ IS5 CMP.B #$4,D BEQ IS8 CMP.B #$8,D BEQ IS BNE COL3 IS2 #2,D BS WAIT #9,D3 TAP # BA COL IS5 #5,D BS WAIT #9,D3 TAP # BA COL IS8 #8,D BS WAIT #9,D3 TAP # BA COL IS #,D BS WAIT #9,D3 TAP # BA COL COL3 BCL.B #,PBD BCL.B #,PBD BSET.B #2,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS3 CMP.B #$2,D BEQ IS6 CMP.B #$4,D BEQ IS9 CMP.B #$8,D BEQ ISHASH BNE COL IS3 #3,D BS WAIT #9,D3 TAP # BA COL IS6 #6,D BS WAIT #9,D3 TAP # BA COL IS9 #9,D BS WAIT #9,D3 TAP # BA COL ISHASH #,D BS WAIT #9,D3 TAP # BA COL 6
Example Example 4 Pressed P P P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 6
Step 2: Scan st Column COL BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD AND.B CMP.B BEQ CMP.B BEQ CMP.B BEQ CMP.B BEQ BNE PBD,D #$F,D #$,D IS #$2,D IS4 #$4,D IS7 #$8,D ISSTA COL2 IS #,D BS WAIT #9,D3 TAP # BA COL IS4 #4,D BS WAIT #9,D3 TAP # BA COL IS7 #7,D BS WAIT #9,D3 TAP # BA COL ISSTA #$,D BS WAIT #9,D3 TAP # BA COL Example 8 Pressed P P P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 62
Step 3: Scan 2 nd Column COL2 BCL.B #,PBD BCL.B #2,PBD BSET.B #,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS2 CMP.B #$2,D BEQ IS5 CMP.B #$4,D BEQ IS8 CMP.B #$8,D BEQ IS BNE COL3 IS2 #2,D BS WAIT #9,D3 TAP # BA COL IS5 #5,D BS WAIT #9,D3 TAP # BA COL IS8 #8,D BS WAIT #9,D3 TAP # BA COL IS #,D BS WAIT #9,D3 TAP # BA COL Example 6 Pressed P P P2 2 3 P4 4 5 6 P5 7 8 9 P6 * # P7 63
Step 4: Scan 3 rd Column COL3 BCL.B #,PBD BCL.B #,PBD BSET.B #2,PBD PBD,D AND.B #$F,D CMP.B #$,D BEQ IS3 CMP.B #$2,D BEQ IS6 CMP.B #$4,D BEQ IS9 CMP.B #$8,D BEQ ISHASH BNE COL IS3 #3,D BS WAIT #9,D3 TAP # BA COL IS6 #6,D BS WAIT #9,D3 TAP # BA COL IS9 #9,D BS WAIT #9,D3 TAP # BA COL ISHASH #,D BS WAIT #9,D3 TAP # BA COL Delay Subroutine 64
Delay Subroutine In some applications, we may need to delay the output before executing next instruction. Can be achieved using delay subroutine: Does some meaningless repetitive task over and over. Wastes processing time of M68k. Can be set to repeat until desired delay is achieved. Delay Subroutine Example DELAY MOVE.L #xxx,dn LOOP SUB.L #,Dn CMP.L #,Dn BNE LOOP TS 65
Calculating The Delay To calculate delay, you need to know the time required to execute each instruction: Instruction Clock Cycles to Complete Time (M68k @MHz) Executed n times. MOVE.L 2.2s SUB.L 6.6s CMP.L 4.4s BNE.s TS 6.6s M68k @ MHz T = /MHz = x -7 secs. Calculating the Delay M68k MHz For sec.,,, clock cycles are required.,, = 2 + 6 + (6 + 4 + )n,, = 28 + 4n n = (,, 28)/4 n = (,, 28)/4 = 249,999 66
Delay Subroutine Example s DELAY MOVE.L #249999,D6 LOOP SUB.L #,D6 CMP.L #,D6 BNE LOOP TS Calculating The Delay.25s To calculate delay, you need to know the time required to execute each instruction: Instruction Clock Cycles to Complete Time (M68k @MHz) Executed n times. MOVE.L 2.2s SUB.L 6.6s CMP.L 4.4s BNE.s TS 6.6s M68k @ MHz T = /MHz = x -7 secs. 67
Calculating the Delay For.25 sec., 2,5, clock cycles are required. 2,5, = 2 + 6 + (6 + 4 + )n 2,5, = 28 + 4n n = (2,5, 28)/4 n = (2,5, 28)/4 = 62,499 Delay Subroutine Example.25s DELAY MOVE.L #62499,D6 LOOP SUB.L #,D6 CMP.L #,D6 BNE LOOP TS 68
Implementing Delay STAT OG $9 INIT MOVEA.L #$,A6 * base address of pi/t #$8,$E(A6) * configure port B control reg to mode x #$FF,$6(A6) * configure port B data reg to o/p LOOP #$FF,$3 BS DELAY #$,$3 BS DELAY BA LOOP Turn on all LEDs, Wait second, Turn off all LEDs, Wait second. DELAY MOVE.L #249999,D7 DELLOOP SUB.L #,D7 CMP.L #,D7 BNE DELLOOP TS END STAT Conclusion 69
Conclusion The M6823 is a parallel interface used by M68k to connect with various devices. The M6823 has three ports, which can be configured to interface with many devices. To use the ports, it MUST be initialized first. Conclusion The delay subroutine is used to waste the CPU s time by telling it to do repetitive tasks. The delay format is basically the same, just adjust the counter to get the delay you want. 7
The End Please read: Antonakos, pg. 352-366 M6823 Datasheet Ablelogic, Abitec, VTES Manuals 7