Digital Fundamentals Introduction to Digital Signal Processing 1
Objectives List the essential elements in a digital signal processing system Explain how analog signals are converted to digital form Discuss the purpose of filtering Describe the sampling process State the purposes of analog-to-digital conversion Explain how several types of ADCs operate Explain the basic concepts of a digital signal processor (DSP) Describe the basic architecture of a DSP Name some of the functions that a DSP performs State the purpose of digital-to-analog conversion Explain how DACs operate 2
Digital Signal Processing Basics ADC Analog-to-Digital Conversion - DSP Data Signal Processor DAC Data to-analog Conversion Figure 14--1 An original analog signal (sine wave) and its stairstep approximation. 3
Figure 14--2 Basic block diagram of a digital signal processing system. 4
Converting Analog Signals to Digital Filtering first step before an A/D conversion, removes unwanted frequencies, called pre-filtering Sampling The process of converting an analog signal into a series of impulses representing the amplitude of the signal at a given time Sampling frequency should be at least twice the highest analog frequency Nyquist limit or Nyquist frequency if the sampling rate is less than 2 times the highest analog frequency and effect called aliasing where frequencies are generated by the sampling process that cause interference problems Hold After the signal is sampled it is applied to a hold circuit 5
Figure 14--3 Simple illustration of the sampling process. 6
Figure 14--4 Simple illustration of the sampling theory. 7
Figure 14--5 A basic illustration of the condition f sample < 2f a(max). 8
Figure 14--6 aliasing error. After low-pass filtering, the frequency spectra of the analog and the sampling signals do not overlap, thus eliminating 9
Converting Analog Signals to Digital continued Convert the sample-hold signal to a digital circuit Quantization during the quantization process a binary code is assigned to each sampled value 10
Figure 14--7 Illustration of a sample-and-hold operation. 11
Figure 14--8 Basic function of an analog-to-digital (ADC) converter (The binary codes and number of bits are arbitrarily chosen for illustration only). The ADC output waveform that represents the binary codes is also shown. 12
Figure 14--9 reference. Sample-and-hold output waveform with four quantization levels. The original analog waveform is shown in light gray for 13
Figure 14--10 The reconstructed waveform in Figure 14-9 using four quantization levels (2 bits). The original analog waveform is shown in light gray for reference. 14
Figure 14--11 for reference. Sample-and-hold output waveform with sixteen quantization levels. The original analog waveform is shown in light gray 15
Figure 14--12 The reconstructed waveform in Figure 14-11 using sixteen quantization levels (4 bits). The original analog waveform is shown in light gray for reference. 16
Analog-to-Digital Conversion Methods Flash (Simultaneous) Analog-to-Digital Conversion Dual-Slope Analog-to-Digital Conversion Successive-Approximation Analog-to- Digital Converter ADC0804 Analog-to-Digital Converter Sigma-Delta Analog-to-digital Converter 17
Figure 14--13 The operational amplifier (op-amp). 18
Figure 14--14 A 3-bit flash ADC. 19
Figure 14-15 Example 14-1 Determine the digital output for the signal presented below. Sampling of values on a waveform for conversion to binary code. Figure 14--16 Resulting digital outputs for sample-and-hold values. Output D 0 is the LSB of the 3-bit binary code. 20
Figure 14--17 Basic dual-slope ADC. 21
Figure 14--18 Illustration of dual-slope conversion. 22
Figure 14--19 Successive-approximation ADC. 23
Figure 14--20 Illustration of the successive-approximation conversion process. 24
Figure 14--21 The ADC0804 analog-to-digital converter. 25
Figure 14--22 A simplified illustration of sigma-delta analog-to-digital conversion. 26
Figure 14--23 Partial functional block diagram of a sigma-delta ADC. 27
Figure 14--24 One type of sigma-delta ADC. 28
Figure 14--25 A method for testing ADCs. 29
Figure 14--26 Illustrations of analog-to-digital conversion errors. 30
Figure 14-27 Example 14-2: Identify the problem and the most probable fault 31
DSP (Digital Signal Processor) Programming Typically programmed in Assembly language or in C Very specialized applications with much redundancy DSPs instruction set smaller than a microprocessors 32
DSP Applications Telecommunications Music Processing Speech Generation and Recognition Radar Image processing Filtering 33
Figure 14-28 The DSP has a digital input and produces a digital output. 34
Figure 14--29 Many DSPs use the Harvard architecture (two memories). 35
Figure 14--30 General block diagram of the TMS320C6000 series DSP. 36
Figure 14--31 The four fetch phases of the pipeline operation. 37
Figure 14--32 The two decode phases of the pipeline operation. 38
Figure 14--33 The five execute phases of pipeline operation. 39
Figure 14--34 A 352-pin BGA package. 40
Figure 14--35 Simplified block diagram of a digital cellular phone. 41
TMS320C6000 Series DSP CPU with 64 general purpose 32 bit registers in C64xx CPU with 32 general purpose 32 bit registers in C62xx and C67xx 8 functional units 2 each for multipliers, logic, shift, and data moves Packaged as a 352-pin ball grid array with CMOS technology 42
Digital-to-Analog Conversion Methods Binary-Weighted-Input Digital-to-Analog Converter R/2R Ladder Digital-to-Analog Converter 43
Figure 14--36 A 4-bit DAC with binary-weighted inputs. 44
Figure 14-37 Example 14-3: Determine the output for the following DAC Figure 14--38 Output of the DAC in Figure 14-37. 45
Figure 14--39 An R/2R ladder DAC. 46
Figure 14--40 Analysis of the R/2R ladder DAC. 47
Figure 14--41 Basic test setup for a DAC. 48
D/A Conversion Errors Nonmonotonicity Differential Nonlinearity Low or High Gain Offset Error 49
Figure 14--42 Illustrations of several digital-to-analog conversion errors. 50
Figure 14-43 Example 14-5: Identify the type of error, and suggest an approach to isolate the fault 51
Figure 14--44 The reconstruction filter smooths the output of the DAC. 52