CVOUT Vcc2 TRAP SWITCH Y/C MIX INTERNAL TRAP DELAY LPF LPF SIN-PULSE NPIN SCIN

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R G B SC NP BFOUT MATRIX GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT RGB Encoder CXA20M Description The CXA20M is an encoder IC that converts analog RGB signals a composite video signal. This IC has various pulse generars necessary for encoding. Composite video outputs and Y/C outputs for the S terminal are obtained just by inputting composite sync, subcarrier and analog RGB signals. It is best suited image processing of personal computers and video games. Compared the CXA1645M, the CXA20M has superior points as follows: 1. The number of parts reduced (5 parts) Clamp capacir Regular capacir resisr Resisr for filter 2. External parts reduced by the internal (External can be also selected) 3. Higher band of R, G, B OUT Features Single 5V power supply Compatible with both NTSC and PAL systems Built-in Ω drivers (RGB output, composite video output, Y output, C output) Both sine wave and pulse can be input as a subcarrier. Built-in band-pass filter for the C signal and delay line for the Y signal Built-in R-Y and B-Y modular circuits Built-in PAL alternate circuit Burst flag generar circuit Half H killer circuit 24 pin SOP (Plastic) Applications Video games and personal computers Structure Bipolar silicon monolithic IC Absolute Maximum Ratings Supply voltage VCC 12 V Operating temperature Topr 20 + C Srage temperature Tstg 65 +150 C Allowable power dissipation PD 780 mw Input pin applied voltage R, G, B, SC, NP, and Vcc pins voltage or below, GND pin voltage or above Recommended Operating Condition Supply voltage VCC1, 2 5.0 ± 0.25 V Block Diagram and Pin Configuration 24 23 22 21 20 19 18 16 15 14 13 R-OUT G-OUT B-OUT VIDEO OUT Y/C MIX TERNAL SWITCH DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE PULSE GEN 1 2 3 4 5 6 7 8 9 10 11 12 Sony reserves the right change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. 1 E96X23

1µ 1µ 350µ CXA20M Pin Description Pin No. Symbol Pin voltage Equivalent circuit 1 0V Description Ground for all circuits other than RGB, composite video and Y/C output circuits. The leads GND2 should be as short and wide as possible. VCC1 100Ω 2 3 4 R G B Black level when clamped 2 3 4 2V ICLP 100Ω Analog RGB signal inputs. Input at 100% = 1Vp-p (max.). To minimize clamp error, input at as low impedance as possible. ICLP turns ON only in the burst flag period. 5 NO CONNECTION VCC1 6 SC 6 10P 40k 2.5V 100µ Subcarrier input. Input 0.4 5.0Vp-p sine wave or pulse. Refer Notes on Operation, Nos. 2 and 4. 80k VCC1 7 NP 1.7V when open 7 3k 68k Pin for switching between NTSC and PAL modes. NTSC: VCC, PAL: GND 32k 800 VCC1 8 BFOUT H : 3.6V L : 3.2V 8 1.6k BF pulse moniring output. Incapable of driving a Ω load. 65µ 65µ 2

CXA20M Pin No. Symbol Pin voltage Equivalent circuit Description 9 NO CONNECTION VCC1 10 2.2V 10 4k 40k Composite sync signal input. Input TTLlevel voltages. L ( 0.8V): period H ( 2.0V) 2.2V 11 12 5.0V 13 14 NO CONNECTION Power supply for all circuits other than RGB, composite video and Y/C output circuits. Refer Notes on Operation, Nos. 3 and 8. NO CONNECTION NO CONNECTION 15 COUT 1.6V 15 20Ω 3µ 2.8V Vcc2 2.2k GND2 Chroma signal output. Capable of driving a Ω load. Refer Notes on Operation, Nos. 5 and 7. 16 YOUT Black level 1.35V 16 20Ω 3µ 2.8V Vcc2 2.2k GND2 Y signal output. Capable of driving a Ω load. Refer Notes on Operation, Nos. 5 and 7. 3

CXA20M Pin No. Symbol Pin voltage Equivalent circuit Description Y Black level 2.13V 100Ω 1.5k 30k Y 100µ Pin for reducing cross color caused by the subcarrier frequency component of the Y signal. When the CVOUT pin is in use, connect a capacir or a capacir and an inducr in series between Y and GND. Decide capacitance and inductance, giving consideration cross color and the required resolution. No influence on the YOUT pin. Internal can be also used. Refer Notes on Operation, No. 6. 18 NO CONNECTION 19 VCC2 5.0V Power supply for RGB, composite video and Y/C output circuits. Decouple this pin with a large capacir of 10µF or above as a high current flows. Refer Notes on Operation, Nos. 3 and 8. 20 CVOUT Black level 0.97V 20 20Ω 3µ 2.8V Vcc2 2.2k GND2 Composite video signal output. Capable of driving a Ω load. Refer Notes on Operation, Nos. 5 and 7. 21 22 23 BOUT GOUT ROUT Black level 1.2V 21 22 23 20Ω 3µ 2.8V Vcc2 2.2k GND2 Analog RGB signal outputs. Capable of driving a Ω load. Refer Notes on Operation, Nos. 5 and 7. 24 GND2 0V Ground for RGB, composite video and Y/C output circuits. The leads should be as short and wide as possible. 4

CXA20M Electrical Characteristics (Ta = 25 C, VCC = 5V, See the Electrical Characteristics Measurement Circuit.) Item Symbol S1 S2 S3 S4 Measurement R G SC NP pin B Measurement conditions Min. Typ. Max. Unit Current consumption 1 Current consumption 2 ICC1 ICC2 2.V SG4 5V SG5 ICC1 ICC2 No input signal, SG5: C TTL level, SG4: S wave 3.58MHz Fig. 1 67 40 ma (R, G, BOUT) RGB output voltage VO (R) VO (G) VO (B) SG2 2V D E F : DC direct coupling 3.2VDC, f = 200kHz Pin 9 = Clamp voltage Fig. 2 0.64 0.69 0.72 V RGB output frequency characteristics fc (R) fc (G) fc (B) SG2 2V D E F : DC direct coupling 3.2VDC, f = 27MHz/200kHz Pin 9 = Clamp voltage Fig. 3 5 3.2 5 3.4 5 3.8 db db db (YOUT) Output sync level R100%: Y level G100%: Y level B100%: Y level White 100%: Y level VO (YS1/2) VO (YR1/2) VO (YG1/2) VO (YB1/2) VO (YW1/2) 0V 5V SG5 B : 100% color bar input, (Max.) SG5: C TTL level Fig. 4 0.24 0.19 0.38 0.06 0.63 0.27 0.215 0.405 0.076 0.682 0.31 0.24 0.43 0.09 0.79 Vp-p Output frequency characteristics fc (Y1/2) 0V 5V 2V : DC direct coupling 3.2VDC, f = 5MHz/200kHz Pin 9 = Clamp voltage 1 0.13 db (CVOUT) Output sync level R100%: Y level G100%: Y level B100%: Y level White 100%: Y level VO (YS1/2) VO (YR1/2) VO (YG1/2) VO (YB1/2) VO (YW1/2) 0V 5V SG5 C : 100% color bar input, (Max.) SG5: C TTL level Fig. 4 0.22 0.18 0.35 0.055 0.61 0.24 0.208 0.376 0.071 0.66 0.27 0.23 0.41 0.085 0. Vp-p V V V V Output frequency characteristics fc (Y1/2) 0V 5V 2V Clamp voltage: voltage appearing at Pin 9 when C is input. 5 : DC direct coupling 3.2VDC, f = 5MHz/200kHz Pin 9 = Clamp voltage 3.3 1.53 db

CXA20M Item Symbol S1 S2 S3 S4 Measurement R G SC NP pin B Measurement conditions Min. Typ. Max. Unit (COUT) Burst level VO (BN1/2) 0.24 0.282 0.34 Vp-p R chroma ratio R phase G chroma ratio G phase B chroma ratio B phase Burst width R/BN1/2 θr1/2 G/BN1/2 θg1/2 B/BN1/2 θb1/2 tw (B) 1/2 SG4 5V SG5 A : 100% color bar input, (Max.) SG4: S wave, 3.58MHz SG5: C TTL level Fig. 5 2.8 3. 3.6 99 104 111 deg 2.7 3.06 3.8 232 238 246 deg 1.8 2.1 2.35 341 348 356 deg 2.35 2.6 2.8 µs Burst position td (B) 1/2 0.35 0.68 0.95 µs Carrier leak VL1/2 SG4 5V SG5 : No signal, SG4: S wave, 3.58MHz SG5: C TTL level 3.58MHz component measured. Fig. 6 6 29 mvp-p 6

CXA20M Item Symbol S1 S2 S3 S4 Measurement R G SC NP pin B Measurement conditions Min. Typ. Max. Unit (CVOUT) Burst level VO (BN1/2) 0.22 0.264 0.32 Vp-p R chroma ratio R phase G chroma ratio G phase B chroma ratio B phase Burst width R/BN1/2 θr1/2 G/BN1/2 θg1/2 B/BN1/2 θb1/2 tw (B) 1/2 SG4 5V SG5 : 100% color bar input, (Max.) SG4: S wave, 3.58MHz SG5: C TTL level Fig. 5 2.95 3.3 3.7 99 105 111 deg 2.9 3.23 3.5 233 239 247 deg 1.8 2.02 2.3 342 349 357 deg 2.35 2.52 2.8 µs Burst position td (B) 1/2 0.35 0.66 0.95 µs Carrier leak VL1/2 SG4 5V SG5 C : No signal, SG4: S wave, 3.58MHz SG5: C TTL level 3.58MHz component measured. Fig. 6 6 29 mvp-p PAL burst level ratio PAL burst phase K (BP1/2) θpal1/2 θxpal1/2 SG4 GND SG5 : No signal, SG4: S wave, 4.43MHz SG5: C TTL level Fig. 6 0.9 1.0 1.1 129 138 146 214 221 228 deg deg Internal attenuation frequency f 0V 5V 2V C : DC direct coupling 3.2VDC f = 3.58MHz/200kHz Y = 3.32k 30 21.6 4 db 7

MATRIX CXA20M Electrical Characteristics Measurement Circuit 5V F E D C 5V B A 220µ 220µ 220µ 220µ 3.32k 220µ 220µ open 0.01µ Icc2 S5 GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT 24 23 22 21 20 19 18 16 15 14 13 R-OUT G-OUT B-OUT VIDEO OUT SWITCH Y/C MIX TERNAL DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE 1 2 3 4 5 6 7 8 9 10 11 12 R G B SC NP BFOUT S1 S1 S1 2.V 0.1µ 0.1µ SG2 0.1µ S2 SG4 S S3 5V S4 SG5 C Icc1 2V 5V 0.01µ PAL NTSC 8

CXA20M Measuring Signals and Output Waveforms SG4 SC SG5 64µs 4.5µs Fig. 1 f = 3.58MHz 2.0V 0.8V SG5 R SG2 G 64µs 4.5µs 10µs 2.0V 0.8V 3 B R G B DEF point ROUT GOUT BOUT Fig. 2 2.5V f = 200kHz VO BC point YOUT CVOUT SG4 Vo (YW) Vo (YG) Vo (YR) Fig. 4 Vo (YB) Vo (YS) 3 R G B 2.5V f = 200kHz/27MHz SC SG5 4.5µs 64µs f = 3.58MHz 2.0V 0.8V DEF BC point ROUT GOUT BOUT YOUT CVOUT Fig. 3 fc = 20log VO Vo (27MHz) Vo (200kHz) R SG2 G 10µs B SG4 SC SG4 C point CVOUT A point 4.5µs Vo (BN) Vo (BN) 64µs VL VL f = 3.58MHz/ 4.43MHz 2.0V 0.8V Vo (BN) K (BP) = Vo (BN) Vo (BN) Vo (BN) C point CVOUT td (B) A point COUT VO (BN) tw (B) VO (BN) VO (CG) VO (CR) VO (CB) tw (B) VO (CB) VO (CG) VO (CR) Fig. 5 VO (CR) R/BN = VO (BN) VO (CG) G/BN = VO (BN) VO (CB) B/BN = VO (BN) COUT Fig. 6 9

MATRIX MATRIX CXA20M Application Circuit (NTSC internal mode) 220µ 3.32k/1% 220µ 220µ 220µ for 220µ 220µ 240 0.01µ NTSC 43 GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT 24 23 22 21 20 19 18 16 15 14 13 Vcc +5V R-OUT G-OUT B-OUT VIDEO OUT Y/C MIX TERNAL SWITCH DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE 1 2 3 4 5 6 7 8 9 10 11 12 R G B SC NP BFOUT 0.1µ 0.1µ 0.1µ 0.01µ Metal film resisr ±1% Application Circuit (NTSC external mode) 220µ 220µ 220µ 220µ 220µ 220µ 240 0.01µ 43 GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT 24 23 22 21 20 19 18 16 15 14 13 Vcc +5V R-OUT G-OUT B-OUT VIDEO OUT Y/C MIX TERNAL SWITCH DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE 1 2 3 4 5 6 7 8 9 10 11 12 R G B SC NP BFOUT 0.1µ 0.1µ 0.1µ 0.01µ Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due same. 10

MATRIX MATRIX CXA20M Application Circuit (PAL internal mode) 220µ 2.61k/1% 220µ 220µ 220µ for 220µ 220µ 240 0.01µ PAL 43 GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT 24 23 22 21 20 19 18 16 15 14 13 Vcc +5V R-OUT G-OUT B-OUT VIDEO OUT Y/C MIX TERNAL SWITCH DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE 1 2 3 4 5 6 7 8 9 10 11 12 R G B SC NP BFOUT 0.1µ 0.1µ 0.1µ 0.01µ Metal film resisr ±1% Application Circuit (PAL external mode) 220µ 220µ 220µ 220µ 220µ 220µ 240 0.01µ 43 GND2 ROUT GOUT BOUT CVOUT Vcc2 Y YOUT COUT 24 23 22 21 20 19 18 16 15 14 13 Vcc +5V R-OUT G-OUT B-OUT VIDEO OUT Y/C MIX TERNAL SWITCH DELAY ADD BPF R-Y B-Y REGULATOR CLAMP S-PULSE 1 2 3 4 5 6 7 8 9 10 11 12 R G B SC NP BFOUT 0.1µ 0.1µ 0.1µ 0.01µ Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due same. 11

CXA20M Description of Operation Analog RGB signals input from Pins 2, 3 and 4 are clamped in the clamping circuit and output from Pins 23, 22 and 21, respectively. The matrix circuit performs operations on each input signal, generating luminance signal Y and color difference signals R-Y and B-Y. The Y signal enters the delay line adjust delay time with the chroma signal C. Then, after addition of the C signal input from Pin 10, the Y signal is output from Pin 16. A subcarrier input from Pin 6 is input the phase shifter, where its phase is sfited 90. Then, the subcarrier is input the modulars and modulated by the R-Y signal and the B-Y signal. The modulated subcarriers are mixed, sent the band-pass filter eliminate higher harmonic components and finally output from Pin 15 as the C signal. At the same time, Y and C signals are mixed and output from Pin 20 as the composite video signal. Burst Signal The CXA20M generates burst signals at the timing shown below according the composite sync signal input. H synchronization (TTL level) td (B) tw (B) C VIDEO OUT Burst signal COUT V synchronization td (B) tw (B) ODD EVEN C VIDEO OUT ODD EVEN Synchronizing signal Burst signal 12

CXA20M Notes on Operation Be careful of the following when using the CXA20M. 1. Be sure that analog RGB signals are input at maximum and have low enough impedance. High impedance may affect color saturation, hue, etc. Inputting RGB signals in excess of 1.3Vp-p may disable the clamp operation. 2. The SC input (Pin 6) can be either a sine wave or a pulse in the range from 0.4 5.0Vp-p. However, when a pulse is input, its phase may be shifted several degrees from that of the sine wave input. In the IC, the SC input is biased 1/2 VCC. Accordingly, when a 5.0Vp-p pulse is input and the duty facr deviates from 50%, High- and Low-level pulse voltages may exceed VCC and GND in the IC, which causes subcarrier disrtion. In such a case, be very careful that the duty facr keeps 50%. 3. When designing a printed circuit board pattern, pay careful attention the routing of the VCC and GND leads. To decouple the VCC pin, use tantalum, ceramic or other capacirs with good frequency characteristics. Ground the capacirs by connections shown below as closely each IC pin as possible. Try design the leads as short and wide as possible. VCC1... VCC2... GND2 Design the pattern so that VCC is connected GND via a capacir at the shortest distance. 4. SC and input pulses Attach a resisr and a capacir eliminate high-frequency components of SC (Fig. A) and (Fig. B) before input. 2.2k 5P 2.2k 47P Fig. A Fig. B Be careful not input pulses containing high-frequency components. Otherwise, high-frequency components may flow in VCC, GND and peripheral parts, resulting in malfunctions. 5. Connecting an external resisr the Ω driver output pin A capacitance of several dozen picofarads at each pin may start oscillation. To prevent oscillation, design the pattern so that a Ω resisr is mounted near the pin (see Fig. C). Make these leads short. Fig. C When any of the Ω driver output pins is not in use, leave it unconnected and design the pattern so that no parasitic capacitance is generated on the printed circuit board. 13

CXA20M 6. Y pin (Pin ) There are the following three means of reducing cross color generated by subcarrier frequency components contained in the Y signal. (1) Install a capacir of 30 68pF between Y and GND. Decide the capacitance by conducting image evaluation, etc., giving consideration both cross color and resolution. Relations between capacitance and picture quality are as follows: Capacitance Cross color Resolution 30pF 68pF Large Small High Low C (2) Connect a capacir C and an inducr L in series between Y and GND. When the subcarrier 1 frequency is f0, the values C and L are determined by the equation f0 =. Decide the values in 2π LC image evaluation, etc., giving consideration both cross color and resolution. Relations between inducr values and picture quality are as follows: Inducr value Small Large Cross color Resolution Large Small High Low C L For instance, L = 68µH and C = 28pF are recommended for NTSC. It is necessary select an inducr L with a sufficiently small DC resistance. Method (2) is more useful for achieving a higher resoluation than method (1). When an even higher resolution is necessary, use of the S terminal (YOUT and COUT) is recommended. (3) built in the IC can be used. Connect a resisr which determines between Y (Pin ) and Vcc. Refer Application Circuit. Be very careful of frequency characteristics and picture quality, and then use them. NTSC mode R = 3.32kΩ R PAL mode R = 2.61kΩ Vcc 7. Driving COUT (Pin 15), YOUT (Pin 16), CVOUT (Pin 20), and B.G.R OUT (Pins 21, 22 and 23) outputs In Pin Description, "Capable of driving a Ω load" means that the pin can drive a capacir +Ω +Ω load shown in the figure below. In other words, the pin is capable of driving a 150Ω load in AC. P Ω 220µF Ω 8. This IC employs a number of Ω driver pins, so oscillation is likely occur when measures described in Nos. 3 and 5 are not taken thoroughly. Be very careful of oscillation in printed circuit board design and carry out thorough investigations in the actual driving condition. 14

0.5 ± 0.2 5.3 0.1 + 0.3 7.9 ± 0.4 6.9 CXA20M Package Outline Unit: mm 24P SOP (PLASTIC) + 0.4 15.0 0.1 + 0.4 1.85 0.15 24 13 0.15 + 0.2 0.1 0.05 1 12 0.45 ± 0.1 1.27 + 0.1 0.2 0.05 ± 0.12 M PACKAGE STRUCTURE MOLDG COMPOUND EPOXY/PHENOL RES SONY CODE SOP-24P-L01 LEAD TREATMENT SOLDER PLATG EIAJ CODE SOP024-P-0300-A LEAD MATERIAL COPPER ALLOY / 42ALLOY JEDEC CODE PACKAGE WEIGHT 0.3g 15