WWW.STUDENTSFOCUS.COM + Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to Unit III 2. SKILLS ADDRESSED: Listening I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi Introduction to Unit III 45 Minutes Unit III-Lesson No.1/11 3.OBJECTIVE OF THIS LESSON PLAN: 4.OUTCOMES: To make the students learn the topics to be covered in unit III. i. Learn the major topics in Unit III. ii. 5.LINK SHEET: Describe the uses in designing Synchronous sequential circuits. i. List the major topics in synchronous sequential circuits. ii. Mention the uses in designing the synchronous sequential circuits. 6. EVOCATION: (5 minutes) 7. LECTURE NOTES: (40 Minutes) Topics to be covered Sequential circuits Latches and Flip flops CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 1

Analysis and design procedures State reduction and state assignment Shift registers Counters HDL for Sequential Circuits Uses in designing the logic circuits Sequential Circuits All Flip-Flops use the same clock and change state on the same triggering edge. Latches and Flipflop Latches: basic circuits to construct flip-flops Capable of storing binary information, impractical for use in synchronous sequential circuits. More complicated types can be built upon it Analysis and design procedure State equation (transition equation) State Table or Transition Table State Diagram Input/ Output Equations Flip-Flop Input Equations State Reduction and State Assignment Reduction of the number of flip-flops in a sequential circuit, while keeping the External input-output requirements unchanged Shift Registers Each stage (flip-flop) in a shift register represents one bit of storage, and the shifting capability of a register permits the movement of data from stage to stage within the register, or into or out of the register upon application of clock pulses. Counters Counters are circuits that cycle through a specified number of states. Two types of counters: Synchronous (parallel) counters, Asynchronous (ripple) counters HDL for Sequential Circuits HDL is a language that describes the hardware of digital systems in a textual form. 8. TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9. APPLICATIONS CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 2

Sequential logic is used to construct finite state machines, a basic building block in all digital circuitry, as well as memory circuits and other devices. Virtually all circuits in practical digital devices are a mixture of combinational and sequential logic. Sri Vidya College of Engineering and Technology Department of Information Technology Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Sequential Circuits. 2. SKILLS ADDRESSED: Learning Remembering I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi Sequential circuits 45 Minutes Unit III-Lesson No.2/11 3. OBJECTIVE OF THIS LESSON PLAN: To make the students learn the meaning of Synchronous Sequential circuits and their implementation. 4.OUTCOMES: i. Learn the meaning of Sequential circuits ii. 5.LINK SHEET: Describe the implementation of logic circuits by Synchronous Sequential circuits. i. Define sequential circuits and discriminate it with combinational circuits. ii. iii. iv. What is a synchronous sequential circuit? Give the need of synchronous sequential circuit. List the types of synchronous sequential circuit. v. Explain the implementation using synchronous sequential circuit. 6.EVOCATION: (5 Minutes) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 3

7. LECTURE NOTES: (45 Minutes) Sequential Circuits Output is a function of the present state. Has state information Requires memory. Uses Flip-Flops to implement memory Difference between sequential and combinational circuits: Combinational Circuits 1. The outputs are entirely dependent on the current inputs 2. Contains no storage elements, no feedback Sequential Circuits Consists of a combinational circuit to which storage elements are connected to form a feedback path Outputs are a function of both the current inputs and the present state of the storage elements Synchronous Sequential Circuit The transition happens at discrete instants of time The circuit responds only to pulses on particular inputs CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 4

Storage elements are affected only with the arrival of each pulse Need of sequential circuits Sequential logic is used to construct finite state machines, a basic building block in all digital circuitry, as well as memory circuits and other devices. Virtually all circuits in practical digital devices are a mixture of combinational and sequential logic. Types of Sequential Circuits. 1. Flipflop 2. Latches 3. Shift Registers 4. Counters Implementation Using Sequential Circuits Convert the Memory Combinational Logic Models Stores state information Realized using Flip-Flops Implements Flip-Flop input functions and output functions Realized using logic gates, a ROM or a PLA. Mealy Model and Moore Model Mealy Model- Outputs are a function of the present state. Outputs are independent of the inputs. State diagram includes an output value for each state. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 5

Moore Model- Outputs are a function of the present state and the present input. State diagram includes an input and output value for each transition (between states). 8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS: Outputs are a function of both the current inputs and the present state of the storage elements. Capable of storing binary information. Used in microprocessors and digital signal processing circuits. Sri Vidya College of Engineering and Technology Department of Information Technology Class I year, 02 sem Subject Code CS6201 Subject Digital Principles & System Design Prepared By S.Seedhanadevi Lesson Plan for Latches and Flip flops Time: 45 Minutes Lesson. No Unit III-Lesson No.3/11 1.CONTENT LIST: Latches and Flip flops 2. SKILLS ADDRESSED: Understanding Learning Remembering 3. OBJECTIVE OF THIS LESSON PLAN: To make the students understand the basic concept of Latches along with their types 4.OUTCOMES: i. Understand the basic concept of latches. ii. Learn the various types of latches. 5.LINK SHEET: i. Define Latches. ii. List the types of latches. iii. Explain in detail the types of latches and draw diagrams wherever necessary. 6.EVOCATION: (5 Minutes) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 6

7. LECTURE NOTES: (40 Minutes) Latches Examples of Latches basic circuits to construct flip-flops capable of storing binary information, impractical for use in synchronous sequential circuits. More complicated types can be built upon it Types of Latches SR Latch Two states: Set and Reset states.an asynchronous sequential circuit with two crosscoupled.nor gates S -R Latch SR latch with two cross-coupled NAND gates. 0 signal to change its state SR latch with control input Determines when the state of the latch can be changed D Latch Eliminate undesirable condition of indeterminate state insr latch. Latches in detail SR Latch Two inputs labeled S for set and R for reset (S, R)= (1, 0): set (Q=1, the set state) (S, R)= (0, 1): reset (Q=0, the reset/clear state) (S, R)= (0, 0): normal condition No operation, in either the set or the reset state. Depending on which input was most recently at 1 (S, R)= (1, 1): indeterminate state (Q=Q'=0), consider (S,R) = (1,1) (0,0) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 7

Unpredictable next state when both inputs return to 0. (depend on which input returns to 0 first) S -R Latch SR Latch with NAND Gates 0 signal to change its state.(s,r)=(0,1): set (Q=1, the set state).(s,r)=(1,0): reset (Q=0, the reset/clear state).(s,r)=(1,1): normal condition. (S,R)=(0,0): indeterminate state (Q=Q =1).unpredictable next state SR Latch with Control Input An additional input as an enable signal.c=0 quiescent condition, no change C=1 S or R is allowed to affect the SR latch.(1 signal to change its state). D Latch S=D and R=D.Ensure S and R are never equal to 1 at the same time.eliminate the undesirable conditions of the indeterminate state in the RS latch One output Q and two inputs: D (data) and C (control).q = D when C=1.Q = no change when C=0 Graphic Symbols for Latches CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 8

8. TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS Latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems. Latches are used as data storage elements and can be used in embedded circuits. Sri Vidya College of Engineering and Technology Department of Information Technology Class I year, 02 sem Subject Code CS6201 Subject Digital Principles & System Design Prepared By S.Seedhanadevi Lesson Plan for Latches and Flip flops Time: 45 Minutes Lesson. No Unit III-Lesson No.4/11 1.CONTENT LIST: Latches and Flip flops 2. SKILLS ADDRESSED: Understanding Learning Analyzing 3. OBJECTIVE OF THIS LESSON PLAN: To make the students understand the basic concept of Flipflop along with their types 4.OUTCOMES: i. Understand the basic concept of flipflop. ii. Learn the various types of flipflop. 5.LINK SHEET: i. Define Flip-flop. ii. Compare Flip-flop and latch. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 9

iii. List the types of flip-flops. iv. Explain in detail the types of flip-flops and draw diagrams wherever necessary. 6.EVOCATION: (5 Minutes) Examples of Flipflop 7. LECTURE NOTES: (40 Minutes) Flipflop Flip-flops are used as data storage elements. Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal. Compare Flipflop and Latches Flipflop Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered); Flip-flop is edge-sensitive Latch The simple ones are commonly called latches A latch is level-sensitive Types of Flipflop JK Flip-Flop T Flip-flop Edge-triggered D flip-flop Flip-flop and their description JK Flip-Flop: Edge-triggered D flip-flop Store binary information during edge trigger, Require the smallest number of gates Other types of flip-flops can be constructed using it JK Flip-Flop: D=JQ'+K'Q. J=0, K=0: D=Q Q no change CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 10

J=0, K=1: D=0 Q =0 reset to 0 J=1, K=0: D=1 Q =1 set to 1 J=1, K=1: D=Q Q =Q complement output T Flip-flop T (toggle) flip-flop: D = T Q = TQ'+T'Q T=0: D=Q, no change,t=1: D=Q' Q=Q', Characteristic equations D flip-flop Q (t+1) = D,JK flip-flop Q (t+1) = JQ +K Q, T flop-flop Q (t+1) = T Q = TQ + T Q Edge-triggered D flip-flop Store binary info during transition Method 1: Master-slave D flip-flop Two separate flip-flops,a master flip-flop (positive-level triggered),a slave flip-flop (negative-level triggered)change only during negative edge of clock Longer propagation delay. Method 2: D-type positive-edge-triggered flip-flop The most efficient flip-flop constructed with 3 SR latches CLK=0 S=R=1, no change, CLK=positive transition Q=D (state changes once) D=0 when CLK becomes 1 R=1 to 0 D changes further, no effect D=1 when CLK becomes 1 R=stay 1 D changes further, no effect CLK=negative transition or 1 quiescent condition (state holds) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 11

8. TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9. APPLICATIONS Flip-flops are fundamental building block of digital electronics systems used in computers, communications, and many other types of systems. Sri Vidya College of Engineering and Technology Department of Information Technology Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi Analysis and design procedures 45 Minutes Unit III-Lesson No.5/11 Analysis and design procedures 2. SKILLS ADDRESSED: Understanding Applying Remembering 3. OBJECTIVE OF THIS LESSON PLAN: To make the students apply the steps of implementation in analyzing sequential circuits. 4.OUTCOMES: i. Understand the analysis procedure of sequential circuits ii. 5.LINK SHEET: Illustrate the procedure with an example i. Discuss the analysis procedure with major steps. ii. Give an example to illustrate the analysis procedure of sequential circuits. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 12

iii. Derive the state equation, state diagram and state table for sequential circuits 6.EVOCATION: (5 Minutes) 7. LECTURE NOTES: (40 Minutes) Analysis Procedure The analysis of a sequential circuit consists of obtaining a table or a diagram for the time sequence of inputs, outputs, and internal states: the state table or the state diagram. It is also possible to write Boolean expressions including the necessary time sequence. The same information available in a state table can be represented graphically in a state diagram. Steps of analysis procedure Derive excitation equations Derive next-state and output equations Generate next-state and output tables Generate state diagram Illustration with an example 1. Given circuit State equation (transition equation) A (t+1) =Ax+Bx B (t+1) =A x y= (A+B) x State Table or Transition Table State table state equation CSC diagram CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 13

Four sections: present state, input, next state and output. List all possible binary combinations of present state and inputs. Determine next states and outputs from the logic diagram or from the state equations m flip-flops and n inputs,2m+n rows, m column of next-state State diagram 2. Analysis with D flipflops Given: Input function: DA=A x y, State equation: A (t+1) = A x y State Table: State diagram CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 14

8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS It is possible to write Boolean expressions including the necessary time sequence. Used to design ASIC such as Microprocessors, RAM, ROM and Flash ROM. Sri Vidya College of Engineering and Technology Department of Information Technology Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi Analysis and design procedures 45 Minutes Unit III-Lesson No.6/11 Analysis and design procedures 2. SKILLS ADDRESSED: Applying. Understanding. 3. OBJECTIVE OF THIS LESSON PLAN: To make the students apply the steps of implementation in designing the digital logic circuits. 4.OUTCOMES: i. Understand the design procedure of sequential circuits. ii. 5.LINK SHEET: Illustrate the procedure with an example i. Discuss the design procedure with major steps. ii. Give an example to illustrate the design procedure of sequential circuits. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 15

iii. Design the logic circuit based on the steps of design procedure. 6.EVOCATION: (5 Minutes) 7. LECTURE NOTES: (40 Minutes) Design of Sequential Circuits Analogy for sequential circuits Design of a clocked sequential circuit. Starts from a Set of Specifications Obtains a State Table/Diagram (Or Equivalences). Culminates in A Logic Diagram (Or A List Of Boolean Functions) Steps of design procedure 1) Derive the state diagram and state table for the circuit. 2) Count the number of states in the state diagram (call it N) and calculate the number of flip-flops needed (call it P) by solving the equation 2 P-1 < N 2 P. This is best solved by guessing the value of P. 3) Assign a unique P-bit binary number (state vector) to each state. Often, the first state = 0, the next state = 1, etc. 4) Derive the state transition table and the output table. 5) Separate the state transition table into P tables, one for each flip-flop. 6) Decide on the types of flip-flops to use. When in doubt, use all JK s. 7) Derive the input table for each flip-flop using the excitation tables for the type. 8) Derive the input equations for each flip-flop based as functions of the input and current state of all flip-flops. 9) Summarize the equations by writing them in one place. 10) Draw the circuit diagram. Illustration with an example 1. Design a circuit that detects three or more consecutive 1 s in a string of bits combining through an input line. 1st Step deriving state diagram or state table CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 16

Step 2-4: Assign binary codes and list state table Step 5: Choose type of flip-flops (synthesis with D flip-flop) Step 7 Draw the logic diagram (using simplified functions) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 17

8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS It is used to control the circuit (i.e.), when to on and off the circuits and it can be done by flip-flops. Thus it is applied in design of many electron devices as LED, Transistors. Sri Vidya College of Engineering and Technology Department of Information Technology Class I year, 02 sem Subject Code CS6201 Subject Digital Principles & System Design Prepared By S.Seedhanadevi Lesson Plan for State reduction and state assignment Time: 45 Minutes Lesson. No Unit III-Lesson No.7/11 1.CONTENT LIST: State reduction and state assignment 2. SKILLS ADDRESSED: Remembering. Understanding. Applying CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 18

3. OBJECTIVE OF THIS LESSON PLAN: To make the students know the state reduction principle and assign the values based on the principle. 4.OUTCOMES: i. Describe state reduction and assignment principle ii. 5.LINK SHEET: Explain the principles with an example. i. Define state reduction principle. ii. iii. Deduce the algorithm to know state reduction principle. Define state assignment principle iv. Illustrate state reduction and state assignment principle with an example. 6.EVOCATION: (5 Minutes) Analogy for state reduction and state assignment 7. LECTURE NOTES: (40 Minutes) State Reduction Principle Reduction of the number of flip-flops in a sequential circuit, while keeping the external input-output requirements unchanged Algorithm to state reduction principle Look for two present states that go to the same next state and have the same output for both input combinations Remove one of the equivalent state and replace by the other state each time it occurs in the table. State Assignment Assign coded binary values to the state.in order to design a sequential circuit with physical components. A circuit with m states need n bits where 2n >= m Illustration with an example-state Reduction Reduce the states for the state diagram given below CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 19

Step1: Step2: Step3: Step3: Step4: Illustration with an example-state Assignment Step1: Step2: CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 20

Step4: 8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations. 9.APPLICATIONS It is used to design many computer programs and sequential circuits. It is applied in Electronic design automation, communication protocol and neurological systems Sri Vidya College of Engineering and Technology Department of Information Technology Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Shift Registers 2. SKILLS ADDRESSED: I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi Shift Registers 45 Minutes Unit III-Lesson No.8/11 CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 21

Remembering. Understanding. Learning 3. OBJECTIVE OF THIS LESSON PLAN: To make the students understand the basic concept of shift register and their types. 4.OUTCOMES: i. Describe shift registers and their operation in detail ii. Discuss the various types of shift registers. 5.LINK SHEET: i. What is shift register? ii. Explain the operation of shift registers in detail. iii. Elaborate the types of shift register. iv. Define Universal Shift Register. 6.EVOCATION: (5 Minutes) Shift Registers 7. LECTURE NOTES: (40 Minutes) Shift Register An n-bit register has a group of n flip-flops and some logic gates and is capable of storing n bits of information. Operation of Shift Register retrieve data from register store/load new data into register (serial or parallel) shift the data within register (left or right) Example: A 4-bit register. A new 4-bit data is loaded every clock cycle. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 22

Registers With Parallel Load Instead of loading the register at every clock pulse, we may want to control when to load. Loading a register: transfer new information into the register. Requires a load control input. Parallel loading: all bits are loaded simultaneously. Another function of a register, besides storage, is to provide for data movements.. Basic data movement in shift registers (four bits are used for illustration). Types of Shift Register 1. Serial in/shift right/serial out 2. Serial in/shift left/serial out 3. Parallel in/serial out 4. Serial in/parallel out 5. Parallel in / parallel out Serial in/shift right/serial out Accepts data serially one bit at a time and also produces output serially. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 23

Timing Pulse Shift register A Shift register B Serial output of B Initial value 1 0 1 1 0 0 1 0 0 After T 1 1 1 0 1 1 0 0 1 1 After T 2 1 1 1 0 1 1 0 0 0 After T 3 0 1 1 1 0 1 1 0 0 After T 4 1 0 1 1 1 0 1 1 1 Application: Serial transfer of data from one register to another. Serial In/Parallel Out Shift Registers Accepts data serially. Outputs of all stages are available simultaneously. Parallel In/Serial Out Shift Registers Bits are entered simultaneously, but output is serial CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 24

Parallel In/Parallel Out Shift Registers Simultaneous input and output of all data bits. Universal Shift Regiser: Data shifted in both the direction simultaneously (i.e.) either left or right, using a control line is known as universal shift register 8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS One of the most common uses of a shift register is to convert between serial and parallel interfaces. This is useful as many circuits work on groups of bits in parallel, but serial interfaces are simpler to construct. Shift registers can be used as simple delay circuits. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 25

Sri Vidya College of Engineering and Technology Department of Information Technology Class I year, 02 sem Subject Code CS6201 Subject Digital Principles & System Design Prepared By S.Seedhanadevi Lesson Plan for Counters Time: 45 Minutes Lesson. No Unit III-Lesson No.9/11 1.CONTENT LIST: Counters 2. SKILLS ADDRESSED: Remembering. Learning 3. OBJECTIVE OF THIS LESSON PLAN: To make the students understand the basic concept of Counters and their types. 4.OUTCOMES: i. Describe Counters and their operation in detail ii. Discuss the various types of Counters. 5.LINK SHEET: i. What are counters? ii. Explain the operation of Counters in detail. iii. Elaborate the types of Counters. iv. Define Ring Counter and Johnson Counter. 6.EVOCATION: (5 Minutes) CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 26

Counter Circuit Digital Counters Geiger Counters 7. LECTURE NOTES: (45 Minutes) Counters Counters are circuits that cycle through a specified number of states. Operation of Counters : Example: 4-bit counter with parallel load Counters could be augmented with parallel load capability for the following purposes: To start at a different state To count a different sequence As more sophisticated register with increment/decrement functionality. State Table Clear CP Load Count Function 0 X X X Clear to 0 1 X 0 0 No change 1 1 X Load inputs 1 0 1 Next state Circuit design CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 27

Types of Counters Synchronous (Parallel) Counters Asynchronous (Ripple) Counters Synchronous (Parallel) Counters Synchronous counters apply the same clock to all flip-flops.synchronous (parallel) counters: the flip-flops are clocked at the same time by a common clock pulse. Example: 2-bit synchronous binary counter using T flip-flops State diagram State Table Characteristic equation Present Next Flip-flop state state inputs A 1 A 0 + A 1 + A 0 TA 1 TA 0 0 0 0 1 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 0 0 1 1 TA 1 = A 0 TA 0 = 1 2bit parallel Counters CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 28

Asynchronous (Ripple) Counters Ripple counters allow some flip-flop outputs to be used as a source of clock for other flip-flops. Asynchronous counters: the flip-flops do not change states at exactly the same time as they do not have a common clock pulse. Also known as ripple counters, as the input clock pulse ripples through the counter cumulative delay is a drawback. N flip-flops a MOD (modulus) 2 n counter. (Note: A MOD-x counter cycles through x states.) Output of the last flip-flop (MSB) divides the input clock frequency by the MOD number of the counter; hence a counter is also a frequency divider. Example: 2-bit ripple binary counter. Output of one flip-flop is connected to the clock input of the next more-significant flip-flop. Ring Counters One flip-flop (stage) for each state in the sequence. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 29

The output of the last stage is connected to the D input of the first stage. An n-bit ring counter cycles through n states. Johnson Counters The complement of the output of the last stage is connected back to the D input of the first stage. Also called the twisted-ring counter. Require fewer flip-flops than ring counters but more flip-flops than binary counters. An n-bit Johnson counter cycles through 2n states. 8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS Counters are one of the many applications of sequential logic that has a widespread use from simple digital alarm clocks to computer memory pointers. A counter is a collection of flip flops, each representing a digit in a binary number representation (which means each bit, depending on position, means a different number). Sri Vidya College of Engineering and Technology Department of Information Technology Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi HDL for Sequential Circuits 45 Minutes Unit III-Lesson No.10/11 HDL for Sequential Circuits 2. SKILLS ADDRESSED: CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 30

Understanding. Analyzing 3. OBJECTIVE OF THIS LESSON PLAN: To make the students understand basic implementation of sequential circuits using HDL. 4.OUTCOMES: i. Describe HDL implementation in sequential circuits ii. Discuss the implementation with coding. 5.LINK SHEET: i. Give the merits of HDL in designing sequential circuits. ii. Write the HDL coding for any two of the sequential circuits. iii. What are three state gates based on HDL and why they are used? 6.EVOCATION: (5 Minutes) 7. LECTURE NOTES: (40 Minutes) HDL Implementation Sequential Circuits HDL is a language that describes the hardware of digital systems in a textual form. It resembles a programming language, but is specifically oriented to describing hardware structures and behaviors. The main difference with the traditional programming languages is HDL s representation of extensive parallel operations whereas traditional ones represent mostly serial operations. The most common use of a HDL is to provide an alternative to schematics. HDL can be used to represent logic diagrams, Boolean expressions, and other more complex digital circuits. Thus, in top down design, a very high-level description of a entire system can be precisely specified using an HDL. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 31

This high-level description can then be refined and partitioned into lower-level descriptions as a part of the design process. There are two applications of HDL processing: Simulation and Synthesis HDL coding for T flipflop D Flipflop T flipflop module D_FF (Q,D,CLK); output Q; input D,CLK; reg Q; always @ (posedge CLK) Q = D; endmodule module TFF (Q,T,CLK,RST); output Q; input T,CLK,RST; wire DT; assign DT = Q ^ T ; //Instantiate the D flip-flop DFF TF1 (Q,DT,CLK,RST); endmodule HDL coding for Ripple Counter module ripplecounter(count, reset, A0, A1, A2, A3); input count; input reset; output A0, A1, A2, A3; TFF T0(count, reset, A0); TFF T1(A0, reset, A1); TFF T2(A1, reset, A2); TFF T3(A2, reset, A3); endmodule Three State Gates CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 32

Three-state gates have a control input that can place the gate into a high-impedance state. (symbolized by z in HDL). The bufif1 gate behaves like a normal buffer if control=1. The output goes to a highimpedance state z when control=0. bufif0 gate behaves in a similar way except that the high-impedance state occurs when control=1 Two not gates operate in a similar manner except that the o/p is the complement of the input when the gate is not in a high impedance state. The gates are instantiated with the statementgate name (output, input, control); Three state gates in HDL The output of 3-state gates can be connected together to form a common output line. To identify such connections, HDL uses the keyword tri (for tri-state) to indicate that the output has multiple drivers. 8.TEXT BOOKS: Sanjay Kumar Suman, L.Bhagyalakshmi, S.Porselvi, Digital Principles And System Design,Vijay Nicole Pubilcations 9.APPLICATIONS HDL is a language that describes the hardware of digital systems in a textual form. It describes the interconnection of digital components. Such a structural description can be used as input to logic simulation just as a schematic is used. CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 33