CPE 200L LABORATORY 2: DIGITAL LOGIC CIRCUITS BREADBOARD IMPLEMENTATION DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING UNIVERSITY OF NEVADA, LAS VEGAS GOALS: In this l, the sic logic circuits will e uilt on the redord. Wiring circuits from the schemtic, using pproprite ICs, using the redords nd trouleshooting in generl re the min gols of this l. BACKGROUND: IMPLEMENTING FUNCTIONS ON THE BREADBOARD Min rules / steps to get circuit working exmple for function F = + : 1. Split function into seprte modules. For function F there will e module nd module '' 2. Implement nd test modules seprtely 3. Connect modules nd test 4. It is possile, tht the chip is fulty. To mke sure the chip is working, connect +5V to VCC, 0V to GND, nd connect one gte nd test its opertion. Other test method is to use the IC tester. You ll find them in the ECE Ls: DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 1
Figure 1. Digitl IC Tester ville in ECE Ls Implementtion of F = + function. Implementing module: Implement AND gte, nd verify its opertion y connecting the LED in series with 100Ω resistor y y Plce chip, nd power it y connecting +5V to VCC, nd 0V to GND Connect inputs nd outputs: to pin 1, to pin 2, y to pin 3 Figure 2. Setup of AND gte with LED Connect LED to the output y: plce LED s shown ove longer led to y, shorter to the resistor. Resistor connects shorter LED led to the ground (0V). At this point, the module is tested nd working. Next step: implementing the '' module. You need to invert the nd signls first, using NOT gtes. ' ' ' ' '' Plce chip, nd power it y connecting +5V to VCC, nd 0V to GND Connect inputs nd outputs: to pin 1, ' to pin 2, to pin 3, ' to pin 4 Use ' nd ' s inputs to AND gte. Connect '' to LED nd test. Figure 3. Setup of NOT nd AND gte DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 2
Now, hving the nd '' modules tested, you connect them using OR gte. ' ' F '' Plce chip, nd power it y connecting +5V to VCC, nd 0V to GND. Connect '' nd, the output of OR gte is F Figure 4. Connecting modules Rememer to hve just single one wire for signl, nd just single one wire for signl. 7-SEGMENT DISPLAY To represent the digitl signls either LEDs or 7-segment displys cn e used. LEDs re suitle to represent single-it inry signls, while 7-segments re used to represent multi-it numers. Binry coded deciml (BCD) numers re often displyed on seven segment disply using BCD to seven segment decoder such s 7447, which we use in this l. Figure 7 illustrtes BCD to seven segment disply circuit. Figure 5. 7-segment disply DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 3
There re two configurtions of 7-segment displys: common node nd common cthode. In this l we use common node type, wht cn e illustrted s follows: Figure 6. Common node configurtion Figure 10 shows complete schemtics for 7-segment nd 7447 driver configurtion. 7447 tkes BCD numer s the input nd converts to 7-signl formt, s shown in truth tle further. Do not forget out the 2.4 kω resistor, to limit the current. Figure 7. Schemtics for 7-seg with 7447 configurtion DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 4
FULL ADDER Full dder hs three inputs nd two outputs. The first two inputs re A nd B (oth re 1-it numers) nd the third input is n input crry designted s Cin. Full dder cn dd two its together, tking crry from the next lower order of mgnitude, nd sending crry to the next higher order of mgnitude. Figure 8. Full Adder setup Tle 1. Truth tle for Full Adder A B CIN S COUT 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 MULTIPLEXERS AND DEMULTIPLEXERS A multiplexer (or mux) is device tht selects one of severl nlog or digitl input signls nd forwrds the selected input into single line. A multiplexer of 2n inputs hs n select lines, which re used to select which input line to send to the output. Multiplexers re minly used to increse the mount of dt tht cn e sent over the network within certin mount of time nd ndwidth. A multiplexer is lso clled dt selector. Demultiplexer works the opposite wy: it tkes one dt input nd hs multiple outputs. The ctive output is selected using selector inputs. An electronic multiplexer mkes it possile for severl signls to shre one device or resource, for exmple one A/D converter or one communiction line, insted of hving one device per input signl. An electronic multiplexer cn e considered s multiple- input, single-output switch. The schemtic symol for multiplexer is n isosceles trpezoid with the longer prllel DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 5
side contining the input pins nd the short prllel side contining the output pin. The schemtic in Figure 9 shows 2-to-1 multiplexer with the s wire controlling the desired input to the output. It cn e expressed s truth tle s shown in Tle 1: ) input ctive (s=0) ) input ctive (s=1) Figure 9. Input selection for 2-to-1 multiplexer Tle 2. Truth tle of 2-to-1 multiplexer S A B Z 1 1 1 0 1 0 1 0 1 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 0 4-to-1 multiplexer hs 4 dt inputs nd two selector inputs. According to the vlues of selector inputs, one of four dt inputs is ctive nd signls from this input re pssed to the output of multiplexer. Figure 10 shows the exmple configurtion of 4-to-1 multiplexer. DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 6
Figure 10. 4-to-1 multiplexer ARITHMETIC-LOGIC UNIT (ALU) Arithmetic logic unit is the most importnt element of microprocessor which performs oth mth nd logic functions. An ALU lods dt from input registers, n externl Control Unit then tells the ALU wht opertion to perform on tht dt, nd then the ALU stores its result into n output register. ALU tkes mny opernds s input dt, then depending on the opertion which is currently progrmmed in opertion selector, it performs this opertion on input opernd nd produces the result. The result is presented on the ALU s output. Figure 11. Block schemtic of ALU ) logic opertion ) rithmetic opertion Figure 12. Logic nd rithmetic opertion in ALU In this l, we will e working on ALU which performs three functions: logicl AND: y = logicl OR: y = + logicl XOR: y = rithmetic ddition: y = + DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 7
Figure 13. Smple implementtion of 1-it ALU with AND, OR, ADD functions. LAB DELIVERIES: PRELAB: 1. Bredords: 1. Red the tutoril on how to use redord. The written tutoril cn e found on our wesite t: http://fculty.unlv.edu/eels/docs/equipment/redords.pdf 2. 1-it ALU: 1. Design 1-it ALU with AND, OR, XOR, ADD functions. Simulte gte level schemtic in Qurtus. 3. Prel deliveries Include in the prel document: 1. Your design of 1-it ALU 2. Simultion wveforms of 1-it ALU DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 8
LAB EXPERIMENTS To find the chip implementing the desired function, or to look for the dtsheet regrding the specific chip, go to https://fculty.unlv.edu/eels/index.html?nvi=min_icdtsheets 1. Experiment 1: Simple circuit 1. Implement the following circuit on the redord, using the 74xx chips. Function: y = + c Figure 14. Schemtic for experiment 1 Use the tutoril from the introduction section of this document s guide for the implementtion. 2. Experiment 2: Full Adder 1. Crete full dder schemtic s shown of Figure 8 2. Crete mcro of Full dder to use for hierrchicl design. 3. Perform simultion nd verify tht it mtches FA truth tle shown on Tle 1. 3. Experiment 3: Implementing dder using IC 1. Use the 7483 IC (4-it full inry dder) to implement the 2-it ddition Figure 15. 7483 chip DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 9
2. Test the opertion for 6 smple comintions of your choice: 3 of them not including crry, 3 of them including crry. 4. Experiment 4: 1-it ALU 1. Build 1-it ALU with AND, OR, XOR, FA functions. 2. For the Full Adder, you cn use the sme circuit s in experiment 1, or the IC chip 3. Design the 1-it ALU sed on the Figure 13. POSTLAB REPORT: Include the following elements in the report document: Section Element 1 Theory of opertion Include rief description of every element nd phenomenon tht ppers during the experiments. 2 Prel report Results of the experiments Experiment Experiment Results 1. Truth tle. Picture of the circuit on the redord 3 2. Truth tle. Picture of the circuit on the redord 3. Truth tle. Picture of the circuit on the redord 4. Truth tle. Picture of the circuit on the redord Answer the questions Question no. Question 4 1 Wht is the difference etween Hlf Adder nd Full Adder? Descrie oth. 2 Briefly chrcterize the IC7483 chip. 3 Wht re sic cpilities of Digitl IC Testers? 5 Conclusions Write down your conclusions, things lerned, prolems encountered during the l nd how they were solved, etc. References: 1. Introduction to redords: http://fculty.unlv.edu/eels/docs/equipment/redords.pdf 2. Dtsheets of 7400 series chips: http://fculty.unlv.edu/eels/index.html?nvi=min_icdtsheets 3. Dtsheet of 7483 4-it inry dder: https://fculty.unlv.edu/eels/docs/dtsheets/7483.pdf DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 10