Digital Signal Processing

Similar documents
REAL-TIME DIGITAL SIGNAL PROCESSING from MATLAB to C with the TMS320C6x DSK

ISBN: (ebook) ISBN: (Hardback)

An Introduction to Hardware-Based DSP Using windsk6

1.1 Digital Signal Processing Hands-on Lab Courses

Enhancing the TMS320C6713 DSK for DSP Education

Introduction To LabVIEW and the DSP Board

Digital Signal Processing Laboratory 7: IIR Notch Filters Using the TMS320C6711

PROVIDING AN ENVIRONMENT TO TEACH DSP ALGORITHMS. José Vieira, Ana Tomé, João Rodrigues

Chapter 3. Basic Techniques for Speech & Audio Enhancement

Voice Controlled Car System

DSP in Communications and Signal Processing

FPGA Development for Radar, Radio-Astronomy and Communications

TMS320VC5501/5502/5503/5507/5509/5510 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide

DDC and DUC Filters in SDR platforms

DHANALAKSHMI COLLEGE OF ENGINEERING Tambaram, Chennai

Figure 1: Feature Vector Sequence Generator block diagram.

Modeling and Implementing Software-Defined Radio Communication Systems on FPGAs Puneet Kumar Senior Team Lead - SPC

PXI UMTS DL Measurement Suite Data Sheet

PC-based Personal DSP Training Station

Diamond Cut Productions / Application Notes AN-2

Rapid prototyping of of DSP algorithms. real-time. Mattias Arlbrant. Grupphandledare, ANC

S I N E V I B E S FRACTION AUDIO SLICING WORKSTATION

Appendix D. UW DigiScope User s Manual. Willis J. Tompkins and Annie Foong

: DSP-BASED LOW-COST DIGITAL COMMUNICATIONS LABORATORY

Analyzing Modulated Signals with the V93000 Signal Analyzer Tool. Joe Kelly, Verigy, Inc.

Inside Digital Design Accompany Lab Manual

Radar Signal Processing Final Report Spring Semester 2017

International Journal of Engineering Trends and Technology (IJETT) - Volume4 Issue8- August 2013

Low-Cost Personal DSP Training Station based on the TI C3x DSK

IMPLEMENTATION AND ANALYSIS OF FIR FILTER USING TMS 320C6713 DSK Sandeep Kumar

Implementation of Graphical Equalizer using LabVIEW for DSP Kit DSK C6713

VXI RF Measurement Analyzer

Chapter 1. Introduction to Digital Signal Processing

AN ARTISTIC TECHNIQUE FOR AUDIO-TO-VIDEO TRANSLATION ON A MUSIC PERCEPTION STUDY

2. AN INTROSPECTION OF THE MORPHING PROCESS

Keywords Xilinx ISE, LUT, FIR System, SDR, Spectrum- Sensing, FPGA, Memory- optimization, A-OMS LUT.


Delta-Sigma Modulators

White Paper Versatile Digital QAM Modulator

SDR Implementation of Convolutional Encoder and Viterbi Decoder

: INTERFACING J-DSP WITH A TI DSK FOR USE IN A SIGNAL PROCESSING CLASS

CM3106 Solutions. Do not turn this page over until instructed to do so by the Senior Invigilator.

Journal of Theoretical and Applied Information Technology 20 th July Vol. 65 No JATIT & LLS. All rights reserved.

Embedded Signal Processing with the Micro Signal Architecture

Tempo Estimation and Manipulation

Memory efficient Distributed architecture LUT Design using Unified Architecture

PEP-II longitudinal feedback and the low groupdelay. Dmitry Teytelman

A First Laboratory Course on Digital Signal Processing

Sample. Data Acquisition and Signal Conditioning. Course Manual. Course Software Version 2011 February 2012 Edition Part Number P-01

GALILEO Timing Receiver

Laboratory 4. Figure 1: Serdes Transceiver

Contents. xv xxi xxiii xxiv. 1 Introduction 1 References 4

RT-DSP Using See Through

DT9857E. Key Features: Dynamic Signal Analyzer for Sound and Vibration Analysis Expandable to 64 Channels

The following exercises illustrate the execution of collaborative simulations in J-DSP. The exercises namely a

MIXED-SIGNAL AND DSP DESIGN TECHNIQUES

Fraction by Sinevibes audio slicing workstation

Optical Signals Application Plug-in Programmer Manual

DATUM SYSTEMS Appendix A

Real-time EEG signal processing based on TI s TMS320C6713 DSK

Efficient Parallelization of Polyphase Arbitrary Resampling FIR Filters for High-Speed Applications

FIBRE CHANNEL CONSORTIUM

Research Article. ZOOM FFT technology based on analytic signal and band-pass filter and simulation with LabVIEW

Lab experience 1: Introduction to LabView

A Fast Constant Coefficient Multiplier for the XC6200

Reconfigurable FPGA Implementation of FIR Filter using Modified DA Method

Part III: How to Present in the Health Sciences

Digital Signal Processing Detailed Course Outline

TOWARD A FOCUSED MARKET William Bricken September A variety of potential markets for the CoMesh product. TARGET MARKET APPLICATIONS

Combating Closed Eyes Design & Measurement of Pre-Emphasis and Equalization for Lossy Channels

Combating Closed Eyes Design & Measurement of Pre-Emphasis and Equalization for Lossy Channels

for Digital IC's Design-for-Test and Embedded Core Systems Alfred L. Crouch Prentice Hall PTR Upper Saddle River, NJ

OF AN ADVANCED LUT METHODOLOGY BASED FIR FILTER DESIGN PROCESS

Robert Alexandru Dobre, Cristian Negrescu

ECE438 - Laboratory 4: Sampling and Reconstruction of Continuous-Time Signals

RF (Wireless) Fundamentals 1- Day Seminar

Verification Methodology for a Complex System-on-a-Chip

Risk Risk Title Severity (1-10) Probability (0-100%) I FPGA Area II Timing III Input Distortion IV Synchronization 9 60

Design on CIC interpolator in Model Simulator

Snapshot. Sanjay Jhaveri Mike Huhs Final Project

Detection and demodulation of non-cooperative burst signal Feng Yue 1, Wu Guangzhi 1, Tao Min 1

DSA-1. The Prism Sound DSA-1 is a hand-held AES/EBU Signal Analyzer and Generator.

Embedded Signal Processing with the Micro Signal Architecture

NanoGiant Oscilloscope/Function-Generator Program. Getting Started

Digital Effects Pedal Description Ross Jongeward 10 December 2014

FPGA Digital Signal Processing. Derek Kozel July 15, 2017

Design and Implementation of Partial Reconfigurable Fir Filter Using Distributed Arithmetic Architecture

Data flow architecture for high-speed optical processors

Lab P-6: Synthesis of Sinusoidal Signals A Music Illusion. A k cos.! k t C k / (1)

SRRC Filter Implementation As Per DVB-S2 Standard

Audio Signal Processing Studio Remote Lab for Signals and Systems Class

An Lut Adaptive Filter Using DA

Implementation of CRC and Viterbi algorithm on FPGA

Controlling adaptive resampling

High Performance Real-Time Software Asynchronous Sample Rate Converter Kernel

MONITORING AND ANALYSIS OF VIBRATION SIGNAL BASED ON VIRTUAL INSTRUMENTATION

R&S CMW500 Digital IQ with CADENCE Emulator Application Note

University of Maiduguri Faculty of Engineering Seminar Series Volume 6, december 2015

On the design of turbo codes with convolutional interleavers

LOW POWER DIGITAL EQUALIZATION FOR HIGH SPEED SERDES. Masum Hossain University of Alberta

Transcription:

Real-Time Second Edition Digital Signal Processing from MATLAB to C with the TMS320C6X DSPs Thad B. Welch Boise State University, Boise, Idaho Cameron H.G. Wright University of Wyoming, Laramie, Wyoming Michael G. Morrow University of Wisconsin, Madison, Wisconsin CRC Press Taylor &. Francis Group Boca Raton London New York CRC Press is an imprint of the Taylor & Francis an Croup, Informa business

Contents List of Figures xix List of Tables xxv List of Program Listings xxvii Preface xxxi Acknowledgments xxxv Section I: Enduring Fundamentals 1 1 Introduction and Organization 3 1.1 Why Do You Need This Book? 3 1.1.1 Other DSP Books 3 1.1.2 Demos and DSP Hardware 4 1.1.3 Philosophy of This Book 4 1.2 Real-Time DSP 4 1.3 How to Use This Book 5 1.3.1 Supported Boards 5 1.3.2 Host Computer to DSP Board Communication 6 1.3.3 Transition to Real-Time 10 1.3.4 Chapter Coverage 10 1.3.5 Hardware and Software Installation 11 1.3.6 Reading Program Listings 12 1.4 Get Started 12 1.5 Problems 12 2 Sampling and Reconstruction 15 2.1 Theory 15 2.1.1 Choosing a Sampling Frequency 15 2.1.2 Input/Output Issues: Samples or Frames? 15 2.1.3 The Talk-Through Concept 16 2.2 windsk Demonstration 16 2.2.1 Starting windsk 16 2.2.2 Talk-Thru Application 18 2.3 Talk-Through Using Windows 19 2.4 Talk-Through Using MATLAB and Windows 22 2.4.1 Talk-Through Using MATLAB Only 24 xi

xii CONTENTS 2.4.2 Talk-Through Using MATLAB and the DSK 26 2.5 DSK Implementation in C 27 2.6 Follow-On Challenges 28 2.7 Problems 29 3 FIR Digital Filters 31 3.1 Theory 31 3.1.1 Traditional Notation 31 3.1.2 FIR Filters Compared to IIR Filters 32 3.1.3 Calculating the Output of a Filter 32 3.2 windsk Demonstration 34 3.2.1 Graphic Equalizer Application 34 3.2.2 Notch Filter Application 36 3.2.3 Audio Effects Application 37 3.3 MATLAB Implementation 39 3.3.1 Built-in Approach 39 3.3.2 Creating Your Own Filter Algorithm 43 3.4 DSK Implementation in C 44 3.4.1 Brute-Force FIR Filtering in C: Part 1 45 3.4.2 Brute-Force FIR Filtering in C: Part 2 47 3.4.3 Circular Buffered FIR Filtering 49 3.5 Follow-On Challenges 52 3.6 Problems 52 4 IIR Digital Filters 55 4.1 Theory 55 4.2 windsk Demonstration: Notch Filter Application 58 4.3 MATLAB Implementation 60 4.3.1 Filter Design and Analysis 60 4.3.2 IIR Filter Notation 70 4.3.3 Block Diagrams 71 4.3.4 Built-in Approach 76 4.3.5 Creating Your Own Filter Algorithm 78 4.4 DSK Implementation in C 79 4.4.1 Brute-Force IIR Filtering 79 4.4.2 More Efficient IIR Filtering 81 4.5 Follow-On Challenges 81 4.6 Problems 81 5 Periodic Signal Generation 83 5.1 Theory 83 5.1.1 Periodic Signals in DSP 83 5.1.2 Signal Generation 85 5.2 windsk Demonstration 92 5.2.1 Arbitrary Waveform 92 5.2.2 DTMF 93 5.3 MATLAB Implementation 94 5.3.1 Direct Digital Synthesizer Technique 94 5.3.2 Table Lookup Technique 95 5.4 DSK Implementation in C 96 5.4.1 Direct Digital Synthesizer Technique 96

CONTENTS xiii 5.4.2 Table Lookup Technique 98 5.4.3 Table Lookup Technique with Table Creation 99 5.4.4 Digital Resonator Technique 100 5.5 Pseudonoise Sequences 102 5.5.1 Theory 103 5.5.2 windsk Demonstration 107 5.5.3 MATLAB Implementation 107 5.5.4 DSK Implementation in C 112 5.6 Follow-On Challenges 118 5.7 Problems 118 6 Frame-Based DSP 121 6.1 Theory 121 6.1.1 Drawbacks of Sample-Based DSP 121 6.1.2 What Is a Frame? 122 6.2 windsk Demonstration 123 6.3 MATLAB Implementation 124 6.4 DSK Implementation in C 125 6.4.1 Triple Buffering 125 6.4.2 A Frame-Based DSP Example 126 6.4.3 Using Direct Memory Access 130 6.5 Summary of Frame-Based Processing 138 6.6 Follow-On Challenges 139 6.7 Problems 139 7 Digital Filters Using Frames 141 7.1 Theory 141 7.2 windsk Demonstration 141 7.3 MATLAB Implementation 141 7.4 DSK Implementation in C 141 7.4.1 Understanding the FIR Process for Frames 142 7.4.2 How to Avoid the "Edge" Problems 143 7.4.3 Explanation of the C Code 143 7.5 Follow-On Challenges 145 7.6 Problems 146 8 The Fast Fourier Transform 147 8.1 Theory 147 8.1.1 Denning the FFT 147 8.1.2 The Twiddle Factors 147 8.1.3 The FFT Process 148 8.1.4 Bit-Reversed Addressing 151 8.1.5 Using the FFT for Filtering 151 8.1.6 Avoiding Circular Convolution 152 8.1.7 Real-Time Fast Convolution 154 8.2 windsk Demonstration 157 8.3 MATLAB Implementation 157 8.4 Implementation in C 157 8.5 Follow-On Challenges 160 8.6 Problems 161

xiv CONTENTS 9 Spectral Analysis and Windowing 163 9.1 Theory 163 9.1.1 Power Spectrum of a Signal 163 9.1.2 The Need for Windowing 165 9.1.3 Window Characteristics 167 9.2 windsk Demonstration 170 9.3 MATLAB Implementation 170 9.4 DSK Implementation in C 173 9.5 Conclusion 173 9.6 Follow-On Challenges 173 9.7 Problems 174 Section II: Projects 177 10 Project 1: Guitar Special Effects 179 10.1 Introduction to Projects 179 10.2 Theory 179 10.2.1 Background 179 10.2.2 How the Effects Work 180 10.3 windsk Demonstration 192 10.4 MATLAB Implementation 192 10.4.1 FIR Comb Filter 192 10.4.2 IIR Comb Filter 193 10.4.3 Notch Filter 195 10.4.4 Flanger 196 10.4.5 Tremelo 197 10.5 DSK Implementation in C 198 10.5.1 Real-Time Comb Filters 198 10.5.2 Other Real-Time Special Effects 201 10.6 Follow-On Challenges 201 11 Project 2: Graphic Equalizer 11.1 Theory 11.2 windsk Demonstration 204 11.2.1 Graphic Equalizer Application 203 203 11.2.2 Effect of the Graphic Equalizer 205 11.3 MATLAB Implementation 11.4 DSK Implementation in C 209 11.4.1 Applying Gain to Filter Bands 209 11.4.2 GEL File Slider Control 210 11.5 Follow-On Challenges 211 12 Project 3: Peak Program Meter 213 12.1 Theory 213 12.2 windsk Demonstration: commdsk 214 12.3 MATLAB Implementation 214 12.4 DSK Implementation in C 215 12.4.1 Example PPM Code 215 12.4.2 DSK LED Control 217 12.4.3 Another PPM Code Version 217 12.5 Follow-On Challenges 218 204 206

CONTENTS xv 13 Project 4: AM Transmitters 219 13.1 Theory 219 13.2 windsk Demonstration 222 13.3 MATLAB Implementation 222 13.4 DSK Implementation in C 224 13.5 Follow-On Challenges 226 14 Project 5: AM Receivers 227 14.1 Theory 227 14.1.1 Envelope Detector 228 14.1.2 The Hilbert-Based AM Receiver 233 14.2 windsk Demonstration 237 14.3 MATLAB Implementation 237 14.4 DSK Implementation in C 239 14.5 Follow-On Challenges 241 15 Project 6: Phase-Locked Loop 243 15.1 Theory 243 15.2 windsk Demonstration 244 15.3 MATLAB Implementation 244 15.3.1 PLL Simulation 244 15.3.2 A Few Updates to the MATLAB Implementation 250 15.4 DSK Implementation in C 253 15.4.1 Components of the PLL 253 15.4.2 System Testing 256 15.5 Follow-On Challenges 256 16 Project 7: BPSK Digital Transmitters 259 16.1 Theory 259 16.1.1 Random Data and Symbol Generation 259 16.1.2 BPSK Using Antipodal Rectangularly Shaped Bits 261 16.1.3 BPSK Using Impulse Modulated Raised-Cosine Shaped Bits... 261 16.2 windsk Demonstration 262 16.2.1 commdsk: Unfiltered BPSK 263 16.2.2 commdsk: Raised-Cosine Filtered BPSK 264 16.3 MATLAB Implementation 267 16.3.1 Rectangular Shaped BPSK Signal Generator 268 16.3.2 Impulse Modulated Raised-Cosine BPSK Signal Generator 269 16.4 DSK Implementation in C 273 16.4.1 A Rectangular Pulse Shaped BPSK Transmitter 273 16.4.2 A Raised-Cosine Pulse Shaped BPSK Transmitter 274 16.4.3 Summary of Real-Time Code 276 16.5 Follow-On Challenges 276 17 Project 8: BPSK Digital Receivers 279 17.1 Theory 279 17.1.1 The Output of the Matched Filter 281 17.1.2 The Eye-Pattern 282 17.1.3 Maximum Likelihood Timing Recovery 283 17.2 windsk Demonstration 285 17.3 MATLAB Implementation 286

xvi CONTENTS 17.4 DSK Implementation in C 290 17.4.1 Components of the Digital Receiver 290 17.4.2 System Testing 294 17.5 Follow-On Challenges 296 18 Project 9: MPSK and QAM Digital Transmitters 297 18.1 Theory 297 18.1.1 I- and Q-Based Transmitters 297 18.1.2 A Few Constellation Diagrams 299 18.2 windsk Demonstration 302 18.2.1 commdsk: Root-Raised-Cosine Filtered QPSK 303 18.3 MATLAB Implementation 306. 306 18.3.1 Impulse Modulated Root-Raised-Cosine QPSK Signal Generator. 18.4 DSK Implementation in C 310 18.4.1 A Root-Raised-Cosine Pulse Shaped QPSK Transmitter 310 18.4.2 A More Efficient RRC Pulse Shaped QPSK Transmitter 312 18.4.3 Summary of Real-Time Code 315 18.5 Higher-Order Modulation Schemes 315 18.6 Follow-On Challenges 316 19 Project 10: QPSK Digital Receivers 317 19.1 Theory 317 19.2 windsk8 Demonstration 318 19.3 MATLAB Implementation 319 19.3.1 Through the AGC 320 19.3.2 A complete QPSK receiver 323 19.4 DSK Implementation in C 329 19.4.1 Through the AGC 329 19.4.2 A complete QPSK receiver 333 19.4.3 System Testing 339 19.5 Follow-On Challenges 340 Section III: Appendices 343 A Code Composer Studio: An Overview 345 A.l Introduction 345 A.2 Starting Code Composer Studio 345 A. 3 Conclusion 346 B DSP/BIOS 349 B. l Introduction 349 B.l.l DSP/BIOS Major Features 349 B.1.2 DSP/BIOS Threads 349 B. 2 DSP/BIOS Sample Projects 350 C Numeric Representations 351 C. l Endianness 351 C.2 Integer Representations 352 C.3 Integer Division and Rounding 353 C.4 Floating-Point Representations 354 C.5 Fixed-Point Representations 356

CONTENTS xvii C.6 Summary of Numeric Representations 357 D TMS320C6x Architecture 359 D. l Computer Architecture Basics 359 D.l.l Instruction Set Architecture 360 D.1.2 Register Architectures 360 D.l.3 Memory Architectures 361 D.1.4 Fetch-Execute Model 362 D.l.5 Pipelining 362 D.l.6 Single- versus Multiple-Issue 365 D.1.7 Scheduling 365 D.2 TMS320C671x Architecture 366 D.2.1 Memory System 368 D.2.2 Pipeline and Scheduling 369 D.2.3 Peripherals 370 D. 2.4 Host Port Interface 370 D. 3 TMS320C674x Architecture 370 E Related Tools for DSKs 373 E. l Introduction 373 E.2 Windows Control Applications 373 E. 2.1 Sample Windows Control Application 374 E.3 MATLAB Exports 374 E.3.1 Exporting Direct-Form II Implementations 374 E.3.2 Exporting Second-Order Section Implementations 375 E.4 MATLAB Real-Time Interface 376 F Programming Perils and Pitfalls 377 F. l Debug versus Release Builds 377 F.2 The Volatile Keyword 377 F.3 Function Prototypes and Return Types 378 F.4 Arithmetic Issues 379 F.5 Controlling the Location of Variables in Memory 380 F.6 Real-Time Schedule Failures 381 F.7 Variable Initialization 382 F.8 Integer Data Sizes 383 G Abbreviations, Acronyms, and Symbols 385 References 391 Index 397