ECE 301 Digital Electronics Derivation of Flip-Flop Input Equations and State Assignment (Lecture #24) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.
Sequential Circuit Design 1. Understand specifications 2. Draw state graph (to describe state machine behavior) 3. Construct state table (from state graph) 4. Perform state reduction (if necessary) 5. Assign a binary value to each state (state assignment) 6. Create state transition table 7. Select type of Flip-Flop to use 8. Derive Flip-Flop input equations and FSM output equation(s) 9. Draw circuit diagram Spring 2011 ECE 301 - Digital Electronics 2
Derivation of Flip-Flop Input Equations Spring 2011 ECE 301 - Digital Electronics 3
Derivation of FF Input Equations Example #2: Derive the Flip-Flop input equations for the FSM described by the following state table. Assume that JK Flip-Flops are used in the design. Excitation Table: Q Q + J K 0 0 0 x 0 1 1 x 1 0 x 1 1 1 x 0 Spring 2011 ECE 301 - Digital Electronics 4
Example #2: FF Input Equations Present Next State Output State X = 0 X = 1 X = 0 X = 1 S0 S1 S2 0 1 S1 S2 S3 0 0 S2 S3 S0 1 0 S3 S0 S1 0 1 State Table Spring 2011 ECE 301 - Digital Electronics 5
Example #2: FF Input Equations 1. Assign a binary value to each state. 2. Construct the state transition table. A + B + J A K A J B K B AB X = 0 X = 1 X = 0 X = 1 X = 0 X = 1 00 01 10 11 Spring 2011 ECE 301 - Digital Electronics 6
Example #2: FF Input Equations 3. Construct K-maps for Flip-Flop inputs. 4. Derive the minimized FF input equation. J A = K A = Spring 2011 ECE 301 - Digital Electronics 7
Example #2: FF Input Equations 3. Construct K-maps for Flip-Flop inputs. 4. Derive the minimized FF input equation. J B = K B = Spring 2011 ECE 301 - Digital Electronics 8
Derivation of FF Input Equations Example #3: Derive the Flip-Flop input equations for the FSM described by the following state table. Assume that SR Flip-Flops are used in the design. Excitation Table: Q Q + S R 0 0 0 x 0 1 1 0 1 0 0 1 1 1 x 0 Spring 2011 ECE 301 - Digital Electronics 9
Example #3: FF Input Equations Present Next State Output State X = 0 X = 1 X = 0 X = 1 S0 S1 S2 0 1 S1 S2 S3 0 0 S2 S3 S0 1 0 S3 S0 S1 0 1 State Table Spring 2011 ECE 301 - Digital Electronics 10
Example #3: FF Input Equations 1. Assign a binary value to each state. 2. Construct the state transition table. A + B + S A R A S B R B AB X = 0 X = 1 X = 0 X = 1 X = 0 X = 1 00 01 10 11 Spring 2011 ECE 301 - Digital Electronics 11
Example #3: FF Input Equations 3. Construct K-maps for Flip-Flop inputs. 4. Derive the minimized FF input equation. S A = R A = Spring 2011 ECE 301 - Digital Electronics 12
Example #3: FF Input Equations 3. Construct K-maps for Flip-Flop inputs. 4. Derive the minimized FF input equation. S B = R B = Spring 2011 ECE 301 - Digital Electronics 13
State Assignment Spring 2011 ECE 301 - Digital Electronics 14
State Assignment After the number of states in the state table has been reduced A binary value must be assigned to each of the states. State assignment (or state encoding) Binary value = state of Flip-Flops The cost of the logic required to realize the FSM is dependent on the state assignment. Spring 2011 ECE 301 - Digital Electronics 15
State Assignment Given: A FSM with three states. Requires: Two Flip-Flops (A and B) Can implement a maximum of four states. There are 4 x 3 x 2 = 24 possible state assignments. Spring 2011 ECE 301 - Digital Electronics 16
State Assignment For a FSM realized using symmetrical Flip- Flops (i.e. JK and SR) 3 unique state assignments for 3-state FSM 3 unique state assignments for 4-state FSM Binary Gray Code Spring 2011 ECE 301 - Digital Electronics 17
State Assignment Spring 2011 ECE 301 - Digital Electronics 18
Guidelines for State Assignment The author provides a set of guidelines by which the optimal state assignment can be selected. Spring 2011 ECE 301 - Digital Electronics 19
One-Hot State Assignment Sometimes, reducing the next-state logic is more important than reducing the number of Flip-Flops. One-hot state assignment may result in minimal next-state logic. Uses one Flip-Flop per state. Exactly one Flip-Flop is set to 1 for each state. Spring 2011 ECE 301 - Digital Electronics 20
Example: State Assignments For a 4-state FSM, three possible state assignments are: State Binary Gray-code One-hot S 0 00 00 0001 S 1 01 01 0010 S 2 10 11 0100 S 3 11 10 1000 # of FF 2 2 4 Spring 2011 ECE 301 - Digital Electronics 21
Example: State Assignments Binary state-assignment: Present Next State State X = 0 X = 1 S0 S1 S2 S1 S2 S3 S2 S3 S0 S3 S0 S1 State Table A + B + AB X = 0 X = 1 00 01 10 01 10 11 10 11 00 11 00 01 State Transition Table Spring 2011 ECE 301 - Digital Electronics 22
Example: State Assignments Gray-code state-assignment: Present Next State State X = 0 X = 1 S0 S1 S2 S1 S2 S3 S2 S3 S0 S3 S0 S1 State Table A + B + AB X = 0 X = 1 00 01 11 01 11 10 11 10 00 10 00 01 State Transition Table Spring 2011 ECE 301 - Digital Electronics 23
Example: State Assignments One-hot state-assignment: Present Next State State X = 0 X = 1 S0 S1 S2 S1 S2 S3 S2 S3 S0 S3 S0 S1 State Table A + B + C + D + ABCD X = 0 X = 1 0001 0010 0100 0010 0100 1000 0100 1000 0001 1000 0001 0010 State Transition Table Spring 2011 ECE 301 - Digital Electronics 24
Questions? Spring 2011 ECE 301 - Digital Electronics 25