High Density Asynchronous LUT Based on Non-Volatile MRAM Technology
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1 20th International Conference on Field Programmable Logic and Applications Milano, ITALY, Aug. 31st - Sep. 2nd, 2010 High Density Asynchronous LUT Based on Non-Volatile MRAM Technology Sumanta Chaudhuri, Weisheng Zhao, Jacques-Oliver Klein, Claude Chappert, Institut dʼelectronique Fondamentale CNRS UMR8622 Université Paris-Sud 11 France Pascale Mazoyer ST-Microelectronics 1
2 Outline Introduction and motivation Asynchronous FPGA Magnetic RAM (MRAM) MRAM based synchronous FPGA MRAM based Asynchronous LUT Operation and Configuration Hybrid Simulation Conclusion 2
3 Why Asynchronous FPGA? SRAM Higher throughput Lower power (Smaller die area) Input Look Up Table Flip-Flop Clk Output Configurable logic block (CLB) SRAM based synchronous FPGA R. Manohar, HPEC 2009 Asynchronous FPGA 3
4 Why Magnetic RAM (MRAM)? Leakage issue : Configuration memory and FF! SRAM Look Up Table Flip-Flop Input Output Clk Configurable logic block (CLB) SRAM based synchronous FPGA Non-volatile memory is required Power ON ON Power OFF 4 Conventional CMOS technology ON Power OFF W/O loss of data! Zero standby power
5 Why Magnetic RAM (MRAM)? High Write/Read Access speed High density and 3D integration Infinite endurance Low Write/Read power Radiation hardness ( product( st Commercial MRAM Storage based on the spin property of electron Thermally Assisted Switching (TAS) Approach: 2011 Spin Transfer Torque (STT) Approach: 2012 Field induced Magnetic Switching (FIMS): High switching power and errors!! 5
6 MRAM based Synchronous FPGA MRAM Look Up Table Magnetic Flip-Flop Input Output Clk Configurable logic block (CLB) MRAM based synchronous FPGA WS. ZHAO et al., FPT, 2007 WS. ZHAO et al., ACM TECS, 2009 Y. Guillemenet, et al., FPL, 2008 Qbar Qbar Q SEN Q SEN 6
7 MRAM based Synchronous FPGA Zero standby power Dynamic Reconfiguration Multi-context configuration instant on/off Radiation hardness 3D integration: high density and high access speed High dynamic power, in particular for the Magnetic Flip-Flop WS. ZHAO et al., IEEE-ICSICT, 2006 Need to be reduced... N. SAKIMURA et al., IEEE-CICC,
8 MRAM based Asynchronous FPGA Higher throughput Lower power Lower dynamic power Zero standby power (MRAM) Smaller die area or high density Without global clock Without external memory (MRAM) Dynamic configuration and multi-context configuration (MRAM) Instant on/off capability (MRAM) Radiation hardness (MRAM) What s the circuits, architectures, control protocol? 8
9 Outline Introduction and motivation Asynchronous FPGA Magnetic RAM (MRAM) MRAM based synchronous FPGA MRAM based Asynchronous LUT Operation and Configuration Hybrid Simulation Conclusion 9
10 Pre-Charge Sense Amplifier(PCSA) for MRAM: Qbar WS. ZHAO et al., IEEE TMAG, 2009 WS. ZHAO et al., FPT, 2007 WS. ZHAO et al., ACM TECS, 2009 Y. Guillemenet, et al., FPL, 2008 Q Q 10 Sensing delay< 200ps High sensing speed High reliability Easy to realize multi-context Small die area
11 PCSA based Magnetic LUT (MLUT): PCSA Output Input Decoder PCSA based Magnetic LUT (MLUT) Less transistors than 6-T SRAM LUT Example of 1-input MLUT 11
12 Asynchronous Configurable Logic Block (CLB) A0 A1 "0" + req A0 A1 "1" + req nputs valid evaluate /precharge D0 D1 ACK PCSA MRAM circuits and Pre-Charge Principle based protocol 12
13 (Re)configuration of asynchronous MRAM LUT: Thermally Assisted Switching (TAS) Approach Configuration circuits JP. Nozieres et al., US , 2006 The drivers can be shared globally 13
14 Multi-context of asynchronous MRAM LUT: Multi-context can be easily implemented and only one selection transistor is used for one bit in each context 14
15 Hybrid MRAM/CMOS Simulations: MALUT Configuration CMOS 130nm (STMicro) MRAM 120nm M. Elbaraji et al., JAP, 2010 Whole configuration delay is about 25ns 15
16 Hybrid MRAM/CMOS Simulations: MALUT Operation CMOS 130nm (STMicro) MRAM 120nm M. Elbaraji et al., JAP, 2010 Operation speed: ~1GHz The 2-input asynchronous CLB has been configured with a bit-stream
17 Prototype Development: layout examples Hybrid design kit CMOS 130nm (STMicro) MRAM 120nm Layout of a 4-input MALUT With 8 contexts 17
18 Conclusion 1 st MRAM based Asynchronous LUT Higher throughput (~1GHz) Lower power Smaller die area or high density Dynamic configuration and multi-context configuration Instant on/off capability Radiation hardness Circuits: Pre-Charge Sense Amplifier Architectures: Pre-Charge Asynchronous protocol based Simulations: TAS-MRAM + CMOS 130nm and 65nm Prototypes: 8 contexts asynchronous LUT (130nm technology) Innovative routing architecture 18
19 20th International Conference on Field Programmable Logic and Applications Milano, ITALY, Aug. 31st - Sep. 2nd, 2010 Thank you for your attention! 19
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