unit: mm 3196-DIP30SD

Transcription

1 Ordering number :EN4846A CMOS IC LC7476, 7476M On-Screen Display LSI Overview The LC7476 and LC7476M are on-screen display CMOS LSIs that superimpose text and low-level graphics onto a TV screen (video signal) under microcontroller. The display characters have a 2 by 8 dots structure, and 256 characters are provided. Features Display structure: 2 lines by 24 characters (up to 288 characters) Maximum character display: Up to 288 characters Character configuration: 2 (W) by 8 (H) dots structure Number of characters: 256 characters (254 plus space font and transparent space font) Character sizes: Three sizes (normal, double, and triple sizes) Display starting positions: 64 horizontal and 64 vertical locations Reverse video function: Characters can be inverted on a per character basis. Flashing types: Two types with periods of.5 and. second on a per character basis (duty fixed at 5%) Background color: One of eight colors (when internal synchronization used) External control input: Serial data input in 8-bit units Built-in horizontal/vertical sync separation circuit, AFC circuit, and synchronization detector Video output: Composite video signal output in NTSC, PAL, PAL-M, PAL-N, PAL6, NTSC4.43, or SECAM format Package Dimensions unit: mm 396-DIP3SD [LC7476] unit: mm 326A-MFP3S [LC7476M] SANYO: DIP3SD SANYO: MFP3S SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., -, Chome, Ueno, Taito-ku, TOKYO, -5 JAPAN 396HA (OT)/N2894TH (OT) No /2

2 Specifications Absolute Maximum Ratings at Ta = 25 C Parameter Symbol Conditions Ratings Unit Maximum supply voltage V DD max V DD, V DD2 pins V SS.3 to V SS + 7. V Maximum input voltage V IN max All input pins V SS.3 to V DD +.3 V Maximum output voltage V OUT max HSYNC OUT, VSYNC OUT, SYNC DET pins V SS.3 to V DD +.3 V Allowable power dissipation Pd max 3 mw Operating temperature Topr 3 to +7 C Storage temperature Tstg 4 to +25 C Allowable Operating Ranges at Ta = 3 to +7 C Supply voltage Input high level voltage Parameter Symbol Conditions Ratings min typ max V DD V DD pin V V DD2 V DD2 pin V DD V V IH RST, CS, SIN, SCLK pins.8 V DD V DD +.3 V V SECAM, 525/625, IH2.7 V DD V DD +.3 V NTSC/PAL, 3.58/4.43 pins V IL RST, CS, SIN, SCLK pins V SS.3.2 V DD V Input low level voltage V SECAM, 525/625, IL2 NTSC/PAL, 3.58/4.43 pins V SS.3.3 V DD V Input voltage V IN FC, AMP IN pins V SS.3 V DD +.3 V V IN CVIN pins 2 V PP V Composite video signal input voltage V IN2 CV CR pins 2 V PP V V IN3 SYNC IN pins 2 V PP 2.5 V PP V Oscillator frequency NTSC 4.38 MHz Xtal F IN, Xtal OUT, Xtal IN2, PAL MHz OSC Xtal OUT2 pins; 4fsc PAL-M 4.32 MHz PAL-N MHz Electrical Characteristics at Ta = 3 to +7 C, with V DD = V DD2 = 5 V unless otherwise specified Ratings Parameter Symbol Conditions min typ max Unit Output off leakage current I leak CV OUT pin µa Input off leakage current I leak2 CV IN, CV CR pins µa Output high level voltage V OH SYNC DET, SECAM, 525/625, NTSC/PAL, 3.58/4.43, AMP OUT, HSYNC OUT, VSYNC OUT, PD OUT pins; V DD = 4.5 V, I OH =. ma Output low level voltage V OL SYNC DET, SECAM, 525/625, NTSC/PAL, 3.58/4.43, AMP OUT, HSYNC OUT, VSYNC OUT, PD OUT pins; V DD = 4.5 V, I OL =. ma Unit 3.5 V. V RST, CS, SIN, SCLK, SECAM, 525/625, I IH µa NTSC/PAL, 3.58/4.43 pins; V IN = V DD Input current SECAM, 525/625, NTSC/PAL, I IL µa 3.58/4.43 pin; V IN = V SS Oscillator frequency F OSC3 VCO IN, VCO OUT pins; FC = /2 V DD 4.2 MHz Operating current dissipation I DD V DD pin; All outputs open, Xtal: 4fsc 5 ma I DD2 V DD2 pin; V DD2 = 5. V 2 ma Timing Characteristics at Ta = 3 to +7 C, V DD = 5 ±.5 V Minimum input pulse width Data setup time Data hold time One word write time Parameter Symbol Conditions LC7476, 7476M Ratings min typ max t W(SCLK) SCLK pin 2 ns t W(CS) CS pin (during periods when CS is high) µs t SU(CS) CS pin 2 ns t SU(SIN) SIN pin 2 ns t h(cs) CS pin 2 µs t h(sin) SIN pin 2 ns t word Write time for 8 bits of data 4.2 µs t wt RAM data write time µs Unit No /2

3 LC7476, 7476M Pin s Pin No. Symbol Description V SS Ground Ground connection 2 Xtal IN Connection for the crystal and capacitor used to form the crystal oscillator that generates Crystal oscillator connection 3 Xtal the internal synchronization signal. The oscillator can be selected with a command switch. OUT Horizontal synchronization Outputs the horizontal synchronization signal (AFC). The output polarity can be selected 4 HSYNC OUT output (metal option). Also functions as general output port (command switch). 5 Xtal IN2 Connection for the crystal and capacitor used to form the crystal oscillator that generates Crystal oscillator connection 6 Xtal the internal synchronization signal. OUT2 7 VSYNC OUT Vertical synchronization output Outputs the vertical synchronization signal. The output polarity can be selected (metal option). Also functions as general output port (command switch). 8 CS Enable input Enables/disables serial data input. Serial data is enabled when this pin is low (hysteresis input). Pull-up resistor built in (metal option). 9 SIN Data input Serial data input (hysteresis input). Pull-up resistor built in (metal option). SCLK Clock input Clock input for serial data input (hysteresis input). Pull-up resistor built in (metal option). SECAM 2 525/625 3 NTSC/PAL SECAM mode switch input/ output (command switch) 525/625 switch input/output (command switch) NTSC/PAL switch input/output (command switch) During input, switches between SECAM and other modes. During output, functions as general output port or internal V output (command switch). Low = other modes, high = SECAM mode During input, switches between 525 scan lines and 625 scan lines. During output, functions as general output port or character data output (command switch). Low = 525 lines, high = 625 lines Switches the color mode between NTSC and PAL. During output, functions as general output port or frame data output (command switch). Low = NTSC, high = PAL Switch FSC between 3.58 MHz and 4.43 MHz / /4.43 switch input/output During output, functions as general output port or half-tone output (command switch). (command switch) Low = 3.58, high = RST Reset input System reset input pin, low is active (hysteresis input). Pull-up resistor built in (metal option). 6 CV OUT Video signal output Composite video output 7 V DD2 Power supply connection Power supply connection for composite video signal level generation 8 CV IN Video signal input Composite video input 9 CV CR Video signal input SECAM chroma signal input 2 SYNC IN Sync separator circuit input Built-in sync separator circuit video signal input 2 SEP C Sync separator circuit Built-in sync separator circuit 22 V SS Ground Ground connection 23 PD OUT Control voltage output AFC control voltage output 24 AMP IN AFC filter connection Filter connection 25 AMP OUT 26 FC Control voltage input AFC control voltage input 27 VCO IN LC oscillator connection VCO LC oscillator circuit coil and capacitor connection 28 VCO OUT Outputs the exclusive NOR of the horizontal synchronization signal (AFC) and CSYNC (sync External synchronization signal 29 SYNC DET separator). The output polarity can be selected (metal option). Also functions as general detection output output port (command switch). 3 V DD Power supply connection Power supply connection (+5 V: digital system power supply) No /2

4 LC7476, 7476M Pin Assignment Top view Serial Data Input Timing No /2

5 LC7476, 7476M System Block Diagram No /2

6 LC7476, 7476M Display Control Commands Display control commands are input in an 8-bit serial format. Commands consist of a command identification code in the first byte and data in the second and following bytes. The following commands are supported. COMMAND: Display memory (VRAM) write address setting command 2 COMMAND: Display character data write command 3 COMMAND2: Vertical display start position and character size (lines and 2) setting command 4 COMMAND3: Horizontal display start position and character size (lines 9 and ) setting command 5 COMMAND4: Display control setting command 6 COMMAND5: Display control setting command 2 7 COMMAND6: Display control setting command 3 8 COMMAND7: Display control setting command 4 Display Control Command Table Command Command identification code Data Data COMMAND V3 V2 V V H4 H3 H2 H H Write address COMMAND at2 at c7 c6 c5 c4 c3 c2 c c Character write COMMAND2 SZ SZ SZ SZ VP VP VP VP VP VP Vertical display start position COMMAND3 SZ SZ SZ SZ HP HP HP HP HP HP Horizontal display start position B B COMMAND4 RST RAM OSC RND I/N BLK BLK BK ATS DSP Display control COMMAND5 PH PH PH I/E TST CHAL BLK RSL RSL CVM XTS Display control 2 2 COMMAND6 MOD MOD MOD MOD HFI M3S SMS IOS BCL BCL CB Display control COMMAND7 LINS VCOS LIN LIN LIN LIN LIN LIN Display control COMMAND7 LINS EG PS PS VMN SVIS VNS VSS Display control COMMAND72 LINS MOD MOD MOD MOD Display control COMMAND73 LINS VCOS SOUT VOUT HOUT Display control 7 2 Once the command identification code in the first bite is written, it is stored internally until the first byte of the following command is written. However, when the display character data write command (COMMAND) is written, the system becomes locked in display character data write mode, and the first byte cannot be overwritten. When the CS pin is set high the command state is set to COMMAND, i.e., display memory write address setting mode. No /2

7 COMMAND: Display Memory Write Address Setting Command First data byte LC7476, 7476M DA to DA7 Register name 7 6 The command identification code: 5 sets the display memory write address. 4 3 V3 2 V2 V V Display memory line address (from to B (hexadecimal)) DA to DA7 Register name 7 identification code H4 3 H3 2 H2 Display memory character address (from to 7 (hexadecimal)) H H : When the chip is reset by the RST pin, the register states (bits) are all cleared to. 2 COMMAND: Display Character Data Write Setting Command DA to DA7 Register name 7 6 The command identification code: 5 sets the display memory write address Turns character attribute 2 off. at2 Turns character attribute 2 on. Turns character attribute off. at Turns character attribute on. When this command is entered, the chip locks in display character write mode until the CS pin is set high. Specifies highlight or flashing. Specifies reverse video. No /2

8 LC7476, 7476M DA to DA7 Register name 7 c7 6 c6 5 c5 4 c4 3 c3 Character code (from to FF (hexadecimal)) 2 c2 c c : When the chip is reset by the RST pin, the register states (bits) are all cleared to. 3 COMMAND2: Vertical Display Position Setting Command DA to DA7 Register name 7 6 The command 2 identification code: 5 sets the vertical display position. 4 3 SZ2 2 SZ2 SZ SZ SZ2 SZ2 Normal size Double size Triple size Normal size SZ SZ Normal size Double size Triple size Normal size Character size for the second line Character size for the first line DA to DA7 Register name 7 identification code 6 VP5 The vertical display start position is given by 5 (MSB) 5 VS = H ( Σ 2 n VPn) n = 4 VP4 where H is the horizontal synchronization pulse period. 3 VP3 2 VP2 VP The six bits VP to VP5 specify the vertical display start position. The weight of the lsb is H. VP (LSB) : When the chip is reset by the RST pin, the register states (bits) are all cleared to. No /2

9 4 COMMAND3: Horizontal Display Position Setting Command LC7476, 7476M DA to DA7 Register name 7 6 The command 3 identification code: 5 sets the horizontal display position. 4 3 SZB 2 SZB SZ9 SZ9 SZB SZB Normal size Double size Triple size Normal size SZ9 SZ9 Normal size Double size Triple size Normal size The character size for the eleventh line. The character size for the ninth line. DA to DA7 Register name 7 identification code HP4 3 HP3 2 HP2 HP HP5 (MSB) The horizontal display start position is given by The six bits HP to HP5 specify the 5 HS = Tc ( Σ 2 vertical display start position. n HPn) n = The weight of the lsb is x Tc. where Tc is the period of the OSCIN and OSCOUT oscillator in operating mode. HP (LSB) : When the chip is reset by the RST pin, the register states (bits) are all cleared to. 5 COMMAND4: Display Control Setting Command DA to DA7 Register name 7 6 The command 4 identification code: 5 sets display control parameters. 4 This reset occurs when the CS pin goes 3 RST SYS low, and the reset state cleared when Resets all registers. (Clears all registers to.) the CS pin goes high. The RAM erase function requires at 2 RAM ERS least 5 µs. Erases display RAM. (Sets display RAM to FF (hexadecimal).) It is executed on DSPOFF. Continues crystal oscillator operation. Only valid with character display off if OSC STP Stops the crystal oscillator. external synchronization is used. Turns off rounding. Only valid for double and triple size RND SEL Turns on rounding. characters. No /2

10 LC7476, 7476M DA to DA7 Register name 7 identification code Interlaced Switches between interlaced and 6 INT/NON Non-interlaced non-interlaced display. 5 BLK BLK BLK Changes the blanking size. Blanking off Character size blanking 4 BLK Frame size blanking Total area blanking Flashing period about.5 s 3 BK Sets the flashing period. Flashing period about s Highlight function 2 ATS Selects at2. Flashing function Character display off DSPON Turns character output on and off. Character display on : When the chip is reset by the RST pin, the register states (bits) are all cleared to. 6 COMMAND5: Display Control Setting Command 2 DA to DA7 Register name 7 6 The command 5 identification code: 5 sets display control parameters. 4 3 PH2 2 PH PH INT/EXT PHASE 2 PHASE PHASE Background color (phase) NTSC PAL π/2 ±π/2 In phase In phase Sets the phase of the background color 3 π/2 π/2 for color burst.sz π ±π 3 π/4 ±3 π/4 π/4 ±π/4 7 π/4 π/4 5 π/4 3 π/4 External synchronization mode Switches between internal and external Internal synchronization mode synchronization. ± ± ± No /2

11 LC7476, 7476M DA to DA7 Register name 7 identification code 6 TST 5 CHAL 4 BKL 3 RSL 2 RSL CVoutmt Normal operation Test mode should not be used. This bit Test mode should always be zero. Sets the character intensity level to about 85 IRE (bright white). Sets the character intensity level to about 72 IRE (white with a touch of grey). Sets the blanking intensity level to about 3 IRE (a deep black as a frame level). Sets the blanking intensity level to about 3 IRE (a dark grey as a frame level). RSL RSL Intensity level Amplitude About 5 IRE About 6 IRE About 3 IRE About 6 IRE About 45 IRE About 6 IRE About 55 IRE About 65 IRE Normal CV out output CV out pedestal level output Selects XTAL XTALsel Selects XTAL2 : When the chip is reset by the RST pin, the register states (bits) are all cleared to. Switches the character intensity level. Switches the blanking intensity level. Switches the background intensity level. Switches the oscillator circuit 7 COMMAND6: Display Control Setting Command 3 DA to DA7 Register name 7 6 The command 6 identification code: 5 sets display control parameters. 4 3 MOD3 2 MOD2 MOD MOD Sets Fsc to 3.58 MHz. The logical or of this bit and the Fsc Sets Fsc to 4.43 MHz. switching input pin (pin 4) is used. Sets the color mode to NTSC. The logical or of this bit and the color mode switching input pin (pin 3) is Sets the color mode to PAL. used. Sets the number of scan lines to 525 lines. The logical or of this bit and the scan line count switching input pin (pin 2) is Sets the number of scan lines to 625 lines. used. Sets the mode to a mode other than SECAM. The logical or of this bit and the mode Sets the mode to SECAM mode. switching input pin (pin ) is used. No /2

12 LC7476, 7476M DA to DA7 Register name 7 identification code 6 HALF Normal mode INT Half internal synchronous mode 5 P4OUT Half tone output SEL High output in internal synchronous mode Selects P4 (3.58/4.43) output. 4 SECAM In SECAM mode, only the character frame area is on. SEL In SECAM mode, the entire character display area is on. Selects the CVCR on period. 3 IOS Sets the mode setting pin to be an input pin. Switches the input/output direction of Sets the mode setting pin to be an output pin. the mode setting pins. BCOL BCOL Background color 2 BCOL Background color displayed Determines whether a background color in internal No background color (about 3 IRE) is displayed. (Only valid BCOL No background color (about 23 IRE) synchronization mode.) CV outmt2 (CSYNC) Outputs a color burst signal. Only valid when either BCOL is or CBOFF Stops the output of color burst signals. BCOL is. : When the chip is reset by the RST pin, the register states (bits) are all cleared to. 8 COMMAND7: Display Control Setting Command 4 DA to DA7 Register name 7 6 The command 7 identification code: 5 sets display control parameters Expansion command identification code LINS Selects the lower 6 bits (bits to 5) Selects the upper or lower six bits when Selects the upper 6 bits (bits 6 to B) halftone output line mode is specified. DA to DA7 Register name 7 identification code 6 VCO VCO frequency is 4.2 MHz SELECT VCO frequency is 7.7 MHz Selects VCO oscillation frequency. 5 LIN5 Turns off (low) sixth line halftone output. Used for the line 2 setting when LINS Turns on (high) sixth line halftone output. is high. 4 LIN4 Turns off (low) fifth line halftone output. Used for the line setting when LINS Turns on (high) fifth line halftone output. is high. 3 LIN3 Turns off (low) fourth line halftone output. Used for the line setting when LINS Turns on (high) fourth line halftone output. is high. 2 LIN2 Turns off (low) third line halftone output. Used for the line 9 setting when LINS is Turns on (high) third line halftone output. high. LIN Turns off (low) second line halftone output. Used for the line 8 setting when LINS is Turns on (high) second line halftone output. high. LIN Turns off (low) first line halftone output. Used for the line 7 setting when LINS is Turns on (high) first line halftone output. high. : When the chip is reset by the RST pin, the register states (bits) are all cleared to. No /2

13 9 COMMAND7: Display Control Setting Command 5 DA to DA7 Register name 7 6 The command 7 identification code: sets display 5 control parameters Expansion command identification code LINS LC7476, 7476M Selects lower 6 bits ( to 5). Selects lower or upper 6 bits for half Selects upper 6 bits (6 to B). tone output line setting. DA to DA7 Register name 7 identification bit VINPsel VNPsel EGMODE Normal display 2SELECT Apply frame to inverted characters also. PORTSET Set port output data SELECT2 Set port (output switching) PORTSET Set port output data SELECT Set port (output switching) VMN Normal V signal SEL VMASK signal Normal I/O V is input from P. V rise detection V fall detection VSEP is about 9.3 µs. VSEPsel VSEP is about 8.6 µs. : When the chip is reset by the RST pin, the register states (bits) are all cleared to. Selects V detection polarity. Selects V separation time. COMMAND72: Display Control Setting Command 6 DA to DA7 Register name 7 6 The command 7 identification code: sets display 5 control parameters Expansion command 2 identification code LINS Selects lower 6 bits ( to 5). Selects lower or upper 6 bits for half Selects upper 6 bits (6 to B). tone output line setting. No /2

14 LC7476, 7476M DA to DA7 Register name 7 identification bit MOD3 Normal MOD3 (P4) output (PS = ) Specifies port output data SEL Specifies MOD3 general port output when PS =. 2 MOD2 Normal MOD2 (P3) output (PS = ) Specifies port output data SEL Specifies MOD2 general port output when PS =. MOD Normal MOD (P2) output (PS =) Specifies port output data SEL Specifies MOD general port output when PS =. MOD Normal MOD (P) output (PS = ) Specifies port output data SEL Specifies MOD general port output when PS =. : When the chip is reset by the RST pin, the register states (bits) are all cleared to. COMMAND73: Display Control Setting Command 7 DA to DA7 Register name 7 6 The command 7 identification code: sets display 5 control parameters Expansion command 3 identification code LINS Selects lower 6 bits ( to 5). Selects lower or upper 6 bits for half Selects upper 6 bits (6 to B). tone output line setting. DA to DA7 Register name 7 identification bit VCP No feedback resistance Specifies VCO oscillator feedback SELECT2 Feedback resistance resistance connection 2 SDETOUT Normal SOUT (P29) output (PS2 = ) Specifies port output data SEL Specifies SOUT general port output when PS2 =. VOUT Normal VOUT (P7) output (PS2 =) Specifies port output data SEL Specifies VOUT general port output when PS2 =. HOUT Normal HOUT (P4) output (PS2 = ) Specifies port output data SEL Specifies HOUT general port output when PS2 =. : When the chip is reset by the RST pin, the register states (bits) are all cleared to. No /2

15 LC7476, 7476M Display Configuration The display consists of 2 rows of 24 characters each. Up to 288 characters can be displayed unless enlarged characters are displayed. Display memory addresses are expressed as a row address in the range to B (hexadecimal) and a column address in the range to 7 (hexadecimal). Display Configuration and Display Memory Addresses 24 characters by 2 rows No /2

16 LC7476, 7476M Composite Video Signal Output Levels (internally generated levels) Metal Option Output level Output voltage (VDC) Character level Character level Background high level Background high level 2.47 Burst high level.747 Frame level 2.6 Output level Output voltage (VDC) Frame level.465 Pedestal level.429 Background low level.22 Burst low level.8 Sync level.8 No /2

17 LC7476, 7476M Composite Video Signal Output Levels (internally generated levels) Metal Option Output level Output voltage (VDC) Character level 2.84 Character level Background high level Background high level Burst high level.943 Frame level 2.8 Output level Output voltage (VDC) Frame level.665 Pedestal level.624 Background low level.47 Burst low level.275 Sync level. No /2

18 LC7476, 7476M Composite Video Signal Output Levels (internally generated levels) Metal Option Output level Output voltage (VDC) Character level Character level Background high level Background high level Burst high level Frame level Output level Output voltage (VDC) Frame level 2.66 Pedestal level 2.8 Background low level.92 Burst low level.77 Sync level.5 No /2

19 LC7476, 7476M Application Circuit Diagram Signal format 4 Fsc (MHz) Signal format SW SW2 SW3 SW4 NTSC NTSC PAL PAL SECAM SECAM () () () PAL-M PAL-M PAL-N PAL-N NTSC NTSC4.43 PAL PAL6 : Fix SW to SW4 to when setting a mode by command. No /2

20 LC7476, 7476M No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January 996. Specifications and information herein are subject to change without notice. PS No /2