MF SED 1335 Series. LCD Controller ICs. Technical Manual

Transcription

1 MF67- SED 335 Series LCD Controller ICs

2 No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. In this manual, Zilog's Z8-CPU or its equivalent shall be called Z8, Intel's 885A or its equivalent shall be called 885 and Motorola's MC689 and MC682 or their equivalents shall be called 689 and 682, respectively. stands for registered trade mark. All other product names mentioned herein are trademarks and/or registered trademarks of their respective owners. Seiko Epson Corporation 999 All rights reserved.

3 CONTENTS CONTENTS. OVERVIEW FEATURES BLOCK DIAGRAM PINOUTS PIN DESCRIPTION SED335FA/B Pin Summary Pin Functions Power supply Oscillator Microprocessor interface Display memory control LCD drive signals SPECIFICATIONS Absolute Maximum Ratings SED SED335F Timing Diagrams family interface timing family interface timing Display memory read timing Display memory write timing SLEEP IN command timing External oscillator signal timing LCD output timing PACKAGE DIMENSIONS SED335FA SED335FB INSTRUCTION SET The Command Set System Control Commands SYSTEM SET C M M M W/S IV FX WF FY C/R TC/R L/F AP SLEEP IN Display Control Commands DISP ON/OFF D FC FP SCROLL C SL, SL SED335 Series EPSON i

4 CONTENTS CSRFORM CRX CRY CM CSRDIR OVLAY MX, MX DM, DM OV CGRAM ADR HDOT SCR D to D Drawing Control Commands CSRW CSRR Memory Control Commands MWRITE MREAD DISPLAY CONTROL FUNCTIONS Character Configuration Screen Configuration Screen configuration Display address scanning Display scan timing Cursor Control Cursor register function Cursor movement Cursor display layers Memory to Display Relationship Scrolling On-page scrolling Inter-page scrolling Horizontal scrolling Bidirectional scrolling Scroll units CHARACTER GENERATOR CG Characteristics Internal character generator External character generator ROM Character generator RAM CG Memory Allocation Setting the Character Generator Address M = CG RAM addressing example Character Codes MICROPROCESSOR INTERFACE System Bus Interface series series Microprocessor Synchronization Display status indication output Internal register access Display memory access Interface Examples Z8 to SED335 series interface to SED335 series interface... 6 ii EPSON SED335 Series

5 CONTENTS 2. DISPLAY MEMORY INTERFACE Static RAM Supply Current during Display Memory Access OSCILLATOR CIRCUIT STATUS FLAG RESET APPLICATION NOTES Initialization Parameters SYSTEM SET instruction and parameters Initialization example Display mode setting example : combining text and graphics Display mode setting example 2: combining graphics and graphics Display mode setting example 3: combining three graphics layers System Overview System Interconnection SED335F Smooth Horizontal Scrolling Layered Display Attributes Inverse display Half-tone display Menu pad display Graph display Flashing areas Small area Large area dot Graphic Display Command usage Kanji character display INTERNAL CHARACTER GENERATOR FONT GLOSSARY OF TERMS Request for Information on SED335 Series SED335 Series EPSON iii

6 OVERVIEW/FEATURES. OVERVIEW The SED335 series is a controller IC that can display text and graphics on LCD panel. The SED335 series can display layered text and graphics, scroll the display in any direction and partition the display into multiple screens. The SED335 series stores text, character codes and bitmapped graphics data in external frame buffer memory. Display controller functions include transferring data from the controlling microprocessor to the buffer memory, reading memory data, converting data to display pixels and generating timing signals for the buffer memory, LCD panel. The SED335 series has an internal character generator with 6, 5 7 pixel characters in internal mask ROM. The character generators support up to 64, 8 6 pixel characters in external character generator RAM and up to 256, 8 6 pixel characters in external character generator ROM. 2. FEATURES Text, graphics and combined text/graphics display modes Three overlapping screens in graphics mode Up to pixel LCD panel display resolution Programmable cursor control Smooth horizontal and vertical scrolling of all or part of the display /2-duty to /256-duty LCD drive Up to pixel LCD panel display resolution memory 6, 5 7 pixel characters in internal mask-programmed character generator ROM Up to 64, 8 6 pixel characters in external character generator RAM Up to 256, 8 6 pixel characters in external character generator ROM 68 and 88 family microprocessor interfaces Low power consumption 3.5 ma operating current (VDD = 3.5V),.5 µa standby current Package line-up Package SED335FA QFP5-6 pin SED335FB QFP6-6 pin 2.7 to 5.5 V (SED335F) SED335 Series EPSON

7 BLOCK DIAGRAM 3. BLOCK DIAGRAM Video RAM Character Generator RAM Character Generator ROM LCD VA to VA5 VCE VRD, VWR (SED335F/336F) VR/W (SED33F) VD to VD7 YSCL, YD, YDIS LP, WF XSCL XD to XD3 Video RAM Interface Input/Output Register LCD Controller Cursor Address Controller Display Address Controller Refresh Counter Dot Counter Character Generator ROM Layered Controller Microprocessor Interface Oscillator SEL SEL RES RD, WR A, CS D to D7 XG XD 2 EPSON SED335 Series

8 SED335 Series EPSON 3 4. PINOUTS SED335FA SED335FB Index SED335FB 6 3 XD3 D7 D6 D5 D4 D3 D2 D D VDD A CS XD XG SEL VD3 VD2 VD VD VA5 VA4 VA3 VA2 VA VA VA9 VA8 VA7 VA6 NC VD4 VD5 VD6 VD7 YSCL YD YDIS WF LP VSS XSCL XECL XD XD XD2 VA5 VA4 VA3 VA2 VA VA VWR VCE VRD RES NC NC RD WR SEL 2 Index SED335FOA VA8 VA9 VA VA VA2 VA3 NC VA4 VA5 VD VD VD2 XD CS A VDD D D D2 D3 D4 D5 D6 D7 XD3 XD2 XD XD XECL XSCL VSS LP WF YDIS YD YSCL VD7 VD6 VD5 VD4 VD3 XG SEL SEL2 WR RD NC NC RES VRD VCE VWR VA VA VA2 VA3 VA4 VA5 VA6 VA7 6 PINOUTS

9 PIN DESCRIPTION 5. PIN DESCRIPTION 5.. SED335FA/B Pin Summary Name SED335FA Number SED335FB Type Description VA to VA5 27 to 28 to 6 3 to 43 5 to 59 Output VRAM address bus VWR 44 7 Output VRAM write signal VCE 45 8 Output Memory control signal VRD 46 9 Output VRAM read signal RES 47 Input Reset NC 28, 48, 49, 2, 6 No connection RD 5 3 Input WR 5 4 Input SEL Input 88 family: Read signal 68 family: Enable clock (E) 88 family: Write signal 68 family: R/W signal 88 or 68 family interface select SEL 53 6 Input 88 or 68 family interface select XG 54 7 Input Oscillator connection XD 55 8 Output Oscillator connection CS 56 9 Input Chip select A 57 2 Input Data type select VDD 58 2 Supply 2.7 to 5.5V supply D to D7 59 to 6 to 6 22 to 29 Input/output Data bus XD to XD3 7 to 3 to 33 Output X-driver data XECL 34 Output X-driver enable chain clock XSCL 2 35 Output X-driver data shift clock VSS 3 36 Supply Ground LP 4 37 Output Latch pulse WF 5 38 Output Frame signal YDIS 6 39 Output Power-down signal when display is blanked YD 7 4 Output Scan start pulse YSCL 8 4 Output Y-driver shift clock VD to VD7 9 to to 49 Input/output VRAM data bus 4 EPSON SED335 Series

10 PIN DESCRIPTION 5.2. Pin Functions Power supply Pin Name Function 2.7 to 5.5V supply. VDD This may be the same supply as the controlling microprocessor. VSS Ground Note: The peak supply current drawn by the SED335 series may be up to ten times the average supply current. The power supply impedance must be kept as low as possible by ensuring that supply lines are sufficiently wide and by placing.47 µf decoupling capacitors that have good high-frequency response near the device s supply pins Oscillator Pin Name XG XD Function Crystal connection for internal oscillator (See section 3). This pin can be driven by an external clock source that satisfies the timing specifications of the EXT φ signal (See section 6.3.6). Crystal connection for internal oscillator. Leave this pin open when using an external clock source Microprocessor interface Pin Name Function D to D7 Tristate input/output pins. Connect these pins to an 8- or 6-bit microprocessor bus. Microprocessor interface select pin. The SED335 series supports both 88 family processors (such as the 885 and Z8 ) and 68 family processors (such as the 682 and 689). SEL, SEL2 SEL SEL2* Interface A RD WR CS 88 family A RD WR CS 68 family A E R/W CS Note: SEL should be tied directly to VDD or VSS to prevent noise. If noise does appear on SEL, decouple it to ground using a capacitor placed as close to the pin as possible. SED335 Series EPSON 5

11 PIN DESCRIPTION Pin Name 88 family interface Function A A RD WR Function Status flag read Display data and cursor address read Display data and parameter write Command write 68 family interface A R/W E Function Status flag read Display data and cursor address read Display data and parameter write Command write RD or E WR or R/W CS RES When the 88 family interface is selected, this signal acts as the active-low read strobe. The SED335 series output buffers are enabled when this signal is active. When the 68 family interface is selected, this signal acts as the active-high enable clock. Data is read from or written to the SED335 series when this clock goes HIGH. When the 88 family interface is selected, this signal acts as the active-low write strobe. The bus data is latched on the rising edge of this signal. When the 68 family interface is selected, this signal acts as the read/write control signal. Data is read from the SED335 series if this signal is HIGH, and written to the SED335 series if it is LOW. Chip select. This active-low input enables the SED335 series. It is usually connected to the output of an address decoder device that maps the SED335 series into the memory space of the controlling microprocessor. This active-low input performs a hardware reset on the SED335 series. It is a Schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered Display memory control The SED335 series can directly access static RAM and PROM. The designer may use a mixture of these two types of memory to achieve an optimum trade-off between low cost and low power consumption. Pin Name VA to VA5 VD to VD7 VWR VRD VCE Function 6-bit display memory address. When accessing character generator RAM or ROM, VA to VA3, reflect the lower 4 bits of the SED335 series s row counter. 8-bit tristate display memory data bus. These pins are enabled when VR/W is LOW. Active-LOW display memory write control output. Active-LOW display memory read control output. Active-LOW static memory standby control signal. VCE can be used with CS. 6 EPSON SED335 Series

12 PIN DESCRIPTION/SPECIFICATIONS LCD drive signals In order to provide effective low-power drive for LCD matrixes, the SED335 series can directly control both the X- and Y-drivers using an enable chain. Pin Name XD to XD3 XSCL XECL LP WF YSCL YD YDIS Function 4-bit X-driver (column drive) data outputs. Connect these outputs to the inputs of the X-driver chips. The falling edge of XSCL latches the data on XD to XD3 into the input shift registers of the X-drivers. To conserve power, this clock halts between LP and the start of the following display line (See section 6.3.7). The falling edge of XECL triggers the enable chain cascade for the X-drivers. Every 6th clock pulse is output to the next X-driver. LP latches the signal in the X-driver shift registers into the output data latches. LP is a fallingedge triggered signal, and pulses once every display line. Connect LP to the Y-driver shift clock on modules. LCD panel AC drive output. The WF period is selected to be one of two values with SYSTEM SET command. The falling edge of YSCL latches the data on YD into the input shift registers of the Y-drivers. YSCL is not used with driver ICs which use LP as the Y-driver shift clock. YD is the data pulse output for the Y drivers. It is active during the last line of each frame, and is shifted through the Y drivers one by one (by YSCL), to scan the display s common connections. Power-down output signal. YDIS is HIGH while the display drive outputs are active. YDIS goes LOW one or two frames after the sleep command is written to the SED335 series. All Y-driver outputs are forced to an intermediate level (de-selecting the display segments) to blank the display. In order to implement power-down operation in the LCD unit, the LCD power drive supplies must also be disabled when the display is disabled by YDIS. 6. SPECIFICATIONS 6.. Absolute Maximum Ratings Parameter Symbol Rating Unit Supply voltage range VDD.3 to 7. V Input voltage range VIN.3 to VDD +.3 V Power dissipation PD 3 mw Operating temperature range Topg 2 to 75 C Storage temperature range Tstg 65 to 5 C Soldering temperature ( seconds). See note. Tsolder 26 C Notes:. The humidity resistance of the flat package may be reduced if the package is immersed in solder. Use a soldering technique that does not heatstress the package. 2. If the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. Take appropriate care with the power supply and the layout of the supply lines. (See section 6.2.) 3. All supply voltages are referenced to VSS = V. SED335 Series EPSON 7

13 SPECIFICATIONS 6.2. SED335 VDD = 4.5 to 5.5V, VSS = V, Ta = 2 to 75 C Parameter Symbol Condition Rating min typ max Unit Supply voltage VDD V Register data retention voltage VOH V Input leakage current ILI VI = VDD. See note µa Output leakage current ILO VI = VSS. See note µa Operating supply current Iopr See note 4. 5 ma Quiescent supply current IQ Sleep mode, V OSC = V CS = V RD = V DD.5 2. µa Oscillator frequency fosc Measured at crystal,.. MHz External clock frequency fcl 47.5% duty cycle... MHz Oscillator feedback resistance Rf See note MΩ TTL HIGH-level input voltage VIHT See note..5vdd VDD V LOW-level input voltage VILT See note. VSS.2VDD V HIGH-level output voltage VOHT IOH = 5. ma. See note. 2.4 V LOW-level output voltage VOLT IOL = 5. ma. See note. VSS +.4 V CMOS HIGH-level input voltage VIHC See note 2..8VDD VDD V LOW-level input voltage VILC See note 2. VSS.2VDD V HIGH-level output voltage VOHC IOH = 2. ma. See note 2.VDD.4 V LOW-level output voltage VOLC IOH =.6 ma. See note 2. VSS +.4 V Open-drain LOW-level output voltage VOLN IOL = 6. ma. VSS +.4 V Schmitt-trigger Rising-edge threshold voltage VT+ See note 3..5VDD.7VDD.8VDD V Falling-edge threshold voltage VT See note 3..2VDD.3VDD.5VDD V Notes:. D to D7, A, CS, RD, WR, VD to VD7, VA to VA5, VRD, VWR and VCE are TTL-level inputs. 2. SEL is CMOS-level inputs. YD, XD to XD3, XSCL, LP, WF, YDIS are CMOS-level outputs. 3. RES is a Schmitt-trigger input. The pulsewidth on RES must be at least 2 µs. Note that pulses of more than a few seconds will cause DC voltages to be applied to the LCD panel. 4. fosc = MHz, no load (no display memory), internal character generator, pixel display. The operating supply current can be reduced by approximately ma by setting both CLO and the display OFF. 5. VD to VD7 and D to D7 have internal feedback circuits so that if the inputs become high-impedance, the input state immediately prior to that is held. Because of the feedback circuit, input current flow occurs when the inputs are in an intermediate state. 6. Because the oscillator circuit input bias current is in the order of µa, design the printed circuit board so as to reduce leakage currents. 8 EPSON SED335 Series

14 SPECIFICATIONS VDD = 2.7 to 4.5 V, VSS = V, Ta = 2 to 75 C unless otherwise noted Parameter Symbol Condition Rating min typ max Unit Supply voltage VDD V Register data retention voltage VOH V Input leakage current ILI VI = VDD. See note µa Output leakage current ILO VI = VSS. See note µa Operating supply current Iopr VDD = 3.5 V. See note See note ma Quiescent supply current IQ Sleep mode, VOSC = VCS = VRD = VDD.5 2. µa Oscillator frequency fosc Measured at crystal,. 8. MHz External clock frequency fcl 47.5% duty cycle.. 8. MHz Oscillator feedback resistance TTL Rf See note MΩ HIGH-level input voltage VIHT See note..5 VDD VDD V LOW-level input voltage VILT See note. VSS.2 VDD V HIGH-level output voltage VOHT IOH = 3. ma. See note. 2.4 V LOW-level output voltage VOLT IOL = 3. ma. See note. VSS +.4 V CMOS HIGH-level input voltage VIHC See note 2..8 VDD VDD V LOW-level input voltage VILC See note 2. VSS.2 VDD V HIGH-level output voltage VOHC IOH = 2. ma. See note 2. VDD.4 V LOW-level output voltage VOLC IOH =.6 ma. See note 2. VSS +.4 V Open-drain LOW-level output voltage VOLN IOL = 6. ma. VSS +.4 V Schmitt-trigger Rising-edge threshold voltage VT+ See note 3..5 VDD.7 VDD.8 VDD V Falling-edge threshold voltage VT See note 3..2 VDD.3 VDD.5 VDD V Notes. D to D7, A, CS, RD, WR, VD to VD7, VA to VA5, VRD, VWR and VCE are TTL-level inputs. 2. SEL is CMOS-level inputs. YD, XD to XD3, XSCL, LP, WF, YDIS are CMOS-level outputs. 3. RES is a Schmitt-trigger input. The pulsewidth on RES must be at least 2 µs. Note that pulses of more than a few seconds will cause DC voltages to be applied to the LCD panel. 4. fosc = MHz, no load (no display memory), internal character generator, pixel display. The operating supply current can be reduced by approximately ma by setting both CLO and the display OFF. 5. VD to VD7 and D to D7 have internal feedback circuits so that if the inputs become high-impedance, the input state immediately prior to that is held. Because of the feedback circuit, input current flow occurs when the inputs are in an intermediate state. 6. Because the oscillator circuit input bias current is in the order of µa, design the printed circuit board so as to reduce leakage currents. SED335 Series EPSON 9

15 SPECIFICATIONS 6.3. SED335F Timing Diagrams family interface timing AO, CS t AW8 t AH8 WR, RD t CYC8 D to D7 (Write) t CC t DS8 t DH8 t ACC8 t OH8 D to D7 (Read) Ta = 2 to 75 C Signal Symbol Parameter VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V min max min max Unit A, CS tah8 Address hold time ns taw8 Address setup time ns WR, RD tcyc8 System cycle time See note. See note. ns tcc Strobe pulsewidth 2 5 ns tds8 Data setup time 2 2 ns D to D7 tdh8 Data hold time 5 5 ns tacc8 RD access time 5 8 ns toh8 Output disable time 5 55 ns Note: For memory control and system control commands: t CYC8 = 2t C + t CC + t CEA + 75 > t ACV For all other commands: t CYC8 = 4t C + t CC + 3 Condition CL = pf EPSON SED335 Series

16 SPECIFICATIONS family interface timing E t CYC6 R/W t AW6 t EW t AH6 A, CS t DS6 t DH6 D to D7 (Write) t ACC6 t OH6 D to D7 (Read) Note: tcyc6 indicates the interval during which CS is LOW and E is HIGH. Ta = 2 to 75 C Signal Symbol Parameter VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V min max min max Unit Condition A, tcyc6 System cycle time See note. See note. ns CS, taw6 Address setup time ns R/W tah6 Address hold time ns tds6 Data setup time 2 ns CL = D to D7 tdh6 Data hold time ns pf toh6 Output disable time 5 75 ns tacc6 Access time 85 3 ns E tew Enable pulsewidth 2 5 ns Note: For memory control and system control commands: t CYC6 = 2t C + t EW + t CEA + 75 > t ACV For all other commands: t CYC6 = 4t C + t EW + 3 SED335 Series EPSON

17 SPECIFICATIONS Display memory read timing EXTΦ t C t W t CE t W VCE t CYR VA to VA5 t ASC t AHC t RCH VR/W t RCS t ACV t CEA t CE3 t OH2 VD to VD7 Ta = 2 to 75 C Signal Symbol Parameter VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V min max min max Unit EXT φ tc Clock period 25 ns VCE tw VCE HIGH-level pulsewidth tc 5 tc 5 ns tce VCE LOW-level pulsewidth 2tC 3 2tC 3 ns tcyr Read cycle time 3tC 3tC ns Address setup time to VA to tasc tc 7 tc ns falling edge of VCE VA5 Address hold time from tahc 2tC 3 2tC 4 ns falling edge of VCE VRD trcs Read cycle setup time to falling edge of VCE tc 45 tc 6 ns trch Read cycle hold time from rising edge of VCE.5tC.5tC ns tacv Address access time 3tC 3tC 5 ns VD to tcea VCE access time 2tC 8 2tC 9 ns VD7 toh2 Output data hold time ns tce3 VCE to data off time ns Condition CL = pf 2 EPSON SED335 Series

18 SPECIFICATIONS Display memory write timing t C EXT φ O t W t CE VCE t ASC t AHC t CA VA to VA5 t AS t WSC t WHC t AH2 VR/W t DSC t DHC t DH2 VD to VD7 SED335 Series EPSON 3

19 SPECIFICATIONS Ta = 2 to 75 C VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V Signal Symbol Parameter Unit min max min max EXT φ tc Clock period 25 ns VCE HIGH-level tw tc 5 tc 5 ns pulsewidth VCE VCE LOW-level tce 2tC 3 2tC 3 ns pulsewidth tcyw Write cycle time 3tC 3tC ns Condition VA to VA5 VWR VD to VD7 tahc tasc tca tas tah2 twsc twhc tdsc tdhc tdh2 Address hold time from falling edge of VCE 2tC 3 2tC 4 ns Address setup time to falling edge of VCE tc 7 tc ns Address hold time from rising edge of VCE ns Address setup time to falling edge of VWR ns Address hold time from rising edge of VWR ns Write setup time to falling edge of VCE tc 8 tc 5 ns Write hold time from falling edge of VCE 2tC 2 2tC 2 ns Data input setup time to falling edge of VCE tc 85 tc 25 ns Data input hold time from falling edge of VCE Data hold time from rising edge of VWR 2tC 3 2tC 3 ns ns CL = pf Note: VD to VD7 are latching input/outputs. While the bus is high impedance, VD to VD7 retain the write data until the data read from the memory is placed on the bus. 4 EPSON SED335 Series

20 SPECIFICATIONS SLEEP IN command timing VCE SLEEP IN write SYSTEM SET write t WRL t WRD WR (Command input) YDIS Ta = 2 to 75 C VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V Signal Symbol Parameter Unit min max min max VCE falling-edge delay twrd See note. See note. ns time WR YDIS falling-edge delay twrl See note 2. See note 2. ns time Notes:. t WRD = 8t C + t OSS + 4 (t OSS is the time delay from the sleep state until stable operation) 2. t WRL = 36t C [TC/R] [L/F] + 7 Condition CL = pf SED335 Series EPSON 5

21 SPECIFICATIONS External oscillator signal timing t RCL t FCL EXTφ t WL t WH t C Ta = 2 to 75 C Signal Symbol Parameter VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V min max min max Unit trcl External clock rise time 5 5 ns tfcl External clock fall time 5 5 ns EXT φ twh External clock HIGH-level pulsewidth See note. See note 2. See note. See note 2. ns twl External clock LOW-level pulsewidth See note. See note 2. See note. See note 2. ns tc External clock period 25 ns Notes:. (tc trcl tfcl) 475 < twh, twl 2. (tc trcl tfcl) 525 > twh, twl Condition 6 EPSON SED335 Series

22 SPECIFICATIONS LCD output timing The following characteristics are for a /64 duty cycle. Row LP frame time YD WF WF line time Row 64 Row Row 2 LP XSCL XD to XD3 (4) (5) (6) () (5)(6)()(2) (3) (5) (6) () tr twx tf tcx XSCL tds tls tdh XD to XD3 twl LP tld tdhy tdf WF(B) YD SED335 Series EPSON 7

23 SPECIFICATIONS Ta = 2 to 75 C Signal Symbol Parameter VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V min max min max Unit tr Rise time 3 4 ns tf Fall time 3 4 ns XSCL tcx Shift clock cycle time 4tC 4tC ns twx XSCL clock pulsewidth 2tC 6 2tC 6 ns XD to tdh X data hold time 2tC 5 2tC 5 ns XD3 tds X data setup time 2tC 2tC 5 ns tls Latch data setup time 2tC 5 2tC 5 ns LP twl LP pulsewidth 4tC 8 4tC 2 ns tld LP delay time from XSCL ns WF tdf Permitted WF delay 5 5 ns YD tdhy Y data hold time 2tC 2 2tC 2 ns Condition CL = pf 8 EPSON SED335 Series

24 PACKAGE DIMENSIONS 7. PACKAGE DIMENSIONS Unit: mm 7.. SED335FA QFP5-6 pin 7.2. SED335FB QFP6-6 pin 25.6 ± ±.4 2. ±. 4. ± Index ±. 9.6 ±.4 Index 4. ± ± ± ± ±..35 ±..5 ± ±. 5.8 ±.5.35 ±.5.5 ±.3 to 2.8 ±.3 to SED335 Series EPSON 9

25 INSTRUCTION SET 8. INSTRUCTION SET 8.. The Command Set Table. Command set Command Code Read Class Command Hex Command Description Parameters No. of Sec- RD WR A D7 D6 D5 D4 D3 D2 D D Bytes tion System control SYSTEM SET 4 Initialize device and display SLEEP IN 53 Enter standby mode DISP ON/OFF D 58, Enable and disable dis play and display flashing SCROLL 44 Set display start address and display regions CSRFORM 5D Set cursor type Display control CGRAM ADR 5C Set start address of char acter generator RAM CD CD 4C Set direction of cursor CSRDIR to movement 4F Drawing control Memory control HDOT SCR 5A Set horizontal scroll position OVLAY 5B Set display overlay format CSRW 46 Set cursor address CSRR 47 Read cursor address MWRITE 42 Write to display memory 8.5. MREAD 43 Read from display memory Notes:. In general, the internal registers of the SED335 series are modified as each command parameter is input. However, the microprocessor does not have to set all the parameters of a command and may send a new command before all parameters have been input. The internal registers for the parameters that have been input will have been changed but the remaining parameter registers are unchanged. 2-byte parameters (where two bytes are treated as data item) are handled as follows: a. CSRW, CSRR: Each byte is processed individually. The microprocessor may read or write just the low byte of the cursor address. b. SYSTEM SET, SCROLL, CGRAM ADR: Both parameter bytes are processed together. If the command is changed after half of the parameter has been input, the single byte is ignored. 2. APL and APH are 2-byte parameters, but are treated as two -byte parameters. 2 EPSON SED335 Series

26 INSTRUCTION SET 8.2. System Control Commands SYSTEM SET Initializes the device, sets the window sizes, and selects the LCD interface format. Since this command sets the basic operating parameters of the SED335 series, an incorrect SYSTEM SET command may cause other commands to operate incorrectly. MSB LSB D7 D6 D5 D4 D3 D2 D D A WR RD C P IV W/S M2 M M P2 WF FX P3 FY P4 C/R P5 TC/R P6 L/F P7 APL P8 APH Figure. SYSTEM SET instruction C This control byte performs the following:. Resets the internal timing generator 2. Disables the display 3. Cancels sleep mode Parameters following P are not needed if only canceling sleep mode M Selects the internal or external character generator ROM. The internal character generator ROM contains 6, 5 7 pixel characters, as shown in figure 7. These characters are fixed at fabrication by the metallization mask. The external character generator ROM, on the other hand, can contain up to 256 user-defined characters. M = : Internal CG ROM M = : External CG ROM Note that if the CG ROM address space overlaps the display memory address space, that portion of the display memory cannot be written to M Selects the memory configuration for user-definable characters. The CG RAM codes select one of the 64 codes shown in figure 46. M = : No D6 correction. The CG RAM and CG RAM2 address spaces are not contiguous, the CG RAM address space is treated as character generator RAM, and the CG RAM2 address space is treated as character generator ROM. M = : D6 correction. The CG RAM and CG RAM2 address spaces are contiguout and are both treated as character generator RAM. SED335 Series EPSON 2

27 INSTRUCTION SET M2 Selects the height of the character bitmaps. Characters more than 6 pixels high can be displayed by creating a bitmap for each portion of each character and using the SED335 series graphics mode to reposition them. M2 = : 8-pixel character height (276 or equivalent ROM) M2 = : 6-pixel character height (2732 or equivalent ROM) W/S Selects the LCD drive method. W/S = : Single-panel drive W/S = : Dual-panel drive EI X driver X driver YD Y driver LCD Figure 2. Single-panel display EI X driver X driver YD Y driver Upper Panel Lower Panel X driver X driver Figure 3. Above and below two-panel display 22 EPSON SED335 Series

28 INSTRUCTION SET EI X driver X driver X driver X driver YD Y driver Left Panel Right Panel Figure 4. Left-and-right two-panel display Note There are no Seiko Epson LCD units in the configuration shown in Figure 4. Table 2. LCD parameters Parameter W/S = W/S = IV = IV = IV = IV = C/R C/R C/R C/R C/R TC/R TC/R TC/R (See note.) TC/R TC/R L/F L/F L/F L/F L/F SL H to L/F H to L/F + (See note 2.) (L/F) / 2 (L/F) / 2 SL2 H to L/F H to L/F + (See note 2.) (L/F) / 2 (L/F) / 2 SAD First screen block First screen block First screen block First screen block SAD2 Second screen block Second screen block Second screen block Second screen block SAD3 Third screen block Third screen block Third screen block Third screen block SAD4 Invalid Invalid Fourth screen block Fourth screen block Cursor move- Above-and-below configuration: Continuous movement over whole screen ment range continuous movement over whole screen Notes:. See table 26 for further details on setting the C/R and TC/R parameters when using the HDOT SCR command. 2. The value of SL when IV = is equal to the value of SL when IV =, plus one IV Screen origin compensation for inverse display. IV is usually set to. The best way of displaying inverted characters is to Exclusive-OR the text layer with the graphics background layer. However, inverted characters at the top or left of the screen are difficult to read as the character origin is at the top-left of its bitmap and there are no background pixels either above or to the left of these characters. SED335 Series EPSON 23

29 INSTRUCTION SET The IV flag causes the SED335 series to offset the text screen against the graphics back layer by one vertical pixel. Use the horizontal pixel scroll function (HDOT SCR) to shift the text screen to 7 pixels to the right. All characters will then have the necessary surrounding background pixels that ensure easy reading of the inverted characters. See Section.5 for information on scrolling. IV = : Screen top-line correction IV = : No screen top-line correction Display start point Back layer HDOT SCR Character Dots to 7 IV Figure 5. IV and HDOT SCR adjustment dot FX Define the horizontal character size. The character width in pixels is equal to FX +, where FX can range from to 7H inclusive. If data bit 3 is set (FX is in the range 8 to FH) and an 8-pixel font is used, a space is inserted between characters. Table 3. Horizontal character size selection FX [FX] character width HEX D3 D2 D D (pixels) Since the SED335 series handles display data in 8-bit units, characters larger than 8 pixels wide must be formed from 8-pixel segments. As Figure 6 shows, the remainder of the second eight bits are not displayed. This also applies to the second screen layer. In graphics mode, the normal character field is also eight pixels. If a wider character field is used, any remainder in the second eight bits is not displayed. FX FX FY FY 8 bits 8 bits 8 bits 8 bits Address A Address B Non-display area Figure 6. FX and FY display addresses 24 EPSON SED335 Series

30 INSTRUCTION SET WF Selects the AC frame drive waveform period. WF is usually set to. WF = : 6-line AC drive WF = : two-frame AC drive In two-frame AC drive, the WF period is twice the frame period. In 6-line AC drive, WF inverts every 6 lines. Although 6-line AC drive gives a more readable display, horizontal lines may appear when using high LCD drive voltages or at high viewing angles FY Sets the vertical character size. The height in pixels is equal to FY +. FY can range from to FH inclusive. Set FY to zero (vertical size equals one) when in graphics mode C/R Sets the address range covered by one display line, that is, the number of characters less one, multiplied by the number of horizontal bytes per character. C/R can range from to 239. For example, if the character width is pixels, then the address range is equal to twice the number of characters, less 2. See Section 6.. for the calculation of C/R. [C/R] cannot be set to a value greater than the address range. It can, however, be set smaller than the address range, in which case the excess display area is blank. The number of excess pixels must not exceed 64. Table 4. Vertical character size selection FY [FY] character HEX D3 D2 D D height (pixels) E 5 F 6 Table 5. Display line address range C/R HEX D7 D6 D5 D4 D3 D2 D D [C/R] bytes per display line 2 4F 8 EE 239 EF 24 SED335 Series EPSON 25

31 INSTRUCTION SET TC/R Sets the length, including horizontal blanking, of one line. The line length is equal to TC/R +, where TC/ R can range from to 255. TC/R must be greater than or equal to C/R + 4. Provided this condition is satisfied, [TC/R] can be set according to Table 6. Line length selection the equation given in section 6.. in order to hold the frame period constant and minimize jitter for any given main oscillator frequency, fosc. TC/R HEX D7 D6 D5 D4 D3 D2 D D [TC/R] line length (bytes) FE 255 FF L/F Sets the height, in lines, of a frame. The height in lines is equal to L/F +, where L/F can range from to 255. Table 7. Frame height selection L/F HEX D7 D6 D5 D4 D3 D2 D D [L/F] lines per frame 2 7F 28 FE 255 FF 256 If W/S is set to, selecting two-screen display, the number of lines must be even and L/F must, therefore, be an odd number. 26 EPSON SED335 Series

32 INSTRUCTION SET AP Defines the horizontal address range of the virtual screen. APL is the least significant byte of the address. APL AP7 AP6 AP5 AP4 AP3 AP2 AP AP APH AP5 AP4 AP3 AP2 AP AP AP9 AP8 Figure 7. AP parameters Table 8. Horizontal address range Blank data is sent to the X-drivers, and the Y-drivers have their bias supplies turned off by the YDIS signal. Using Hex code [AP] addresses the YDIS signal to disable the Y-drivers guards against APH APL per line any spurious displays. The internal registers of the SED335 series maintain their values during the sleep state. The display memory control pins maintain their logic levels to ensure that the display memory is not corrupted. The SED335 series can be removed from the sleep state 5 8 by sending the SYSTEM SET command with only the P parameter. The DISP ON command should be sent next F F F E to enable the display. F F F F 2 6 MSB LSB C Figure 9. SLEEP IN instruction C/R Figure 8. AP and C/R relationship SLEEP IN Display memory limit AP Display area Places the system in standby mode. This command has no parameter bytes. At least one blank frame after receiving this command, the SED335F halts all internal operations, including the oscillator, and enters the sleep state.. The YDIS signal goes LOW between one and two frames after the SLEEP IN command is received. Since YDIS forces all display driver outputs to go to the deselected output voltage, YDIS can be used as a power-down signal for the LCD unit. This can be done by having YDIS turn off the relatively highpower LCD drive supplies at the same time as it blanks the display. 2. Since all internal clocks in the SED335 series are halted while in the sleep state, a DC voltage will be applied to the LCD panel if the LCD drive supplies remain on. If reliability is a prime consideration, turn off the LCD drive supplies before issuing the SLEEP IN command. 3. Note that, although the bus lines become high impedance in the sleep state, pull-up or pull-down resistors on the bus will force these lines to a known state. SED335 Series EPSON 27

33 INSTRUCTION SET 8.3. Display Control Commands DISP ON/OFF Turns the whole display on or off. The single-byte parameter enables and disables the cursor and layered screens, and sets the cursor and screen flash rates. The cursor can be set to flash over one character or over a whole line. MSB C D P FP5 FP4 FP3 FP2 FP FP FC FC LSB Figure. DISP ON/OFF parameters D Turns the display ON or OFF. The D bit takes precedence over the FP bits in the parameter. D = : Display OFF D = : Display ON FC Enables/disables the cursor and sets the flash rate. The cursor flashes with a 7% duty cycle (ON/OFF) FP Each pair of bits in FP sets the attributes of one screen block, as follows. The display attributes are as follows: Table. Screen block attribute selection FP FP First screen block (SAD) FP3 FP2 Second screen block (SAD2, SAD4). See note. FP5 FP4 Third screen block (SAD3) OFF (blank) No flashing ON Flash at ffr/32 Hz (approx. 2 Hz) Flash at ffr/4 Hz (approx. 6 Hz) Note If SAD4 is enabled by setting W/S to, FP3 and FP2 control both SAD2 and SAD4. The attributes of SAD2 and SAD4 cannot be set independently. Table 9. Cursor flash rate selection FC FC Cursor display OFF (blank) No flashing ON Flash at ffr/32 Hz (approx. 2 Hz) Flash at ffr/64 Hz (approx. Hz) Note: As the MWRITE command always enables the cursor, the cursor position can be checked even when performing consecutive writes to display memory while the cursor is flashing. 28 EPSON SED335 Series

34 INSTRUCTION SET SCROLL C Sets the scroll start address and the number of lines per scroll block. Parameters P to P can be omitted if not required. The parameters must be entered sequentially as shown in Figure. MSB LSB C P A7 A6 A5 A4 A3 A2 A A (SAD L) P2 A5 A4 A3 A2 A A A9 A8 (SAD H) P3 L7 L6 L5 L4 L3 L2 L L (SL ) P4 A7 A6 A5 A4 A3 A2 A A (SAD 2 L) P5 A5 A4 A3 A2 A A A9 A8 (SAD 2H) P6 L7 L6 L5 L4 L3 L2 L L (SL 2) P7 A7 A6 A5 A4 A3 A2 A A (SAD 3L) P8 A5 A4 A3 A2 A A A9 A8 (SAD 3H) P9 A7 A6 A5 A4 A3 A2 A A (SAD 4L) P A5 A4 A3 A2 A A A9 A8 (SAD 4H) Figure. SCROLL instruction parameters Note: Set parameters P9 and P only if both two-screen drive (W/S = ) and two-layer configuration are selected. SAD4 is the fourth screen block display start address. SED335 Series EPSON 29

35 INSTRUCTION SET Table. Screen block start address selection SL, SL2 HEX L7 L6 L5 L4 L3 L2 L L [SL] screen lines 2 7F 28 FE 255 FF SL, SL2 SL and SL2 set the number of lines per scrolling screen. The number of lines is SL or SL2 plus one. The relation- ship between SAD, SL and the display mode is described below. Table 2. Text display mode W/S Screen First Layer Second Layer First screen block SAD SAD2 Second screen block SL SL2 SAD3 (see note ) Third screen block (partitioned screen) Set both SL and SL2 to L/F + if not using a partitioned screen. Screen configuration example: SAD2 SAD SL2 SL Character display page Graphics display page 2 SAD3 Character display page 3 Layer 2 Layer 3 EPSON SED335 Series

36 INSTRUCTION SET Table 2. Text display mode (continued) W/S Screen First Layer Second Layer Upper screen SAD SAD2 SL SL2 Lower screen SAD3 SAD4 (See note 2.) (See note 2.) Set both SL and SL2 to ((L/F) / 2 + ). Screen configuration example: SAD2 SAD SL Character display page Graphics display page 2 SAD3 Character display page 3 Graphics display page 4 (SAD4) Layer Layer 2 Notes:. SAD3 has the same value as either SAD or SAD2, whichever has the least number of lines (set by SL and SL2). 2. Since the parameters corresponding to SL3 and SL4 are fixed by L/F, they do not have to be set in this mode. SED335 Series EPSON 3

37 INSTRUCTION SET Table 3. Graphics display mode W/S Screen First Layer Second Layer Third Layer SAD SAD2 Two-layer composition SL SL2 SAD3 (see note 3.) Set both SL and SL2 to Upper screen L/F + if not using a partitioned screen Screen configuration example: SAD2 SAD SL Character display page SL2 Graphics display page 2 SAD3 Character display page 3 Layer Layer 2 SAD SAD2 SAD3 Three-layer configuration SL = L/F + SL2 = L/F + Screen configuration example: SAD3 SAD2 SAD Graphics display page 3 SL SL2 Graphics display page 2 Graphics display page Layer Layer 3 Layer 2 32 EPSON SED335 Series

38 INSTRUCTION SET Table 3. Graphics display mode (continued) W/S Screen First Layer Second Layer Third Layer Upper screen SAD SAD2 SL SL2 Lower screen SAD3 SAD4 (See note 2.) (See note 2.) Set both SL and SL2 to ((L/F) / 2 + ). Screen configuration example (See note 3.): SAD2 SAD SL Graphics display page Graphics display page 2 SAD3 Graphics display page 4 Graphics display page 3 Layer Layer 2 Notes:. SAD3 has the same value as either SAD or SAD2, whichever has the least number of lines (set by SL and SL2). 2. Since the parameters corresponding to SL3 and SL4 are fixed by L/F, they do not have to be set. 3. If, and only if, W/S =, the differences between SL and (L/F + ) / 2, and between SL2 and (L/F + ) / 2, are blanked. SL Upper Panel L L/2 Lower Panel Graphics Figure 2. Two-panel display height SED335 Series EPSON 33

39 INSTRUCTION SET CSRFORM Sets the cursor size and shape. Although the cursor is normally only used in text displays, it may also be used in graphics displays when displaying special characters. MSB C P X3 X2 CRX X X LSB Character start point P2 CM Y3 Y2 CRY Y Y Figure 3. CSRFORM parameter bytes CRX Sets the horizontal size of the cursor from the character origin. CRX is equal to the cursor size less one. CRX must be less than or equal to FX. Table 4. Horizontal cursor size selection CRX [CRX] cursor width HEX X3 X2 X X (pixels) E 5 F CRY Sets the location of an underscored cursor in lines, from the character origin. When using a block cursor, CRY sets the vertical size of the cursor from the character origin. CRY is equal to the number of lines less one. Table 5. Cursor height selection CRY [CRY] cursor height HEX Y3 Y2 Y Y (lines) Illegal E 5 F CRX = 5 dots CRY = 9 dots CM = Figure 4. Cursor size and position CM Sets the cursor shape. Always set CM to when in graphics mode. CM = : Underscore cursor CM = : Block cursor CSRDIR Sets the direction of automatic cursor increment. The cursor can move left or right one character, or up or down by the number of bytes specified by the address pitch, AP. When reading from and writing to display memory, this automatic cursor increment controls the display memory address increment on each read or write. MSB C CD CD2 Figure 5. CSRDIR parameters AP + +AP Figure 6. Cursor direction LSB 34 EPSON SED335 Series

40 INSTRUCTION SET Table 6. Cursor shift direction C CD CD Shift direction 4CH Right 4DH Left 4EH Up 4FH Down Note: Since the cursor moves in address units even if FX 9, the cursor address increment must be preset for movement in character units. See Section OVLAY Selects layered screen composition and screen text/ graphics mode. MSB LSB C P OV DM2 DM MX MX Figure 7. OVLAY parameters MX, MX MX and MX set the layered screen composition method, which can be either OR, AND, Exclusive-OR or Priority- OR. Since the screen composition is organized in layers and not by screen blocks, when using a layer divided into two screen blocks, different composition methods cannot be specified for the individual screen blocks. The Priority-OR mode is the same as the OR mode unless flashing of individual screens is used. Table 7. Composition method selection MX MX Function Composition Method Applications L L2 L3 OR Underlining, rules, mixed text and graphics (L L2) L3 Exclusive-OR Inverted characters, flashing regions, underlining (L L2) L3 AND Simple animation, three-dimensional L > L2 > L3 Priority-OR appearance Notes: L: First layer (text or graphics). If text is selected, layer L3 cannot be used. L2: Second layer (graphics only) L3: Third layer (graphics only) SED335 Series EPSON 35

41 INSTRUCTION SET Layer Layer 2 Layer 3 Visible display EPSON EPSON OR EPSON EPSON 2 Exclusive OR EPSON SON 3 AND 4 EPSON EPSON Prioritized OR Figure 8. Combined layer display Notes: L: Not flashing L2: Flashing at Hz L3: Flashing at 2 Hz DM, DM2 DM and DM2 specify the display mode of screen blocks and 3, respectively. DM/2 = : Text mode DM/2 = : Graphics mode Note : Screen blocks 2 and 4 can only display graphics. Note 2: DM and DM2 must be the same, regardless of the setting of W/S OV Specifies two- or three-layer composition in graphics mode. OV = : Two-layer composition OV = : Three-layer composition Set OV to for mixed text and graphics mode CGRAM ADR Specifies the CG RAM start address. MSB LSB C P A7 A6 A5 A4 A3 A2 A A (SAGL) P2 A5 A4 A3 A2 A A A9 A8 (SAGH) Figure 9. CGRAM ADR parameters Note See section for information on the SAG parameters. 36 EPSON SED335 Series

42 INSTRUCTION SET HDOT SCR While the SCROLL command only allows scrolling by characters, HDOT SCR allows the screen to be scrolled horizontally by pixels. HDOT SCR cannot be used on individual layers. MSB C P D2 D D Figure 2. HDOT SCR parameters LSB D to D2 Specifies the number of pixels to scroll. The C/R parameter has to be set to one more than the number of horizontal characters before using HDOT SCR. Smooth scrolling can be simulated if the controlling microprocessor repeatedly issues the HDOT SCR command to the SED335 series. See Section 9.5 for more information on scrolling the display. Table 8. Scroll step selection (continued) P Number of pixels HEX D2 D D to scroll Z M A B X Y A B X Y Z A B X Y Display width N M/N is the number of bits (dots) that parameter (P) is incremented/decremented by. M = N = Figure 2. Horizontal scrolling 8.4. Drawing Control Commands CSRW The 6-bit cursor address register contains the display memory address of the data at the cursor position as shown in Figure 22. Note that the microprocessor cannot directly access the display memory. The MREAD and MWRITE commands use the address in this register. MSB LSB C P A7 A6 A5 A4 A3 A2 A A (CSRL) P2 A5 A4 A3 A2 A A A9 A8 (CSRH) Figure 22. CSRW parameters SED335 Series EPSON 37

43 INSTRUCTION SET The cursor address register can only be modified by the CSRW command, and by the automatic increment after an MREAD or MWRITE command. It is not affected by display scrolling. If a new address is not set, display memory accesses will be from the last set address or the address after previous automatic increments CSRR Reads from the cursor address register. After issuing the command, the data read address is read twice, for the low byte and then the high byte of the register. MSB LSB C P A7 A6 A5 A4 A3 A2 A A (CSRL) P2 A5 A4 A3 A2 A A A9 A8 (CSRH) Figure 23. CSRR parameters 8.5. Memory Control Commands MWRITE The microprocessor may write a sequence of data bytes to display memory by issuing the MREAD command and then writing the bytes to the SED335 series. There is no need for further MWRITE commands or for the micro- processor to update the cursor address register after each byte as the cursor address is automatically incremented by the amount set with CSRDIR, in preparation for the next data write. MSB LSB C P P2 Pn n Figure 24. MWRITE parameters Note: P, P2,..., Pn: display data. 38 EPSON SED335 Series

44 INSTRUCTION SET/TV MODE MREAD Puts the SED335 series into the data output state. Each time the microprocessor reads the buffer, the cursor address is incremented by the amount set by CSRDIR and the next data byte fetched from memory, so a sequence of MSB data bytes may be read without further MREAD commands or by updating the cursor address register. If the cursor is displayed, the read data will be from two positions ahead of the cursor. LSB C P P2 Pn n Figure 25. MREAD parameters SED335 Series EPSON 39

45 DISPLAY CONTROL FUNCTIONS 9. DISPLAY CONTROL FUNCTIONS 9.. Character Configuration The origin of each character bitmap is in the top left corner as shown in Figure 29. Adjacent bits in each byte are horizontally adjacent in the corresponding character image. Although the size of the bitmap is fixed by the character generator, the actual displayed size of the character field can be varied in both dimensions. Character starting point FX D7 to D R R R2 Character height R3 R4 R5 R6 FY R7 R8 R9 R Space R R2 Space data R3 R4 R5 Character width Space Space data Figure 26. Example of character display ([FX] 8) and generator bitmap If the area outside the character bitmap contains only zeros, the displayed character size can easily be increased by increasing FX and FY, as the zeros ensure that the extra space between displayed characters is blank. The displayed character width can be set to any value up to 6 even if each horizontal row of the bitmap is two bytes wide. 4 EPSON SED335 Series