Serially Interfaced, 8-Digit LED Display Drivers
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1 MA729-SMD DRIVER LED MATRI General Description The MA729/MA722 are compact, serial input/output common-cathode display drivers that interface microprocessors (µps) to 7-segment numeric LED displays of up to digits, bar-graph displays, or 64 individual LEDs. Included on-chip are a BCD code-b decoder, multiplex scan circuitry, segment and digit drivers, and an x static RAM that stores each digit. Only one external resistor is required to set the segment current for all LEDs. The MA722 is compatible with SPI, QSPI, and MICROWIRE, and has slewrate-limited segment drivers to reduce EMI. A convenient 4-wire serial interface connects to all common µps. Individual digits may be addressed and updated without rewriting the entire display. The MA729/MA722 also allow the user to select code- B decoding or no-decode for each digit. The devices include a 5µA low-power shutdown mode, analog and digital brightness control, a scanlimit register that allows the user to display from to digits, and a test mode that forces all LEDs on. For applicatio requiring 3V operation or segment blinking, refer to the MA695 data sheet. Bar-Graph Displays Industrial Controllers Applicatio Panel Meters LED Matrix Displays Pin Configuration MHz Serial Interface Individual LED Segment Control Decode/No-Decode Digit Selection Features 5µA Low-Power Shutdown (Data Retained) Digital and Analog Brightness Control Display Blanked on Power-Up Drive Common-Cathode LED Display Slew-Rate Limited Segment Drivers for Lower EMI (MA722) SPI, QSPI, MICROWIRE Serial Interface (MA722) 24-Pin DIP and SO Packages Ordering Information PART TEMP RANGE PIN-PACKAGE MA729CNG MA729CWG MA729C/D C to +7 C C to +7 C C to +7 C 24 Narrow Plastic DIP 24 Wide SO Dice* MA729ENG -4 C to +5 C 24 Narrow Plastic DIP MA729EWG -4 C to +5 C 24 Wide SO MA729ERG -4 C to +5 C 24 Narrow CERDIP Ordering Information continued at end of data sheet. *Dice are specified at T A = +25 C. Typical Application Circuit MA729/MA722 TOP VIEW DIN 24 DOUT DIG 2 23 SEG D DIG SEG DP +5V DIG 6 DIG 2 DIG 3 DIG 7 DIG 5 DIG MA729 MA SEG E SEG C V+ ISET SEG G SEG B SEG F SEG A 9.53kΩ MOSI μp I/O SCK ISET DIN LOAD (CS) CLK V+ 9 MA729 MA722 DIG DIG 7 SEG A G, SEG DP DIGITS SEGMENTS LOAD (CS) 2 3 CLK 4 ( ) MA722 ONLY DIP/SO ( ) MA722 ONLY -DIGIT μp DISPLAY SPI and QSPI are trademarks of Motorola Inc. MICROWIRE is a trademark of National Semiconductor Corp. Maxim Integrated Products
2 MA729/MA722 ABSOLUTE MAIMUM RATINGS Voltage (with respect to ) V V to 6V DIN, CLK, LOAD, CS...-.3V to 6V All Other Pi...-.3V to (V+ +.3V) Current DIG DIG 7 Sink Current...5mA SEG A G, DP Source Current...mA Continuous Power Dissipation (T A = +5 C) Narrow Plastic DIP (derate 3.3mW/ C above +7 C)...66mW Wide SO (derate.mw/ C above +7 C)...94mW Narrow CERDIP (derate 2.5mW/ C above +7 C)...mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = 5V ±%, R SET = 9.53kΩ ±%, T A = T MIN to T MA, unless otherwise noted.) Operating Temperature Ranges (T MIN to T MA ) MA729C_G/MA722C_G... C to +7 C MA729E_G/MA722E_G...-4 C to +5 C Storage Temperature Range C to +6 C Lead Temperature (soldering, s)...+3 C PARAMETER SYMBOL CONDITIONS MIN TYP MA UNITS Operating Supply Voltage Shutdown Supply Current Operating Supply Current Display Scan Rate Digit Drive Sink Current Segment Drive Source Current Segment Current Slew Rate (MA722 only) Segment Drive Current Matching Digit Drive Leakage (MA722 only) Segment Drive Leakage (MA722 only) Digit Drive Source Current (MA729 only) Segment Drive Sink Current (MA729 only) V+ I+ I+ f OSC I DIGIT I SEG ΔI SEG /Δt ΔI SEG I DIGIT I SEG I DIGIT I SEG All digital inputs at V+ or, T A = +25 C R SET = open circuit All segments and decimal point on, I SEG_ = -4mA digits scanned V+ = 5V, V OUT =.65V T A = +25 C, V+ = 5V, V OUT = (V+ - V) T A = +25 C, V+ = 5V, V OUT = (V+ - V) Digit off, V DIGIT = V V µa ma Hz ma ma ma/µs Segment off, V SEG = V µa Digit off, V DIGIT = (V+ -.3V) Segment off, V SEG =.3V -2 5 % µa ma ma 2
3 MA729-SMD DRIVER LED MATRI ELECTRICAL CHARACTERISTICS (continued) (V+ = 5V ±%, R SET = 9.53kΩ ±%, T A = T MIN to T MA, unless otherwise noted.) LOGIC INPUTS PARAMETER Input Current DIN, CLK, LOAD, CS Logic High Input Voltage Logic Low Input Voltage Output High Voltage Output Low Voltage Hysteresis Voltage TIMING CHARACTERISTICS CLK Clock Period CLK Pulse Width High CLK Pulse Width Low SYMBOL I IH, I IL V IH V IL V OH V OL ΔV I t CP t CH t CL V IN = V or V+ DOUT, I SOURCE = -ma DOUT, I SINK =.6mA DIN, CLK, LOAD, CS CONDITIONS MIN TYP MA V UNITS µa V V V V V MA729/MA722 CS Fall to SCLK Rise Setup Time (MA722 only) t CSS 25 CLK Rise to CS or LOAD Rise Hold Time t CSH DIN Setup Time t DS 25 DIN Hold Time t DH Output Data Propagation Delay t DO C LOAD = 5pF 25 Load-Rising Edge to Next Clock Rising Edge (MA729 only) t LDCK 5 Minimum CS or LOAD Pulse High t CSW 5 Data-to-Segment Delay t DSPD 2.25 ms 3
4 MA729-SMD DRIVER LED MATRI MA729/MA722 Typical Operating Characteristics (V+ = +5V, T A = +25 C, unless otherwise noted.) SCAN FREQUENCY (Hz) SCAN FREQUENCY vs. POSITIVE SUPPLY VOLTAGE POSITIVE SUPPLY VOLTAGE (V) MA729/2 OUTPUT CURRENT (ma) SEGMENT DRIVER OUTPUT CURRENT vs. OUTPUT VOLTAGE R SET = kω R SET = 2kΩ R SET = 4kΩ OUTPUT VOLTAGE (V) MA729/2 2 MA729 SEGMENT OUTPUT CURRENT MA722 SEGMENT OUTPUT CURRENT MAIMUM INTENSITY = 3/32 MA729/2 3 MAIMUM INTENSITY = 5/6 MA729/2 4 ma/div ma/div 5μs/div 5μs/div 4
5 MA729-SMD DRIVER LED MATRI PIN NAME FUNCTION Pin Description DIN Serial-Data Input. Data is loaded into the internal 6-bit shift register on CLK s rising edge. 2, 3, 5,, 4 7, 2 23 DIG DIG 7 3 CLK SEG A SEG G, DP Eight-Digit Drive Lines that sink current from the display common cathode. The MA729 pulls the digit outputs to V+ when turned off. The MA722 s digit drivers are high-impedance when turned off. 4, 9 Ground (both pi must be connected) LOAD Load-Data Input. The last 6 bits of serial data are latched on LOAD s rising edge. (MA729) 2 CS Chip-Select Input. Serial data is loaded into the shift register while CS is low. The last 6 bits of (MA722) serial data are latched on CS s rising edge. Serial-Clock Input. MHz maximum rate. On CLK s rising edge, data is shifted into the internal shift register. On CLK s falling edge, data is clocked out of DOUT. On the MA722, the CLK input is active only while CS is low. Seven Segment Drives and Decimal Point Drive that source current to the display. On the MA729, when a segment driver is turned off it is pulled to. The MA722 segment drivers are high-impedance when turned off. ISET Connect to V DD through a resistor (R SET ) to set the peak segment current (Refer to Selecting R SET Resistor and Using External Drivers section). 9 V+ Positive Supply Voltage. Connect to +5V. 24 DOUT Serial-Data Output. The data into DIN is valid at DOUT 6.5 clock cycles later. This pin is used to daisy-chain several MA729/MA722 s and is never high-impedance. MA729/MA722 Functional Diagram SEG A SEG G, DP DIG DIG 7 SEGMENT DRIVERS DIGIT DRIVERS LOAD (CS) SEGMENT CURRENT REFERENCE V+ R SET CODE B ROM WITH BYPASS x DUAL-PORT SRAM ADDRESS REGISTER DECODER SHUTDOWN REGISTER MODE REGISTER INTENSITY REGISTER SCAN-LIMIT REGISTER DISPLAY-TEST REGISTER INTENSITY PULSE- WIDTH MODULATOR MULTIPLE SCAN CIRCUITRY 4 DIN D D D2 D3 D4 D5 D6 D7 D D9 D D D2 D3 D4 D5 DOUT CLK ( ) MA722 ONLY (LSB) (MSB) 5
6 MA729-SMD DRIVER LED MATRI MA729/MA722 CS OR LOAD CLK DIN DOUT Figure. Timing Diagram t CSH t CSS t CL t CH t CP t DH t DS D5 D4 D D t DO t CSW t LDCK Table. Serial-Data Format (6 Bits) D5 D4 D3 D2 D D D9 D D7 D6 D5 D4 D3 D2 D D ADDRESS MSB MSBDATA LSB Detailed Description MA729/MA722 Differences The MA729 and MA722 are identical except for two parameters: the MA722 segment drivers are slew-rate limited to reduce electromagnetic interference (EMI), and its serial interface is fully SPI compatible. Serial-Addressing Modes For the MA729, serial data at DIN, sent in 6-bit packets, is shifted into the internal 6-bit shift register with each rising edge of CLK regardless of the state of LOAD. For the MA722, CS must be low to clock data in or out. The data is then latched into either the digit or control registers on the rising edge of LOAD/CS. LOAD/CS must go high concurrently with or after the 6th rising clock edge, but before the next rising clock edge or data will be lost. Data at DIN is propagated through the shift register and appears at DOUT 6.5 clock cycles later. Data is clocked out on the falling edge of CLK. Data bits are labeled D D5 (Table ). D D contain the register address. D D7 contain the data, and D2 D5 are don t care bits. The first received is D5, the most significant bit (MSB). Digit and Control Registers Table 2 lists the 4 addressable digit and control registers. The digit registers are realized with an on-chip, x dual-port SRAM. They are addressed directly so that individual digits can be updated and retain data as long as V+ typically exceeds 2V. The control registers coist of decode mode, display inteity, scan limit (number of scanned digits), shutdown, and display test (all LEDs on). Shutdown Mode When the MA729 is in shutdown mode, the scan oscillator is halted, all segment current sources are pulled to ground, and all digit drivers are pulled to V+, thereby blanking the display. The MA722 is identical, except the drivers are high-impedance. Data in the digit and control registers remai unaltered. Shutdown can be used to save power or as an alarm to flash the display by successively entering and leaving shutdown mode. For minimum supply current in shutdown mode, logic inputs should be at ground or V+ (CMOS-logic levels). Typically, it takes less than 25µs for the MA729/ MA722 to leave shutdown mode. The display driver can be programmed while in shutdown mode, and shutdown mode can be overridden by the display-test function. 6
7 MA729-SMD DRIVER LED MATRI Table 2. Register Address Map REGISTER ADDRESS No-Op Digit Digit Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 Decode Mode D5 D2 Inteity Scan Limit Shutdown Display Test D D D9 D HE CODE x x x2 x3 x4 x5 x6 x7 x x9 xa xb xc xf Initial Power-Up On initial power-up, all control registers are reset, the display is blanked, and the MA729/MA722 enter shutdown mode. Program the display driver prior to display use. Otherwise, it will initially be set to scan one digit, it will not decode data in the data registers, and the inteity register will be set to its minimum value. Decode-Mode Register The decode-mode register sets BCD code B (-9, E, H, L, P, and -) or no-decode operation for each digit. Each bit in the register corresponds to one digit. A logic high selects code B decoding while logic low bypasses the decoder. Examples of the decode mode control-register format are shown in Table 4. When the code B decode mode is used, the decoder looks only at the lower nibble of the data in the digit registers (D3 D), disregarding bits D4 D6. D7, which sets the decimal point (SEG DP), is independent of the decoder and is positive logic (D7 = tur the decimal point on). Table 5 lists the code B font. When no-decode is selected, data bits D7 D correspond to the segment lines of the MA729/MA722. Table 6 shows the one-to-one pairing of each data bit to the appropriate segment line. MA729/MA722 Table 3. Shutdown Register Format (Address (Hex) = xc) MODE REGISTER DATA ADDRESS CODE (HE) D7 D6 D5 D4 D3 D2 D D Shutdown Mode xc Normal Operation xc Table 4. Decode-Mode Register Examples (Address (Hex) = x9) DECODE MODE D7 D6 No decode for digits 7 Code B decode for digit No decode for digits 7 Code B decode for digits 3 No decode for digits 7 4 Code B decode for digits 7 REGISTER DATA HE D5 D4 D3 D2 D D CODE x x xf xff 7
8 MA729-SMD DRIVER LED MATRI MA729/MA722 Table 5. Code B Font 7-SEGMENT CHARACTER D7* D6 D4 REGISTER DATA D3 D2 D D DP* A B ON SEGMENTS = C D E E H L P blank F G *The decimal point is set by bit D7 = Table 6. No-Decode Mode Data Bits and Corresponding Segment Lines E F D G A Corresponding Segment Line C B DP D7 DP STANDARD 7-SEGMENT LED D6 A REGISTER DATA D5 D4 D3 D2 B C D E D F D G Inteity Control and Interdigit Blanking The MA729/MA722 allow display brightness to be controlled with an external resistor (R SET ) connected between V+ and ISET. The peak current sourced from the segment drivers is nominally times the current entering ISET. This resistor can either be fixed or variable to allow brightness adjustment from the front panel. Its minimum value should be 9.53kΩ, which typically sets the segment current at 4mA. Display brightness can also be controlled digitally by using the inteity register. Digital control of display brightness is provided by an internal pulse-width modulator, which is controlled by the lower nibble of the inteity register. The modulator scales the average segment current in 6 steps from a maximum of 3/32 down to /32 of the peak current set by RSET (5/6 to /6 on MA722). Table 7 lists the inteity register format. The minimum interdigit blanking time is set to /32 of a cycle.
9 MA729-SMD DRIVER LED MATRI Table 7. Inteity Register Format (Address (Hex) = xa) MA729 /32 (min on) DUTY CYCLE MA722 /6 (min on) 3/32 2/6 5/32 3/6 7/32 4/6 9/32 5/6 /32 6/6 3/32 7/6 5/32 /6 7/32 9/6 9/32 /6 2/32 /6 23/32 2/6 25/32 3/6 27/32 4/6 29/32 5/6 3/32 5/6 (max on) D7 D6 D5 D4 D3 D2 D D HE CODE x x x2 x3 x4 x5 x6 x7 x x9 xa xb xc xd xe xf MA729/MA722 Table. Scan-Limit Register Format (Address (Hex) = xb) SCAN LIMIT Display digit only* Display digits & * Display digits 2* Display digits 2 3 Display digits Display digits Display digits Display digits D7 REGISTER DATA HE D6 D5 D4 D3 D2 D D CODE x x x2 x3 x4 x5 x6 x7 *See Scan-Limit Register section for application. Scan-Limit Register The scan-limit register sets how many digits are displayed, from to. They are displayed in a multiplexed manner with a typical display scan rate of Hz with digits displayed. If fewer digits are displayed, the scan rate is fosc/n, where N is the number of digits scanned. Since the number of scanned digits affects the display brightness, the scan-limit register should not be used to blank portio of the display (such as leading zero suppression). Table lists the scan-limit register format. 9
10 MA729-SMD DRIVER LED MATRI MA729/MA722 If the scan-limit register is set for three digits or less, individual digit drivers will dissipate excessive amounts of power. Coequently, the value of the R SET resistor must be adjusted according to the number of digits displayed, to limit individual digit driver power dissipation. Table 9 lists the number of digits displayed and the corresponding maximum recommended segment current when the digit drivers are used. Display-Test Register The display-test register operates in two modes: normal and display test. Display-test mode tur all LEDs on by overriding, but not altering, all controls and digit registers (including the shutdown register). In display-test mode, digits are scanned and the duty cycle is 3/32 (5/6 for MA722). Table lists the display-test register format. Table 9. Maximum Segment Current for -, 2-, or 3-Digit Displays NUMBER OF DIGITS DISPLAYED 2 3 MAIMUM SEGMENT CURRENT (ma) 2 3 Table. Display-Test Register Format (Address (Hex) = xf) MODE Normal Operation Display Test Mode D7 D6 REGISTER DATA D5 D4 D3 D2 No-Op Register The no-op register is used when cascading MA729s or MA722s. Connect all devices LOAD/CS inputs together and connect DOUT to DIN on adjacent devices. DOUT is a CMOS logic-level output that easily drives DIN of successively cascaded parts. (Refer to the Serial Addressing Modes section for detailed information on serial input/output timing.) For example, if four MA729s are cascaded, then to write to the D Note: The MA729/MA722 remain in display-test mode (all LEDs on) until the display-test register is reconfigured for normal operation. D fourth chip, sent the desired 6-bit word, followed by three no-op codes (hex x, see Table 2). When LOAD/CS goes high, data is latched in all devices. The first three chips receive no-op commands, and the fourth receives the intended data. Applicatio Information Supply Bypassing and Wiring To minimize power-supply ripple due to the peak digit driver currents, connect a µf electrolytic and a.µf ceramic capacitor between V+ and as close to the device as possible. The MA729/MA722 should be placed in close proximity to the LED display, and connectio should be kept as short as possible to minimize the effects of wiring inductance and electromagnetic interference. Also, both pi must be connected to ground. Selecting RSET Resistor and Using External Drivers The current per segment is approximately times the current in ISET. To select R SET, see Table. The MA729/MA722 s maximum recommended segment current is 4mA. For segment current levels above these levels, external digit drivers will be needed. In this application, the MA729/MA722 serve only as controllers for other high-current drivers or traistors. Therefore, to coerve power, use RSET = 47kΩ when using external current sources as segment drivers. The example in Figure 2 uses the MA729/MA722 s segment drivers, a MA394 single-pole double-throw analog switch, and external traistors to drive 2.3 AND237SLC common-cathode displays. The 5.6V zener diode has been added in series with the decimal point LED because the decimal point LED forward voltage is typically 4.2V. For all other segments the LED forward voltage is typically V. Since external traistors are used to sink current (DIG and DIG are used as logic switches), peak segment currents of 45mA are allowed even though only two digits are displayed. In applicatio where the MA729/MA722 s digit drivers are used to sink current and fewer than four digits are displayed, Table 9 specifies the maximum allowable segment current. R SET must be selected accordingly (Table ). Refer to the Continuous Power Dissipation section of the Absolute Maximum Ratings to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop.
11 MA729-SMD DRIVER LED MATRI Table. RSET vs. Segment Current and LED Forward Voltage I SEG (ma) V LED (V) Computing Power Dissipation The upper limit for power dissipation (PD) for the MA729/MA722 is determined from the following equation: PD = (V+ x ma) + (V+ - V LED )(DUTY x I SEG x N) where: V+ = supply voltage DUTY = duty cycle set by inteity register N = number of segments driven (worst case is ) V LED = LED forward voltage I SEG = segment current set by R SET Dissipation example: I SEG = 4mA, N =, DUTY = 3/32, V LED =.V at 4mA, V+ = 5.25V PD = (5.25V x ma) + (5.25V -.V)(3/32 x 4mA x ) =.W Thus, for a CERDIP package (θ JA = + C/W from Table 2), the maximum allowed ambient temperature TA is given by: T J(MA) = T A + PD x θ JA 5 C = T A +.W x C/W where T A = +6.2 C. The T A limits for PDIP and SO packages in the dissipation example above are C and C, respectively. Table 2. Package Thermal Resistance Data PACKAGE THERMAL RESISTANCE (θ JA ) 24 Narrow DIP +75 C/W 24 Wide SO +5 C/W 24 CERDIP + C/W Maximum Junction Temperature (T J ) = +5 C Maximum Ambient Temperature (T A ) = +5 C Cascading Drivers The example in Figure 3 drives 6 digits using a 3-wire µp interface. If the number of digits is not a multiple of, set both drivers scan limits registers to the same number so one display will not appear brighter than the other. For example, if 2 digits are need, use 6 digits per display with both scan-limit registers set for 6 digits so that both displays have a /6 duty cycle per digit. If digits are needed, set both scan-limit registers for 6 digits and leave one digit driver unconnected. If one display for 6 digits and the other for 5 digits, the second display will appear brighter because its duty cycle per digit will be /5 while the first display s will be /6. Refer to the No-Op Register section for additional information. MA729/MA722
12 MA729-SMD DRIVER LED MATRI MA729/MA722 N5524B 5.6V ±5% AND237SLC ANODE DP ANODE A ANODE F AND237SLC ANODE DP ANODE A ANODE F 6 ANODE B ANODE B ANODE G ANODE G 4 ANODE C ANODE C 2 ANODE E ANODE E ANODE D CATHODE 3 ANODE D CATHODE DATA IN LOAD (CS) CLOCK SEG D SEG E SEG C SEG G SEG B SEG F SEG A SEG DP DIN LOAD (CS) CLK MA729 MA722 V+ I SFT DIG DIG 9 * 2 3kΩ 4 * V 4.7kΩ.μF 4.7kΩ 6 NC COM NC2 IN MA394 IN2 COM2 NO NO2 3 IRF54 5 *4.7kΩ PULLUP REQUIRED FOR MA722 ( ) MA722 ONLY -5V IRF54 Figure 2. MA729/MA722 Driving 2.3in Displays 2
13 MA729-SMD DRIVER LED MATRI DATA IN DIN DIG DIG 4 DIG 6 DIG 2 DIG 3 DIG 7 DOUT SEG D SEG DP SEG E SEG C V+ ISET SEG G SEG B 9.53kΩ 5V.μF DIN DIG DIG 4 DIG 6 DIG 2 DIG 3 DIG 7 DOUT SEG D SEG DP SEG E SEG C V+ ISET SEG G SEG B 9.53kΩ 5V.μF MA729/MA722 LOAD DATA ( ) MA722 ONLY CLOCK DIG 5 DIG LOAD (CS) SEG F SEG A CLK MA729 MA722 DIG 5 DIG LOAD (CS) SEG F SEG A CLK MA729 MA722 Figure 3. Cascading MA729/MA722s to Drive 6 Seven-Segment LED Digits 3
14 MA729-SMD DRIVER LED MATRI MA729/MA722 Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MA722CNG MA722CWG MA722C/D C to +7 C C to +7 C C to +7 C 24 Narrow Plastic DIP 24 Wide SO Dice* MA722ENG -4 C to +5 C 24 Narrow Plastic DIP MA722EWG MA722ERG -4 C to +5 C -4 C to +5 C 24 Wide SO 24 Narrow CERDIP *Dice are specified at T A = +25 C. DIG 5 DIG LOAD OR CS CLK SEG A DIG 7 DIG 3 DIG 2 DIG 6 Chip Topography DIG 4 DIG.93" DIN (2.36mm) DOUT SEG D SEG F SEG B SEG G ISET SEG C SEG DP SEG E." (2.3mm) TRANSISTOR COUNT: 5267 SUBSTRATE CONNECTED TO 4
15 MA729-SMD DRIVER LED MATRI Package Information (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information go to N TOP VIEW D E H INCHES MILLIMETERS DIM MIN MA MIN MA A A B C e.5.27 E H L VARIATIONS: DIM D D D INCHES MILLIMETERS MIN MA MIN MA N MS AA AB AC D AD D AE SOICW.EPS MA729/MA722 A C e B A - FRONT VIEW L SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE,.3" SOIC APPROVAL DOCUMENT CONTROL NO. REV B 5
16 MA729-SMD DRIVER LED MATRI MA729/MA722 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information go to PDIPN.EPS Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 6 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA 946 (4) Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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