DALHOUSIE UNIVERSITY Department of Electrical & Computer Engineering Digital Circuits - ECED Experiment 2 - Arithmetic Elements

Transcription

1 DALHOUSIE UNIVERSITY Department of Electrical & Computer Engineering Digital Circuits - ECED 2200 Experiment 2 - Arithmetic Elements Objectives: 1. To implement a Half subtractor circuit 2. To implement a Full subtractor circuit 3. To implement a circuit using Chained subtractors Theory: How to add and subtract in binary: Binary addition and subtraction is very similar to decimal addition and subtraction. For instance, in decimal addition and subtraction carries and borrows are used: Carry has occurred (4+8=12-8 Borrow has occurred 22 The tens place in 12 is 16 (4 must borrow carried over to next column) 10 from tens place giving 14-8=6) Similarly, binary addition and subtraction involves carries and borrows: Carry has occurred (1+1=2 so -01 Borrow has occurred 10 The 1 is carried to the 01 (0 must borrow 2 twos place giving 10) from twos place giving 2-1=1) Note that these operations involve two numbers with two places each. (The numbers being operated on are each 2-places). Our goal in this lab is to implement subtraction using logic gates. In the half subtractor, the inputs (switch 1 & 2) represent the two numbers we are subtracting. The output LEDs show the resulting difference and whether a borrow has occurred. Procedure: Part 1. Half Subtractor In the half subtractor we have two single place inputs, S1 and S2 that are subtracted from each other (S1-S2). The outputs (LED1 & 2) show the result (difference) and whether or not a borrow occurred (borrow). a) Construct the Half Subtractor as shown on the attached schematic. b) Simulate the Half Subtractor: vary the inputs and construct a truth table showing your results. c) Implement the Half Subtractor on your Digital Explorer Board. Test your circuit. d) What effect does a negative result have on the outputs? (0 1 = -1) 1

2 Part 2. Full Subtractor The full subtractor is composed of two half subtractors chained together. The difference output of the first half subtractor becomes one of the inputs for the second half subtractor. Again, note the third switch, S3. This switch is used to tell the logic that a borrow occurred from the previous stage when chaining many full subtractors together. The final borrow output of the previous stage is tied to S3 of the next stage. We will look at this in more detail in part six of the lab. a) Construct the Full Subtractor as shown on the attached schematic. b) Simulate the Full Subtractor: vary the inputs and construct a truth table showing your results. c) Implement the Full Subtractor on your Digital Explorer Board. Test your circuit. d) What effect does the borrow input (S3) have on the circuit? Part 3. Chained Subtractors On their own, single full/half subtractors are very limited. They can only subtract two single-place numbers together. Chaining (also called cascading) half and full subtractors together allow larger numbers to be subtracted. The number of subtractors used is the maximum number of places that the circuit can handle (e.g. two subtractors allow subtraction of two-place numbers, six subtractors allow subtraction of six-place numbers, etc.) a) Construct a chained Subtractor using one Half subtractor and one Full subtractor. Please see Appendix A on how to create symbols and using them as components in hierarchical design. b) Vary the inputs and construct a truth table showing your results. c) Implement the Chained Subtractors on your Digital Explorer Board. Test your circuit. d) What happens when the result is a negative number? (S3)(S1) First number - (S4)(S2) Second number (X1)(X2)(X3) Result Hint: in the case of a negative number, try this: binary for 8 decimal -(X1)(X2)(X3) result of subtraction giving ve #??? explain why you get this result Some Useful Terms: You might find these terms handy when you are writing your report: Minuend: The first number in a subtraction Subtrahend: The second number in a subtraction Difference: The result of the Minuend Subtrahend 2

3 3

4 4

5 Appendix A: How to create a Half Adder symbol, and use it to built a Full Adder circuit? 1. Right-click in the Hierarchy area and hit New Source : 2. Select schematic as type of source and name it half_adder or similar, then hit next, then finish. NOTE: ONLY Use A-Z, 0-9, and underscores in the name. Do not use dashes or spaces, it will result in errors. For example half-adder and half adder are all INVALID names that may be initially accepted but will later cause problems. 3. We are going to draw a half adder. Add the AND2 and XOR2 gates: 4. Click the Add I/O Marker button: 5

6 5. Click on or drag a rectangle around the inputs and the outputs of each gate: 6. Wire up as a half-adder again: 7. Hit Esc to exit wire mode, or click on the pointer. Right-click on each port, hit Rename Port : 8. Give ports appropriate name: 9. Under Tools select Symbol Wizard : 6

7 10. Change the pin name source to Using Schematic. Then change the schematic to half_adder, or whatever you named yours: 11. Keep hitting Next until you get to finish, then hit that too: 12. Open io_connections.sch again (you can close the half_adder schematic & symbol file). Under symbols you should have a new Category, which is your personal library. Add the half_adder symbol twice: 13. Wire up as a full adder by using an OR gate to combine the two carry outputs, and feeding one half adder to another half adder: Now you have a Full adder circuit built with two Half adders as components. 7