ALM-GP003 Data Sheet Description Features

Transcription

1 ALM-GP3 GPS Filter LNA Front End Module Data Sheet Description Avago Technologies ALM-GP3 is a GPS front-end module that combines a GPS FBAR filter with high-gain low-noise amplifier (LNA).The LNA uses Avago Technologies proprietary GaAs Enhancement-mode phemt process to achieve high gain with very low noise figure and high linearity. Noise figure distribution is very tightly controlled. A CMOS-compatible shutdown pin is included either for turning the LNA on/off or for current adjustment. The filter use Avago Technologies leading-edge FBAR filter for low GPS band insertion loss and exceptional rejection at Cellular, PCS and WLAN band frequencies. The low noise figure and high gain, coupled with low current consumption make it suitable for use in critical low-power GPS applications or during low-battery situations. Component Image Surface Mount.9 x. x.95 mm 3 9-lead MCOB RF In (pin 1) Gnd (pin ) Vdd (pin 7) RF Out (pin 6) NC (pin 5) Gnd (pin 9) GP3 YMXXXX Gnd (pin 3) Vsd (pin 8) Gnd (pin 4) Top View Bottom View Vsd (pin 8) Gnd (pin 4) Gnd (pin 9) Gnd (pin 3) Vdd (pin 7) RF Out (pin 6) NC (pin5) RF In (pin 1) Gnd (pin ) Features Operating temperature range -4 C to +85 C Very Low Noise Figure Exceptional Cell/PCS/WLAN-Band rejection Low external component count Fully-matched at RF input and RF output Shutdown current : < 1 µa CMOS compatible shutdown pin (SD) ESD : > 3 kv at RFin pin.9 x. x.95 mm size Adjustable bias current via single external resistor/ voltage Lead-free and Halogen-free Specifications (Typical 5 C) At 1.575GHz, Vdd =.7V, Idd = 6mA Gain = 19.3 db NF = 1.6 db IIP3 = +1.5 dbm IP1dB = -8 dbm S11 = -9.5 db S =-13.5 db Cell-Band Rejection: > 57 dbc PCS-Band Rejection: > 53 dbc WLAN-Band Rejection: > 5 dbc Application GPS Front-end Module Application Circuit VBias RBias L +Vdd =.7V Note: Package marking provides orientation and identification GP3 = Product Code Y = Year of manufacture M = Month of manufacture XXXX = Last 4 digits of lot number RFin GPS Filter LNA RFout

2 Absolute Maximum Rating [1] T A =5 C Symbol Parameter Units Vdd Device Frain to Source Voltage [] V 4.5 Idd Drain Current [] ma 15 P in,max CW RF Input Power (Vdd =.7V. Idd = 6mA) dbm 13 P diss Total Power Dissipation [4] mw 54 Absolute Max. T L Operating Temperature C -4 to 85 T j Junction Temperature C 15 T STG Storage Temperature C -65 to 15 Thermal Resistance [3] (Vdd =.7V, Idd = 6mA), θ jc = 8.1 C/W Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage.. Assuming DC quiescent conditions. 3. Thermal resistance measured using Infra-Red measurement technique. 4. Board (module belly) temperature T B is 5 C. Derate 4. mw/ C for T B >145.6 C.

3 Electrical Specifications T A = 5 C, Freq = 1.575GHz, measured on demo board [1] unless otherwise specified Typical Performance [1] Table 1. Performance at Vdd = Vsd =.7V, Idd = 6mA (R = 4.7 kohm, see Figure 1) nominal operating conditions Symbol Parameter and Test Condition Units Min. Typ Max. G Gain db NF Noise Figure db 1.6. IP1dB Input 1dB Compressed Power dbm -8 IIP3 [] Input 3 rd Order Intercept Point Fc +/-.5MHz) dbm +1.5 S11 Input Return Loss db -9.5 S Output Return Loss db S1 Reverse Isolation db -9 Cell Band Rejection Worst-case relative to 1.575GHz within (87-98)MHz band dbc PCS Band Rejection Worst-case relative to 1.575GHz within ( )MHz band dbc WLAN Band Rejection Worst-case relative to 1.575GHz within (4-5)MHz band dbc 43 5 IP1dB 98MHz Input 1dB gain compression interferer signal level at 98MHz dbm +39 IP1dB 198MHz Input 1dB gain compression interferer signal level at 198MHz dbm +44 IP1dB 4MHz Input 1dB gain compression interferer signal level at 4MHz dbm +43 Idd Supply DC current at Shutdown (SD) voltage Vsd=.7V ma Ish Shutdown VSD = V ua.5 Table. Performance at Vdd = Vsd = 1.8V, Idd = 4mA & Vdd = Vsd =.8V, Idd = 4mA (for R value, see Figure ) nominal operating conditions Symbol Parameter and Test Condition Units Vdd=1.8V Idd=4mA G Gain db NF Noise Figure db IP1dB Input 1dB Compressed Power dbm IIP3 [] Input 3 rd Order Intercept Point Fc ±.5 MHz) dbm +1. S11 Input Return Loss db S Output Return Loss db -1-1 S1 Reverse Isolation db -7-7 Cell Band Rejection Worst-case relative to 1.575GHz within (87-98) MHz band dbc PCS Band Rejection Worst-case relative to 1.575GHz within ( ) MHz band dbc 5 51 WLAN Band Rejection Worst-case relative to 1.575GHz within (4-5) MHz band dbc 51 5 IP1dB 98MHz Input 1dB gain compression interferer signal level at 98 MHz dbm IP1dB 198MHz Input 1dB gain compression interferer signal level at 198 MHz dbm IP1dB 4MHz Input 1dB gain compression interferer signal level at 4 MHz dbm Idd Supply DC current at Shutdown (SD) voltage Vsd=1.8V ma 4 4 Ish Shutdown VSD = V ua.5.5 Vdd=.8V Idd=4mA Notes: 1. Measurements at 1.575GHz obtained using schematic described in Figure 1 and Figure GHz IIP3 test condition: F RF1 = MHz, F RF = MHz with input power of -3 dbm per tone measured at the worst-case side band. 3

4 1 3 4 INCH H.1 W. e3.48 SD GND VDD GND R1 L1 RF Input RFIN C3 R L C1 C RFOUT RF Output RDV MAY 9 Avago Technologies DC Pin Configuration of 4-Pins connector Pins, 4 = GND Pin 3 = Vdd Supply Pin 1 = Shutdown (SD) Circuit Symbol Size Description Part Number L1 4 nh Inductor (Taiyo Yuden HK15NJ-T) L 4 1.8nH Inductor (Taiyo Yuden HK151N8S-T) C1 4.1uF Capacitor (Kyocera CM5X5R14K1AH) C 4 47pF Capacitor (Kyocera CM5CH47J5AHF) C3 4 33pF Capacitor (Kyocera CM5CH331J16AHF) R1 4 1 Ohm (KOA RK73B1ETTB1J) R kohm (KOA RK73B1ETTB47J) Figure 1. Demoboard and application circuit components table 4

5 Vdd (Pin 7) R1 L1 C L Vdd C1 5-Ohms TL GPS Filter LNA RFin (Pin 1) RFout (Pin 6) 5-Ohms TL (Pin, 3, 4, 5, 9) Vsd R Vsd (Pin 8) C3 Figure. Demoboard and application schematic diagram Notes: The module is fully matched at the input and output RF pins. Both these pins also have built-in coupling and DC-blocking capacitors. Best noise performance is obtained using high-q wirewound inductors. This circuit demonstrates that low noise figures are obtainable with standard 4 chip inductors. C and L form a matching network that affects the frequency response and linearity of the LNA, these can be tuned to optimize gain and return loss. L1 and R1 isolates the demoboard from external disturbances during measurement. It is not needed in actual application. Likewise, C1 and C3 mitigate the effect of external noise pickup on the Vdd and Vsd lines respectively. These components are not required in actual operation. Bias control is achieved by either varying the Vsd voltage with/without R, or fixing the Vsd voltage to Vdd and adjusting R for the desired current. R = 4.7Kohm will result 6mA when Vdd = Vsd =.7V. R =.7Kohm for 4mA when Vdd = Vsd = 1.8V & R = 15Kohm for 4mA when Vdd = Vsd =.8V. 5

6 ALM-GP3 Typical Performance Curves at 5 C Gain(dB) Gain(dB) Gain Input Return Loss Output Return Loss Freq(GHz) Figure 3a. Typical S-Parameter Vdd =.7V, Idd = 6mA Gain Input Return Loss Output Return Loss Freq(GHz) Figure 4a. Typical S-Parameter Vdd = 1.8V, Idd = 4mA Return Loss Return Loss Gain(dB) Gain(dB) Gain Input Return Loss Output Return Loss Freq(GHz) Figure 3b. Passband response of typical S-Parameter Vdd =.7V, Idd = 6mA Gain Input Return Loss Output Return Loss Freq(GHz) Figure 4b. Passband response of typical S-Parameter Vdd = 1.8V, Idd = 4mA Return Loss Return Loss 6

7 ALM-GP3 Typical Performance Curves at 5 C, R = 4.7 kω Rbias (kohm) Figure 5. Idd vs Rbias at 5 C Vdd=.7V Vdd=1.8V Vsd (V) Figure 6. Idd vs Vsd for Vdd =.7V, R = 4.7kohm Vsd (V) Figure 7. Idd vs Vsd for Vdd = 1.8V, R =.7kohm NF (db) Figure 8. NF vs. Idd at Vdd =.7V -4C C 1-4C NF (db) Gain (db) Figure 9. NF vs Idd at Vdd = 1.8V Figure 1. Gain vs. Idd at Vdd =.7V 7

8 ALM-GP3 Typical Performance Curves at 5 C, R = 4.7 kω Gain (db) C Figure 11. Gain vs. Idd at Vdd = 1.8V Cell Band Rejection (dbc) Figure 1. Cell band rejection vs. Idd at Vdd =.7V -4C Cell Band Rejection (dbc) C PCS Band Rejection (dbc) C Figure 13. Cell band rejection vs. Idd at Vdd = 1.8V Figure 14. PCS band rejection vs. Idd at Vdd =.7V PCS Band Rejection (dbc) C WLAN Band Rejection (dbc) C Figure 15. PCS band rejection vs. Idd at Vdd = 1.8V Figure 16. WLAN band rejection vs. Idd at Vdd =.7V 8

9 ALM-GP3 Typical Performance Curves at 5 C, R = 4.7 kω WLAN Band Rejection (dbc) C Figure 17. WLAN band rejection vs. Idd at Vdd = 1.8V Figure 18. IP1dB vs. Vdd at 5 C 4 Figure 19. IIP3 vs. Vdd at 5 C Out of Band Gain Compression (dbm) V (6mA) 1.8V (4mA) Temperature ( C) Figure. Input signal required at 98MHz interference signal to cause 1dB gain compression at 1.575GHz Out of Band Gain Compression (dbm) V (6mA) 1.8V (4mA) Temperature ( C) Figure 1. Input signal required at 198MHz interference signal to cause 1dB gain compression at 1.575GHz Out of Band Gain Compression (dbm) V (6mA) 1.8V (4mA) Temperature ( C) Figure. Input signal required at 4MHz interference signal to cause 1dB gain compression at 1.575GHz 9

10 ALM-GP3 Typical Performance Curves at 5 C, R = 4.7 kω Stability_n4C..Mu1 Stability_..Mu1 Stability_..Mu freq, GHz Figure 3. Edwards-Sinsky Output Stability Factor (Mu) at Vdd =.7V Stability_n4C..MuPrime1 Stability_..MuPrime1 Stability_..MuPrime freq, GHz Figure 4. Edwards-Sinsky Input Stability Factor (Mu ) at Vdd =.7V Stability_n4C..Mu1 1. Stability_..Mu1 Stability_..Mu freq, GHz Figure 5. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 1.8V Stability_n4C..MuPrime1 1. Stability_..MuPrime1 Stability_..MuPrime freq, GHz Figure 6. Edwards-Sinsky Input Stability Factor (Mu ) at Vdd = 1.8V 1

11 ALM-GP3 Scattering Parameter and Measurement Reference Planes Vdd (Pin 7) R1 L1 C L Vdd C1 (Pin 1) GPS FILTER LNA (Pin 6) REFERENCE PLANE (Pin, 3, 4, 5, 9) R Vsd REFERENCE PLANE Vsd (Pin 8) C3 MODULE Figure 7. Scattering parameter measurement reference planes 11

12 ALM-GP3 Typical Scattering Parameters at 5 C, Vdd =.7V, Idd = 6mA The S- and Noise Parameters are measured using a coplanar waveguide PCB with 1 mils Rogers RO435. Figure 7 shows the input and output reference planes. The circuit values are as indicated in Figure 1. Freq S11 S11 S1 S1 S1 S1 S S (GHz) Mag. (db) Ang. Mag. (db) Ang. Mag. (db) Ang. Mag. (db) Ang

13 ALM-GP3 Typical Scattering Parameters at 5 C, Vdd = 1.8V, Idd = 4mA Freq S11 S11 S1 S1 S1 S1 S S (GHz) Mag. Ang. Mag. Ang. Mag. Ang. Mag. Ang

14 ALM-GP3 Typical Noise Parameters at 5 C, Freq = GHz, Vdd =.7V, Idd = 6mA Freq (GHz) Fmin (db) GAMMA OPT Mag Ang Rn/ ALM-GP3 Typical Noise Parameters at 5 C, Freq = GHz, Vdd = 1.8V, Idd = 4mA Freq (GHz) Fmin (db) GAMMA OPT Mag Ang Rn/ Notes: The exceptional noise figure performance of the ALM-GP3 is due to its highly optimized design. In this regard, the Fmin of the ALM-GP3 shown above is locked down by the internal input pre-match. This allows the use of relatively inexpensive chip inductors for external matching. Part Number Ordering Information Part Number Qty Container ALM-GP3-BLKG 1 7" Reel ALM-GP3-TR1G 3 13 Reel Package Dimensions Pin 1 Orientation.9 ±.1.95 ±.1.7 (all gaps) sq -9x GP3 YMXXXX. ± all edges.6.53 Top View Side View Bottom View Notes: 1. All dimensions are in millimeters.. Dimensions are inclusive of plating. 3. Dimensions are exclusive of mold flash and metal burr. 4. Y refers to Year, W refers to Work Week. 14

15 PCB Land Patterns and Stencil Design x x Land Pattern Stencil Opening Dimensions are in mm.53.6 Combination of Land Pattern & Stencil Opening 15

16 Device Orientation REEL USER FEED DIRECTION CARRIER TAPE GP3 YMXXXX GP3 YMXXXX GP3 YMXXXX USER FEED DIRECTION COVER TAPE TOP VIEW END VIEW Tape Dimensions.3 ±.5. ±.5 SEE NOTE 3 4. SEE NOTE 1 Ø /. 8. Ø 1.5 MIN. A 1.75 ±.1 R. MAX. 5.5 ±.5 SEE NOTE 3 Ko Bo Ao.1 A /.1 (All dimensions in mm) SECTION A A Ao = 3. Bo =.3 Ko = R.5 Notes: 1. 1 sprocket hole pitch cumulative tolerance ±.. Camber in compliance with EIA Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole 4. Ao and Bo are calculated on a plane at a distance "R" above the bottom of the pocket. 16

17 Reel Dimensions - 13 Inch x 1mm DATE CODE 1MM EMBOSSED LETTERING 16.mm HEIGHT x MIN..4mm THICK. Ø39.±1. HUB Ø1.±.5 6 PS CPN MPN EMBOSSED LETTERING 7.5mm HEIGHT EMBOSSED LINE (x) 89.mm LENGTH LINES 147.mm AWAY FROM CENTER POINT 6 PS RECYCLE LOGO SEE DETAIL "X" ESD LOGO Ø16. FRONT VIEW ** * -. EMBOSSED LETTERING 7.5mm HEIGHT Detail "X" +.5 Ø (MIN.) 1.5(MIN.) 6 PS Ø1.±.5 Ø39.±1. BACK VIEW R19.±.5 Ø1.3±.5(3x) SLOT 5.±.5(3x) 18.4 MAX.* For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5-14 Avago Technologies. All rights reserved. AV-4554EN - July 17, 14