Post-Routing Layer Assignment for Double Patterning

Transcription

1 Post-Routing Layer Assignment for Double Patterning Jian Sun 1, Yinghai Lu 2, Hai Zhou 1,2 and Xuan Zeng 1 1 Micro-Electronics Dept. Fudan University, China 2 Electrical Engineering and Computer Science Dept. Northwestern University, U.S.A. January 28, / 25

2 Outline 1 Single Layer Double Patterning 2 Post-Routing Layer Assignment 3 Layer Assignment for Double Patterning 4 Experimental Results 2 / 25

3 Outline 1 Single Layer Double Patterning 2 Post-Routing Layer Assignment 3 Layer Assignment for Double Patterning 4 Experimental Results 3 / 25

4 Double Patterning Lithography As feature sizes keep shrinking, single exposure cannot support any more Extra one time of exposure is used to get the fine line in Double Patterning Lithography mask 1 mask pattern pattern 4 / 25

5 Layout Decomposition During decomposing dense layout onto two masks, pattern can be split to resolve conflicts, which results in stitch Pattern split cannot resolve all conflicts Stitch has influence on electrical connection of the circuit The number unresolvable conflicts and stitches should be minimized in double patterning problem 5 / 25

6 Layout Decomposition Graph G = (V, E) is constructed by nodes indicating rectangles and edges indicating electrical connections or adjacency between rectangles Electrical connection corresponds to touching edge, which has negative weight Adjacency corresponds to conflict edge, which has positive weight A bi-coloring solution is needed to decomposing the layout Max-Cut problem 6 / 25

7 NP-Hardness of Single Layer Double Patterning It is obvious that double patterning problem is NP Double patterning problem is at most NP-complete Reduce from 4-degree Max-Cut problem to a special case of single layer double patterning 4-degree Max-Cut is NP-complete The reduction is polynomial time achievable There is mapping relation between the Max-Cut and the double patterning solution 7 / 25

8 Reduction Mesh drawing of any 4-degree undirected graph Cross point substitution with gadget β α α β β α α β 0 line width, 2 double patterning conflict length, mesh based layout Black lines and nodes in gadget can be viewed as layout pattern Red lines in gadget are conflict edges 8 / 25

9 Reduction Each gadget substitution makes 8 edges contribution on Max-Cut in generated layout 9 / 25

10 Reduction Outside of the gadget, the edges are subdivided Turn an edge into 2i pattern sections, which are connected by 2i 1 double patterning edges They make 2i 2 edges contribution on Max-Cut in generated layout 10 / 25

11 NP-Hardness of Single Layer Double Patterning Single layer double patterning problem in NP-complete When Manhattan distance is considered as double patterning conflict distance The double patterning conflict graph is always planar Max-Cut problem on it is not NP-hard 11 / 25

12 Outline 1 Single Layer Double Patterning 2 Post-Routing Layer Assignment 3 Layer Assignment for Double Patterning 4 Experimental Results 12 / 25

13 Multi Layer Assignment In multi-layer interconnection, wire sections must connect to some and must not connect to some others Node: wire section, via candidate Crossing edge: overlap sections from different net Continuation edge: electrically connected sections d1 a1 b1 B1 b4 b3 B2 A c3 c1 C1 B3 C2 D1 D2 d2 d3 a2 c2 b2 d1 a1 A D1 a2 b1 B1 b3 c1 d3 B2 b4 C1 c3 B3 C2 D2 c2 b2 d2 Via Candidate Via Node Segment Node Continuation Edge Crossing Edge 13 / 25

14 Layer Assignment for Via Minimization Layer assignment for each node Weight vector for each via candidate node The number of layers this via goes through under this assignment Weight matrix for each edge Whether short circuit happens on crossing edge ( or 0) Whether open circuit happens on continuation edge ( or 0) When the graph is tree, dynamic programming can find the layer assignment to minimize the total weight Heuristic Begin from a feasible layout Randomly choose root node to expend a tree in the graph Dynamic programming on the tree Iteratively repeat until no more improvement is made 14 / 25

15 Outline 1 Single Layer Double Patterning 2 Post-Routing Layer Assignment 3 Layer Assignment for Double Patterning 4 Experimental Results 15 / 25

16 Influence of Layer Assignment on Double Patterning M1 M2 Via / Ploy Connection Double Patterning Conflict Unresolvable Conflict The double patterning conflict can be resolved if we change the layer assignment of a rectangle M1 M2 Via / Ploy Connection 16 / 25

17 Graph Construction Consider double patterning distance in the multi layer graph Double patterning edge: adjacent sections from different net, whose distance from each other is smaller than double patterning conflict distance and not zero. d1 a1 B1 b4 b3 B2 A c3 c1 C1 B3 C2 D1 D2 d3 a2 b1 c2 b2 d2 d1 a1 A D1 a2 b1 B1 b3 c1 d3 B2 b4 C1 c3 B3 C2 D2 c2 b2 d2 Via Candidate Via Node Segment Node Continuation Edge Crossing Edge Double Patterning Edge 17 / 25

18 Weight Matrix on Double Patterning Edge If the layer assignments of two nodes has common metal layer, double patterning conflict would happen Otherwise, zero weight Similar as crossing edge, the difference is the penalty value 18 / 25

19 Framework Similar dynamic programming strategy is used to solve the weight minimization problem Single layer double patterning algorithms can be used on each reassigned metal layers separately In the weight minimization problem, the double patterning edge number is optimized instead of unresolvable conflict Via / Ploy Connection Double Patterning Conflict M1 M2 Via / Ploy Conne One more step to reduce the redundant vias is needed 19 / 25

20 Via Reduction Color information assigned in single layer double patterning is also considered into multi layer graph If changing a rectangle s layer can result in via reduction without increase of unresolvable conflict, we would accept that change. Weight matrix on double patterning edge indicates unresolvable conflict number Weight matrix on continuation edge indicates stitch number Dynamic programming on the updated graph 20 / 25

21 Outline 1 Single Layer Double Patterning 2 Post-Routing Layer Assignment 3 Layer Assignment for Double Patterning 4 Experimental Results 21 / 25

22 Unresolvable Conflict and Stitch Improvement Implemented in C++, tested on CBL testcases and compared with [Xu and Chu ICCAD09] and [Chang and Cong TCAD99] Cases #Node #Edge #URC #Stitch #Via test % 59.66% % test % 83.69% % test % 89.13% % mcc % 63.41% % mcc % 67.44% % average 27.44% 72.66% % 22 / 25

23 Improvement on bottom two metal layers Usually only the lowest two metal layers are double patterning layers Conduct the algorithm only on the bottom two layers Cases #Node #Edge #URC #Stitch #Via test % 86.21% % test % 88.95% % test % 89.81% % mcc % 99.01% % mcc % 98.22% % average 38.22% 92.44% % 23 / 25

24 Conclusions Single layer double patterning problem is NP-complete Layer assignment can be employed to reduce the number of unresolvable conflicts and stitches The three step algorithm we proposed is effective 24 / 25

25 Thank you! 25 / 25