System Design For FEC In Aeronautical Telemetry. Erik Perrins AIR FORCE FLIGHT TEST CENTER EDWARDS AFB, CA 12 MARCH 2012

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1 AFFTC-PA-1070 System Design For FEC In Aeronatial Telemetry A F F T C Erik Perrins AIR FORCE FLIGHT TEST CENTER EDWARDS AFB, CA 1 MARCH 01 Approved for pbli release; distribtion is nlimited. AIR FORCE FLIGHT TEST CENTER EDWARDS AIR FORCE BASE, CALIFORNIA AIR FORCE MATERIEL COMMAND UNITED STATES AIR FORCE

2 REPORT DOCUMENTATION PAGE Form Approved OMB No Pbli reporting brden for this olletion of information is estimated to average 1 hor per response, inlding the time for reviewing instrtions, searhing existing data sores, gathering and maintaining the data needed, and ompleting and reviewing this olletion of information. Send omments regarding this brden estimate or any other aspet of this olletion of information, inlding sggestions for reding this brden to Department of Defense, Washington Headqarters Servies, Diretorate for Information Operations and Reports ( ), 11 Jefferson Davis Highway, Site 104, Arlington, VA Respondents shold be aware that notwithstanding any other provision of law, no person shall be sbjet to any penalty for failing to omply with a olletion of information if it does not display a rrently valid OMB ontrol nmber. PLEASE DO NOT RETURN YOUR FORM TO THE ABOVE ADDRESS. 1. REPORT DATE (DD-MM-YYYY) 1/03/01 4. TITLE AND SUBTITLE. REPORT TYPE Tehnial Paper 3. DATES COVERED (From - To) Feb 1 Ot 1 (et.) a. CONTRACT NUMBER System Design For FEC In Aeronatial Telemetry b. GRANT NUMBER. PROGRAM ELEMENT NUMBER 6. AUTHOR(S) Erik Perrins d. PROJECT NUMBER e. TASK NUMBER f. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) AND ADDRESS(ES) Department of Eletrial Engineering & Compter Siene University of Kansas, Lawrene, KS PERFORMING ORGANIZATION REPORT NUMBER AFFTC-PA SPONSORING / MONITORING AGENCY NAME(S) AND ADDRESS(ES) Tom Yong, EA Air Fore Flight Test Center Edwards AFB CA SPONSOR/MONITOR S ACRONYM(S) N/A 11. SPONSOR/MONITOR S REPORT NUMBER(S) 1. DISTRIBUTION / AVAILABILITY STATEMENT Approved for pbli release A: distribtion is nlimited. 13. SUPPLEMENTARY NOTES CA: Air Fore Flight Test Center Edwards AFB CA CC: ABSTRACT This paper ontains a desription of two types of forward error orretion (FEC) odes for shaped offset qadratre phase shift keying, telemetry grop version (SOQPSK-TG). The FEC odes are a low-density parity hek (LDPC) ode and a serially onatenated onvoltional ode (SCCC). The ontribtions of this paper are on the system-design level. One major ontribtion is to design a SCCC ode word format that is as ompatible as possible with the LDPC ode word, whih simplifies other aspets of the system design. Another major ontribtion is to show exatly how demodlators and deoders an be deopled from eah other at the reeiver. This simplifies the demodlation proess bease reeiver synhronization is no longer intertwined with FEC deoding. Frthermore, this enables a mix-and-math design, where demods an be hosen based on their performane and omplexity tradeoffs. In fat, for the first time, we show how symbol-bysymbol demods an be sed with all FEC oding/deoding options, and we also show that these demods have very attrative BER performane given their simpliity. 1. SUBJECT TERMS (SOQPSK-TG), forward error orretion (FEC) odes, BIT ERROR RATE, telemetry, spetrm 16. SECURITY CLASSIFICATION OF: Unlassified a. REPORT Unlassified b. ABSTRACT Unlassified 17. LIMITATION OF ABSTRACT 18. NUMBER OF PAGES. THIS PAGE Unlassified None 1 19a. NAME OF RESPONSIBLE PERSON 41 TENG/EN (Teh Pbs) 19b. TELEPHONE NUMBER (inlde area ode) Standard Form 98 (Rev. 8-98) Presribed by ANSI Std. Z39.18

3 SYSTEM DESIGN FOR FEC IN AERONAUTICAL TELEMETRY Erik Perrins Department of Eletrial Engineering & Compter Siene University of Kansas Lawrene, KS 6604 ABSTRACT This paper ontains a desription of two types of forward error orretion (FEC) odes for shaped offset qadratre phase shift keying, telemetry grop version (SOQPSK-TG). The FEC odes are a low-density parity hek (LDPC) ode and a serially onatenated onvoltional ode (SCCC). The ontribtions of this paper are on the system-design level. One major ontribtion is to design a SCCC ode word format that is as ompatible as possible with the LDPC ode word, whih simplifies other aspets of the system design. Another major ontribtion is to show exatly how demodlators and deoders an be deopled from eah other at the reeiver. This simplifies the demodlation proess bease reeiver synhronization is no longer intertwined with FEC deoding. Frthermore, this enables a mix-and-math design, where demods an be hosen based on their performane and omplexity tradeoffs. In fat, for the first time, we show how symbol-bysymbol demods an be sed with all FEC oding/deoding options, and we also show that these demods have very attrative BER performane given their simpliity. FEC Enoders TRANSMITTER MODEL The transmitter model is shown in Figre 1. The information word (seqene) is denoted as { i } K 1 i=0, where K is the nmber of bits ontained in the information word and eah bit has a dration of T b seonds. The FEC enoder aepts as its inpt and retrns the ode word (seqene) { i } N 1 i=0 as its otpt, where N is the nmber of symbols ontained in the ode word and eah symbol has a dration of T s seonds. The FEC enoder has a rate R K/N and we have the relationship T s = RT b. Based on analysis of link bdget and throghpt reqirements, the inet Commniation Link Standards Working Grop (CLSWG) identified a oding rate of R = /3 and an information word length of K = 4096 bits (ode word length of N = 6144 symbols) as attrative design hoies [1]. Two FEC options were identified by the CLSWG: LDPC and SCCC. Frthermore, based on its sessfl deployment in serial streaming telemetry (SST) links, the CLSWG identified SOQPSK-TG as the initial option for the physial-layer waveform. Figre 1 reflets the SOQPSK-based transmitter design, where the ode word is fed to the SOQPSK modlator whih prodes the transmitted signal s(t; ). The two FEC options and the SOQPSK-TG waveform are now speified in greater detail. The LDPC ode is the R = /3, K = 4096 (N = 6144) ode developed at NASA s Jet Proplsion Laboratory (JPL) [, 3]. Bease the fll speifiation of this ode is fond in [3], we give only rsory details here. This is a qasi-yli ode in the family known as Amlate Repeat-4 Jagged Amlate (AR4JA) odes. The generator matrix for this ode is expressed in systemati form as G = [I 4096 W ], where I N denotes the N N identity matrix. Bease the generator matrix is in systemati form, the LDPC ode words have the format shown in Figre, where the information word opies the first 4096 positions in, and the parity symbols opy the last 048 positions in. The fll speifiation of the matrix W is fond in [3]; sffie it to say that it is a dense matrix of 6 6 blok irlants that permits a simplified hardware implementation. This ode has a native rate of 4/7 and the desired rate of /3 is ahieved by pntring (deleting) the last 104 olmns of the original generator matrix in [3]. Ths, the sparse parity-hek matrix H sed in the deoding algorithm has dimensions

4 FEC SOQPSK s(t; ) Enoder Modlator Figre 1: Transmitter Model. Information Parity Figre : Systemati ode word format. LDPC Enoder The LDPC enoder is shown in Figre 3, and is basially a trivial repetition of the generi FEC enoder in Figre 1. In order to reate LDPC ode words, the enoder performs the straightforward operation = G = [ W ], where the arithmeti is performed modlo-. When transmitting an LDPC ode word, the SOQPSK modlator is operated withot differential enoding and is viewed as being separate and distint from the ode, as we explain frther in the setion on deoding algorithms. SCCC Enoder The SCCC sheme for aeronatial telemetry was originally developed at the University of Kansas [4, ]. The desription in this paper ontains ertain design refinements to the basi SCCC sheme, whih have the goal of maximizing the system-level ompatibility between the LDPC and SCCC shemes. Unlike the LDPC enoder, whih is simply a generator matrix, the SCCC enoder onsists of two onstitent enoders, separated by an interleaver, as shown in Figre 4. Bease eah onstitent enoder is an enoder in its own right, eah has its own internal inpt and the otpt. These modles are onneted together to form the overall SCCC inpt and the otpt, as detailed below. CC Enoder. The first of these sbmodles is a onvoltional enoder that ontains the R = 1/, 4-state, systemati feedbak (FB) onvoltional ode (CC) with a generator given by (7,) in the otal notation, and in polynomial form is given by [6] [ ] 1 + D G(D) = D + D A blok diagram of the CC enoder is shown in Figre. It is depited as a Diret Form II linear time-invariant (LTI) system [7] with one delay element labeled as least signifiant bit (LSB) and the other as most signifiant bit (MSB). The arithmeti is performed modlo-. The enoder has one otpt stream ontaining the information bits (withot alteration) and one otpt stream ontaining the parity symbols. The two streams are ombined by means of a ommtator, whih reslts in a final otpt stream with two symbols for every inpt bit. The enoder is initialized to the all-zeros state prior to enoding the information word. After the final information bit, 409, is loked into the enoder, two additional termination symbols are appended to the inpt stream, t 4096 and t The prpose of the termination symbols is to retrn the enoder to the all-zeros state. Trellis termination LDPC Enoder Figre 3: Blok diagram of the LDPC enoder.

5 1 CC Differential P Π Enoder Enoder SCCC Enoder Figre 4: Blok diagram of the SCCC enoder. z 1 LSB z 1 MSB State (MSB LSB) t 4096 t Figre : On the left is the blok diagram of the R = 1/, 4-state, (7,) systemati feedbak (FB) CC enoder. On the right is a table that speifies the termination symbols for the CC enoder. is benefiial for the reeiver, bease the deoding algorithm an begin and end its proessing at a known state in the trellis. This ensres that the information bits at the beginning and ending edges are deoded as reliably as the ones in the middle. The vales of the termination symbols are a fntion of the enoder state after 409 is loked in; they are shown on the right in Figre. With termination, the CC enoder prodes an otpt odeword, 1, onsisting of 8196 symbols. Pntring and Interleaving. The next operations in Figre 4 are pntring (the blok denoted by the symbol P) and interleaving (the blok denoted by the symbol Π). The pntring notation sed below follows that given in [8]. The final oding rate of exatly /3 is ahieved by pntring the rate-1/ ode as follows. We begin with the bffer 1, whih onsists of 8196 symbols and is shown in the lower part of Figre 6. The rate-/3 pntring pattern [ ] 1 1 P /3 = 0 1 is sed to pntre (delete) every other symbol that ame from the lower (parity) stream of the CC enoder (denoted by the 0 in the pntring pattern), bt leaves the other parity symbol and the two information bits intat. This pattern is repeated a total of 04 times, whih is nearly the entire length of 1. The rate-3/4 pntring pattern [ ] P 3/4 = is sed to pntre (delete) two ot of every three parity symbols (denoted by the two 0 s in the pntring pattern), bt leaves the other parity symbol and the three information bits intat. This pattern is applied a total of 4 times. As shown in Figre 6, this leaves only the termination symbols and their orresponding parity symbols. The two parity symbols assoiated with the termination symbols are pntred entirely. The net reslt of this pntring sheme is that = 0 symbols are deleted from 1. This leaves exatly N = 6144 symbols remaining, K = 4096 of whih are information bits. 3

6 x x P /3 P /3 P 3/4 P 3/4 repeated 04 times repeated 4 times x x x information bit parity/termination symbol pntred symbol Figre 6: Blok diagram of the pntring and interleaving operations. The length-8196 inpt bffer, 1, has 0 symbols that are pntred (deleted). The 6144 non-pntred symbols in 1 are randomly onneted (with some onstraints) to the 6144 loations in the otpt bffer,. The most observable onstraint is that the first 4096 positions in ontain the K = 4096 information bits (in randomly permted order) and the last 048 positions in ontain parity/termination symbols. The interleaver otpt bffer,, is shown in the pper part of Figre 6 and ontains exatly N = 6144 symbols. The onnetions between 1 and are depited by the many arrows leaving 1 and leading to. These onnetions are random 1 exept for the following onstraints: The symbols in 1 that are to be pntred have no onnetion to (this obviosly deletes the symbols as far as is onerned). Any two adjaent symbols in 1 are separated by at least S loations in (by adjaent we mean adjaent non-pntred symbols in 1 ). This onstraint means that we are bilding an S-random interleaver [9]. The information bits in 1 are loated in the first /3 of, and the parity/termination symbols are loated in the last 1/3 of. This is depited by the shading of Figre 6. The last onstraint is basially optional; however, it gives the desired systemati format of Figre, whih it then shares in ommon with the LDPC ode word. As sh, we refer to this interleaver as a systemati S-random interleaver. It is important to note that the last onstraint an be worked into the interleaver design algorithm in [9] withot interfering with the S-random onstraint. In fat, we were able to find a N = 6144 interleaver with S = 7, whih is slightly higher than the expeted pper vale of 6144/.4 [9]. Althogh more intriate in its design, the systemati S-random interleaver is no more ompliated at rn-time than an ordinary S-random interleaver. Differential enoding. The last operation in Figre 4 is differential enoding. We se the differential enoding rle known as doble differential enoding [10]. Internally, the enoder has a generi inpt of and a generi otpt of. In or appliation, we drive the enoder with =, and the otpt is the final SCCC otpt of. The inpt/otpt relationship of this enoder is i = i i, i, i {0, 1} (1) with denoting the logial XOR operation. The differential enoder (DE) an be viewed as a R = 1 rersive onvoltional ode. We define the even-indexed inpts as { i } i-even and the odd-indexed inpts as { i } i-odd. The doble differential enoder an be thoght of as two separate single differential enoders, where one enodes the even-indexed inpts and the other enodes the odd-indexed inpts. 1 The randomness ors only as the interleaver is being designed. There is no randomness when the interleaver and de-interleaver are being sed; they are known to both the transmitter and reeiver and remain fixed. 4

7 Unlike the CC enoder, where we assmed the enoder was initialized to the all-zeros state, we assme here that the enoder is initialized with = 1 and 1 = 0, whih is done for reasons of ompatibility with the SOQPSK modlator that follows. Also, this enoder is not terminated to a known state, whih reslts in lower-qality deoding estimates for the last few symbols; however, this nertainty is widely distribted over the entire N = 6144 ode word via the de-interleaver and ths has a negligible impat on the overall performane of the ode. Bease the system in Figre 4 is the onatenation of two onstitent odes, separated by an interleaver, it is a serially onatenated onvoltional ode in its own right. The CC enoder is the inner ode and the DE is the oter ode (or the DE pls the SOQPSK modlator). When the modlation itself is flly inlded in the deoding loop, we are able to ahieve the best overall performane, as shown later. However, even when the modlation is ignored in the deoding loop, we are still able to ahieve very good performane. The flexibility of inlding/not inlding the modlation in the deoding loop is a key ontribtion of this paper and broadens the nmber of demods that an be sed with FEC systems. Another key ontribtion of this paper is to have designed a SCCC ode word that is formatted as losely as possible to the LDPC ode word. Bease test ranges are otfitted with a heterogenos mix of transmitters and reeivers/deoders, it is possible to have a grond station that is not eqipped with an FEC deoder. This is bease FEC deoders are expensive, and less widely deployed than legay eqipment. The ommon (and systemati) format of the two types of FEC ode words makes them more friendly for an environment with this heterogeneos mix of eqipment. In the event that a SCCC ode word is reeived by a grond station withot an FEC deoder, the information bits an be extrated via differential deoding and deinterleaving operations, both of whih are trivial ompared to a fll-blown FEC deoding operation. For LDPC ode words reeived by a terminal laking a deoder, the information bits are simply retained as is, and the parity symbols are disarded. The oding gains afforded by the FEC enoding are forfeited in either ase; however, interoperability with simple diversity reeivers is very benefiial. FEC DEMODULATOR/DECODER SYSTEMS The FEC systems reqire the se of a soft-otpt demodlator. For demodlators that se a trellis, we have implemented the soft-otpt Viterbi algorithm (SOVA) [11]. For symbol-by-symbol (SxS) demodlators, the soft otpt is obtained simply by sing the raw detetion filter (DF) otpt. In addition to the demodlator SOVA, we also need a SOVA for the onvoltional ode (CC SOVA) and for the differential enoder (DE SOVA). The two major types of demodlators (SxS and trellis) and two types of FEC odes (LDPC and SCCC) an be ombined to form for distint demodlator/deoder systems, the blok diagrams of whih are shown in Figres Before disssing how eah system is different from the others, we first onentrate on the attribtes they all have in ommon. In fat, this is one of the main ontribtions of this paper: to design FEC systems that are as similar as possible. In partilar, Eah system has a stand-alone demodlator that is ompletely deopled from the FEC deoder. The demodlator operates on the reeived signal, r(t), performs all synhronization tasks, and retrns an initial soft estimate, ĉ 0, of the odeword. Eah system has a stand-alone FEC deoder that is ompletely deopled from the soft-otpt demodlator. The FEC deoder operates on the demodlator otpt and retrns the estimated information word, û. Bease the odewords are systematially enoded, and bease FEC deoders are relatively ostly, in the event the reeiver is not eqipped with a FEC deoder, û an be reovered from a hard-limited version of ĉ 0 with relative ease (bt with no FEC performane gain, of orse). For the LDPC systems in Figres 7 and 8, û opies the first 4096 positions of ĉ 0. For the SCCC system in Figre 9, û is a 4096-bit sbset of a de-interleaved version of ĉ 0. For the SCCC system in Figre 10, û is a 4096-bit sbset of a differentially deoded and de-interleaved version of ĉ 0.

8 r(t) SOQPSK Demod ĉ 0 LDPC Deoder û Figre 7: Blok diagram of the LDPC system with a trellis demodlator. There is no differential enoding in this system. r(t) SxS ĉ 0 LDPC û Demod Deoder Figre 8: Blok diagram of the LDPC system with a SxS demodlator. There is no differential enoding in this system. r(t) SOQPSK Demod ĉ 0 SOQPSK Deoder B A K 1 (PΠ) 1 0 CC SOVA sign{ } û K (PΠ) SCCC Deoder Figre 9: Blok diagram of the SCCC system with a trellis demodlator. There is differential enoding in this system. r(t) SxS ĉ 0 Demod DE K 1 (PΠ) 1 CC 0 SOVA sign{ } û K (PΠ) SCCC Deoder Figre 10: Blok diagram of the SCCC system with a SxS demodlator. There is differential enoding in this system. 6

9 The two LDPC systems in Figres 7 and 8 are pretty straightforward in the way they are onneted, so no additional explanation is needed. On the other hand, the SCCC deoders (i.e. the enlosed sb-diagrams in Figres 9 and 10) need some additional explanation. The speifis of the SCCC deoder depend on whih demodlator is being sed. When the trellis demodlator is being sed (Figre 9), the SOQPSK Demod does the first part of the SCCC deoding proess. The swith in Figre 9 is initially in position A. The demodlator otpt is fed to a blok that sales it by a fator of K 1 = 0.7, de-interleaves it, and de-pntres it; these operations are signified by K 1 (PΠ) 1. The CC SOVA does its proessing next. One it is finished, its pper otpt is saled by K 1 = 0.7, re-interleaved, and re-pntred [K (PΠ)]. The SCCC deoder is then ready to ommene its seond iteration. The swith is now plaed in position B. The SOQPSK Deoder is now sed for the first time and the remainder of the seond iteration proeeds as with the first. The SOQPSK Deoder reses the mathed filter (MF) otpts from the SOQPSK Demod, and ths it does not have to redo the synhronization tasks of the demod. When N it iterations are finished, the lower otpt of the CC SOVA is hard-limited to prode û. Althogh the SCCC deoding proess is shown as a loop, it an also be implemented in a pipelined arhitetre for to yield a mh higher deoder throghpt. When the SxS demodlator is being sed (Figre 10), the demodlator does no part of the deoding proess. Here, the first SCCC deoding iteration begins with the DE SOVA, the lower inpt to whih is set to 0 initially. The remainder of the SCCC deoding steps are as explained above. Bease the atal inner ode is best modeled by the DE pls the SOQPSK modlator, the system in Figre 10 inrs a small performane penalty, as shown below. BIT ERROR RATE PERFORMANCE OF THE FEC SYSTEMS In this setion we provide nmerial reslts on the bit error rate (BER) performane of the systems desribed above. In most instanes, we give performane data for for different demodlators: trellis demod with PAM filters [1], trellis demod with PT filters [1], SxS demod with a nmerially-optimized (NO) filter [13], and SxS demod with an integrate-and-dmp (I&D) filter. In some instanes, however, we give data only for the trellis demod with PT filters. Also, referene data is sometimes available for the optimal demodlator maximm likelihood seqene detetion (MLSD) with a 1-state trellis [1]. Unoded Systems Figre 11 (a) shows the performane of noded systems (withot differential enoding), i.e. the stand-alone performane of the demodlators. In eah ase, we show a solid rve for the analytial probability of bit error (P b ), and disrete BER simlation points plotted on top of these rves. For the optimal detetor, the analytial P b rve is given by P b = 1/Q( 1.60E b /N 0 ) + 1/Q(.9E b /N 0 ). With SOQPSK, there are basially two error modes. The first is where two ompeting data seqenes deviate by 90 at some symbol interval, then remain apart by 90 dring the following symbol interval, and then merge bak together dring the third symbol interval. This error mode has a normalized sqared Elidean distane (NSED) of The seond error mode is where two ompeting data seqenes deviate by 90 at some symbol interval, then eah go 90 in the opposite diretion dring the following symbol interval (ending p 90 apart again), and then merge bak together dring the third symbol interval. This error mode has a NSED of.9. Both error modes have an eqal nmber of Tx/Rx seqenes where they an or. At low E b /N 0, both modes or freqently; however, as E b /N 0 inreases, the seond error mode qikly beomes rare. The 4-state trellis demods sffer very little performane loss relative to the optimal 1-state demod, as was shown in [1]. As expeted, the trellis-based demods otperform the SxS demods; however, the SxS NO has very attrative performane given its simpliity. 7

10 BER region of performane attainable with symbol-by-symbol detetion I&D NO PT PAM optimal analysis E b /N 0 [db] BER FF, non-systemati FB, systemati E b /N 0 [db] (a) (b) Figre 11: (a) BER reslts for noded SOQPSK-TG, withot differential enoding. (b) BER reslts omparing the proposed FB, systemati SCCC format, against the onventional FF, non-systemati SCCC format BER 10 4 apaity, R = /3 BER 10 4 apaity, R = /3 10 pragmati apaity R = /3 10 pragmati apaity R = / I&D NO PT PAM optimal E b /N 0 [db] I&D NO PT PAM optimal E b /N 0 [db] (a) (b) Figre 1: BER reslts for a variety of SOQPSK-TG demodlators paired with (a) LDPC and (b) SCCC. 8

11 Proposed SCCC Design vs. Original SCCC Design An important qestion is whether or not the SCCC enhanements desribed earlier (Figre 6) are worth the design effort, i.e. is performane better, the same, or worse than the onventional SCCC system in [1]? For the sake of larity, the onventional system in [1] ses a non-systemati, feed-forward (FF) CC enoder, no trellis termination, and a non-systemati interleaver. This qestion is answered in Figre 11 (b). The onlsion is that at low E b /N 0 (high BER), the proposed system is better, and for asymptotially large E b /N 0 (low BER) there is no differene. Althogh reslts are shown for only one demod example, there is no reason to expet different reslts for the other demods. Given the system design benefits (ompatibility with demods withot FEC deoders, greater ompatibility with the LDPC format), no omplexity disadvantages, and no performane disadvantages, the proposed SCCC design is reommended for adoption. LDPC and SCCC with Varios Demodlators Figre 1 (a) shows the performane of LDPC-enoded SOQPSK-TG with the for demod examples. The LDPC deoder performs a maximm of N it = 00 iterations. A referene rve is also given for the optimal demod with the optimal LDPC deoding algorithm [6, Algorithm 1.]. There is a 0. db loss that is attribtable to the saled-min deoding algorithm [14] that we sed. In addition to this, it is notable that the BER rves are more tightly bnhed in the FEC ase; that is to say, the losses in Figre 1 (a) are smaller for the progressively sboptimal demods than they are in Figre 11 (a). This reslt makes an even stronger ase for the se of the simple-yet-robst SxS detetors: the 0. db loss of the NO SxS detetor is a fair trade for the simplified implementation. Figre 1 (b) shows the performane of SCCC-enoded SOQPSK-TG with the for demod examples. The SCCC deoder performs N it = 16 iterations. A referene rve is also given for the optimal demod with the optimal softinpt soft-opt (SISO) algorithm [1] sed in plae of the SOVA. Comparing the optimal ases, LDPC has a slight advantage over SCCC. However, for the sboptimal-bt-pratial ases, the SCCC systems have a slight advantage over LDPC for asymptotially large E b /N 0 (low BER). As with LDPC, the SCCC rves are more tightly bnhed that in the noded ase. However, the SxS detetors have a slightly larger loss with SCCC than with LDPC. This is attribtable to the fat that the symbol-energy-to-noise ratio, E s /N 0, in whih the SxS demod in Figre 10 operates, is low enogh that both SOQPSK error modes or freqently. The DE SOVA that follows in Figre 10 does not have a large enogh trellis to resolve these two error modes from eah other as the deoding iterations progress. On the other hand, bease the SOQPSK deoder in Figre 9 is fed with MF otpts that preserve the ±90 transitions of the SOQPSK waveform, some additional gains are possible as the deoding iterations progress. One again, thogh, we point ot that the SxS detetors have attrative performane given their simpliity. Figre 1 also shows the hannel apaity of SOQPSK-TG with a oding rate of R = /3. Bease LDPC does not se the modlation itself in the deoding proess, its limit is given by the pragmati apaity, as explained in [16]. SCCC, on the other hand, does inlde the modlation as part of the ode, and ths its limit is given by the tre hannel apaity. The odes are within arond 1 db of apaity. CONCLUSION We have given a desription of two types of FEC LDPC and SCCC and two major types of SOQPSK demodlators trellis and symbol-by-symbol and have shown how eah is properly implemented in FEC demodlator/deoder systems. Based on the nmerial reslts we have presented, we onlde that the proposed SCCC format is the one that shold be adopted. We have also shown that LDPC and SCCC have essentially the same BER performane. We have also shown that symbol-by-symbol demodlators represent a very attrative option de to their strong performane in the oded systems and their overall simpliity and proven robstness in the field. 9

12 ACKNOWLEDGEMENT This projet is fnded by the Test Resore Management Center (TRMC) Test and Evalation/Siene & Tehnology (T&E/S&T) Program throgh the U.S. Army Program Exetive Offie for Simlation, Training and Instrmentation (PEO STRI) nder Contrat No. W900KK-11-C REFERENCES [1] integrated Network Enhaned Telemetry (inet) Program, Commniation Links Standards Working Grop (CLSWG) Fae-to-Fae Meeting, Pasadena, CA, Mar [] K. S. Andrews, D. Divsalar, S. Dolinar, J. Hamkins, C. R. Jones, and F. Pollara, The development of trbo and LDPC odes for deep-spae appliations, Pro. IEEE, vol. 9, pp , Nov [3] Consltive Committee for Spae Data Systems (CCSDS), Low density parity hek odes for se in near- Earth and deep spae appliations (131.1-O- Orange Book), Sep [4] D. Kmaraswamy, Simplified detetion tehniqes for serially onatenated oded ontinos phase modlations, Master s thesis, Dept. Elet. Eng. Comp. Si., Univ. Kansas, Lawrene, KS, Ag [] K. Damodaran, Serially onatenated oded ontinos phase modlation for aeronatial telemetry, Master s thesis, Dept. Elet. Eng. Comp. Si., Univ. Kansas, Lawrene, KS, De [6] T. K. Moon, Error Corretion Coding: Mathematial Methods and Algorithms. New York: Wiley-Intersiene, 00. [7] A. V. Oppenheim and A. S. Willsky, Signals and Systems. New York: Prentie Hall, [8] Y. Yasda, K. Kashiki, and Y. Hirata, High-rate pntred onvoltional odes for soft deision Viterbi deoding, IEEE Trans. Commn., vol. 3, pp , Mar [9] D. Divsalar and F. Pollara, (199, May), Mltiple trbo odes for deep-spae ommniations, Teleommniations and Data Aqisition Progress Report, vol. [Online]. Available: report/4-11/11t.pdf. [10] M. K. Simon, Mltiple-bit differential detetion of offset QPSK, IEEE Trans. Commn., vol. 1, pp , Jn [11] M. P. C. Fossorier, F. Brkert, S. Lin, and J. Hagenaer, On the eqivalene between SOVA and max-log-map deodings, IEEE Commn. Lett., vol., pp , May [1] E. Perrins and M. Rie, Reded-omplexity approah to iterative detetion of SOQPSK, IEEE Trans. Commn., vol., pp , Jl [13] M. Geoghegan, Optimal linear detetion of SOQPSK, in Pro. Int. Telemetering Conf., Ot. 00. [14] J. Chen, A. Dholakia, E. Eleftherio, M. P. C. Fossorier, and X.-Y. H, Reded-omplexity deoding of ldp odes, IEEE Trans. Commn., vol. 3, pp , Ag. 00. [1] S. Benedetto, D. Divsalar, G. Montorsi, and F. Pollara, A soft-inpt soft-otpt APP modle for iterative deoding of onatenated odes, IEEE Commn. Lett., vol. 1, pp. 4, Jan [16] C. Şahin and E. Perrins, The apaity of SOQPSK-TG, in Pro. IEEE Military Commn. Conf., (Baltimore, MD), pp. 60, Nov