Standard-Definition Video Filter Amplifiers with

Transcription

1 19-867; Rev ; 9/7 EVALUATION KIT AVAILABLE Standard-Definition Video Filter Amplifiers with General Description The are low-power video amplifiers with integrated reconstruction filters. Specially suited for standard-definition video signals, such as composite and luma, these devices are ideal for a wide range of applications such as cell phones and security/cctv cameras. Video signals should be DC-coupled into the input and AC-coupled into the input. The have two single-pole, singlethrow (SPST) analog switches that can be used to route stereo audio, video, or digital signals. The reconstruction filter typically has ±1dB passband flatness at 9MHz and 52dB attenuation at 27MHz. The amplifiers have a gain of 2V/V, and the outputs can be DC-coupled to a load of, which is equivalent to two video loads. The outputs can be AC-coupled to a load of 15Ω, which is equivalent to one video load. The operate from a 2.7V to 3.6V single supply and are specified over the -4 C to +125 C automotive temperature range. The / are available in a small 12-pin TQFN (3mm x 3mm) package. Features Integrated Reconstruction Filter for Standard- Definition Video 9MHz, ±1dB Passband 52dB Attenuation at 27MHz Fixed Gain of 2V/V DC- or AC-Coupled Output 2.7V to 3.6V Single-Supply Operation Security/CCTV Cameras Mobile Phones/Cell Phones Digital Still Cameras (DSC) Camcorders (DVC) Portable Media Players (PMP) Applications Ordering Information PART INPUT TYPE PIN-PACKAGE PKG CODE ATC+ DC BIAS 12 TQFN-EP* T ABF ATC+ AC CLAMP 12 TQFN-EP* T ABE Note: All devices are specified over the -4 C to +125 C operating temperature range. +Denotes a lead-free package. *EP = Exposed pad. Pin Configuration appears at end of data sheet. TOP MARK Functional Diagrams TO 5mV BUFFER 3mV TO 4mV UNKNOWN BIAS CLAMP 3mV Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS to...-.3v to +4V to...-.3v to +4V COM_, NO_ to...-.3v to ( +.3V), IN_ to...-.3v to +4V Short-Circuit Duration to,...continuous Continuous Input Current, IN_,...±2mA COM_, NO_...±1mA Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Peak Current COM_, NO_ (pulsed at 1ms, 1% duty cycle)...±2ma Continuous Power Dissipation (T A = +7 C) 12-Pin TQFN (derate 14.7mW/ C above +7 C) mW Operating Temperature Range...-4 C to +125 C Junction Temperature C Storage Temperature Range C to +15 C Lead Temperature (soldering 1s)...+3 C ( = = 3.3V, = V, no load, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage Range Guaranteed by PSRR V Supply Current I DD ma Shutdown Supply Current I V = 1 µa VIDEO DC BUFFER INPUTS () Guaranteed by outputvoltage swing = 3V = 2.7V 1.5 Input Voltage Range V IN 1.2 Input Current I IN V IN = V µa Input Resistance R IN 3 kω DC Voltage Gain A V R L = 15Ω to Output Level Output-Voltage Swing SYNC-TIP CLAMP INPUT () = 2.7V, V IN 1.5V = 3V, V IN 1.2V Measured at V OUT, =.1µF to, R L = 15Ω to Measured at output, = 2.7V, V IN 1.5V, R L = 15Ω to -.2V Measured at output, = 2.7V, V IN 1.5V, R L = 15Ω to /2 Measured at output, = 3V, V IN 1.2V, R L = 15Ω to -.2V Measured at output, = 3V, V IN 1.2V, R L = 15Ω to /2 Measured at output, = 3.135V, V IN 1.5V, R L = to -.2V V V/V mv Sync-Tip Clamp Level V CLP Sync-tip clamp V Input Voltage Range Sync Crush = 2.7V to 3.6V 1.5 = 3V to 3.6V 1.2 Sync-tip clamp, percentage reduction in sync pulse (.3V P-P ), guaranteed by input clamping current measurement V P-P V P-P 2 %

3 ELECTRICAL CHARACTERISTICS (continued) ( = = 3.3V, = V, no load, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Clamping Current Sync-tip clamp 1 2 µa Maximum Input Source Resistance DC Voltage Gain (Note 2) A V R L = 15Ω to Output Level = 2.7V, V IN 1.5V = 3V, V IN 1.2V Measured at V OUT, =.1µF to, R L = 15Ω to Measured at output, = 2.7V, V IN = V CLP to (V CLP +1.5V), R L = 15Ω to -.2V Measured at output, = 2.7V, V IN = V CLP to (V CLP +1.5V), R L = 15Ω to /2 3 Ω V/V V Output-Voltage Swing Measured at output, = 3V, V IN = V CLP to (V CLP +1.2V), R L = 15Ω to -.2V 2.4 V P-P Measured at output, = 3V, V IN = V CLP to (V CLP +1.2V), R L = 15Ω to /2 2.4 Measured at output, = 3.135V, V IN = V CLP to (V CLP +1.5V), R L = to -.2V 2.1 Output Short-Circuit Current Short to (sourcing) 14 Short to V CC (sinking) 7 Output Resistance R OUT V OUT = 1.5V, -1mA I LOAD +1mA.2 Ω Output Leakage Current = 1 µa Power-Supply Rejection Ratio 2.7V 3.6V 48 db Standard-Definition Reconstruction Filter Differential Gain Differential Phase 2T Pulse-to-Bar K Rating DG DP ±1dB passband flatness 9 MHz V = 2V P-P, reference frequency is 1kHz 5-step modulated staircase of 129mV step size and 286mV P-P subcarrier amplitude; f = 4.43MHz 5-step modulated staircase of 129mV step size and 286mV P-P subcarrier amplitude; f = 4.43MHz Bar time is 18µs, the beginning 2.5% and the ending 2.5% of the bar time are ignored, 2T = 2ns f = 5.5MHz +.15 f = 1MHz -3 f = 27MHz -52 ma db 1 %.4 Degrees.6 K% 2T Pulse Response 2T = 2ns.2 K% 2T Bar Response Bar time is 18µs, the beginning 2.5% and the ending 2.5% of the bar time are ignored, 2T = 2ns.2 K% 3

4 ELECTRICAL CHARACTERISTICS (continued) ( = = 3.3V, = V, no load, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Nonlinearity 5-step staircase, f = 4.43MHz.5 % Group Delay Distortion 1kHz f 5.5MHz, outputs are 2V P-P 12 ns Peak Signal to RMS Noise 1kHz f 5.5MHz 71 db Power-Supply Rejection Ratio f = 1MHz, 1mV P-P 29 db Output Impedance f = 5.5MHz 4.8 Ω All-Hostile Crosstalk f = 4.43MHz -64 db ANALOG SWITCHES V Analog Signal Range COM_, V V NO_ On-Resistance (Note 3) R ON = 2.7V, I COM_ = 1mA, V NO_ = 1.5V Ω On-Resistance Match Between Channels (Notes 3, 4) ΔR ON = 2.7V, I COM_ = 1mA, V NO_ = 1.5V.4 Ω On-Resistance Flatness (Note 5) R FLAT(ON) = 2.7V, I COM_ = 1mA, V NO_ = 1.V, 1.5V, 2.V NO_ Off-Leakage Current (Note 3) COM_ On-Leakage Current (Note 3) I NO_(OFF) I COM_(ON) = 3.6V, V COM_ =.3V, 3.3V; V NO_ = 3.3V,.3V = 3.6V, V COM_ =.3V, 3.3V; V NO_ =.3V, 3.3V, or unconnected Turn-On Time t ON V NO_ = 1.5V; R L = 3Ω, C L = 35pF, V IH = 1.5V, V IL = V Turn-Off Time t OFF V NO_ = 1.5V; R L = 3Ω, C L = 35pF, V IH = 1.5V, V IL = V Ω na na 1 ns 1 ns Skew (Note 3) t SKEW R S = 39Ω, C L = 5pF 2 ns Charge Injection Q V GEN = 1.5V, R GEN = Ω, C L = 1nF 1 pc Off-Isolation V ISO f = 1MHz; V NO_ = 1V P-P ; R L = 5Ω, C L = 5pF -55 f = 1M H z; V N O_ = 1V P - P ; R L = 5Ω, C L = 5p F -8 db On-Channel -3dB Bandwidth BW Signal = dbm, R L = 5Ω, C L = 5pF 3 MHz Total Harmonic Distortion THD V COM_ = 2V P-P, R L = 6Ω.3 % NO_ Off-Capacitance C NO_(OFF) f = 1MHz 2 pf Switch On-Capacitance C (ON) f = 1MHz 5 pf f = 1MHz; V NO_ = 1V P-P, R L = 5Ω, C L = 5pF Switch-to-Switch V CT f = 1MHz; V NO_ = 1V P-P, R L = 5Ω, C L = 5pF NO_-to- Video circuit is on, switches are open f = 1MHz; V NO_ = 1V P-P -55 f = 1MHz; V NO_ = 1V P-P -8 db db 4

5 ELECTRICAL CHARACTERISTICS (continued) ( = = 3.3V, = V, no load, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) CROSSTALK -to-no_ -to-com -to-com PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LOGIC SIGNAL ( AND ) Video circuit is on, f = 2kHz, = 2V P-P, R L = 5Ω, C L = 5pF Video circuit is shutdown, f = 2kHz,.25V P-P at, R L = 6Ω Video circuit is on, f = 2kHz, = 2V P-P, R L = 5Ω, C L = 5pF 9 db 1 db 9 db Logic-Low Threshold V IL.5 V Logic-High Threshold V IH 1.4 V Logic-Input Current I IN 1 µa LOGIC SIGNAL ().3 x Logic-Low Threshold V IL V.7 x Logic-High Threshold V IH V Logic-Input Current I IN 1 µa Note 1: All devices are 1% production tested at T A = +25 C. Specifications over temperature limits are guaranteed by design. Note 2: Voltage gain (A V ) is a two-point measurement in which the output-voltage swing is divided by the input-voltage swing. Note 3: Guaranteed by design. Note 4: ΔR ON = R ON(MAX) - R ON(MIN). Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Typical Operating Characteristics ( = = 3.3V. Video outputs have R L = 15Ω connected to. T A = +25 C, unless otherwise noted.) GAIN (db) k V OUT = 1mV P-P SMALL-SIGNAL GAIN vs. FREQUENCY 1M 1M FREQUENCY (Hz) /24 toc1 1M GAIN (db) M SMALL-SIGNAL GAIN FLATNESS vs. FREQUENCY 1M FREQUENCY (Hz) V OUT = 1mV P-P /24 toc2 1M GAIN (db) k V OUT = 2V P-P LARGE-SIGNAL GAIN vs. FREQUENCY 1M 1M FREQUENCY (Hz) /24 toc3 1M 5

6 Typical Operating Characteristics (continued) ( = = 3.3V. Video outputs have R L = 15Ω connected to. T A = +25 C, unless otherwise noted.) GAIN FLATNESS (db) M LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY 1M FREQUENCY (Hz) V OUT = 2V P-P /24 toc4 1M GROUP DELAY (ns) k V OUT = 2V P-P GROUP DELAY vs. FREQUENCY 1M 1M FREQUENCY (Hz) /24 toc5 1M PSRR (db) k POWER-SUPPLY REJECTION RATIO vs. FREQUENCY 1k 1M 1M FREQUENCY (Hz) /24 toc6 1M QUIESCENT SUPPLY CURRENT (ma) QUIESCENT SUPPLY CURRENT vs. TEMPERATURE /24 toc7 VOLTAGE GAIN (V/V) VOLTAGE GAIN vs. TEMPERATURE /24 toc8 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE vs. INPUT VOLTAGE () /24 toc TEMPERATURE ( C) TEMPERATURE ( C) INPUT VOLTAGE (V) DIFFERENTIAL GAIN (%) DIFFERENTIAL GAIN AND PHASE f = 4.43MHz /24 toc1 2T RESPONSE /24 toc11 2mV/div DIFFERENTIAL PHASE (deg) f = 4.43MHz ns/div 4mV/div 6

7 Typical Operating Characteristics (continued) ( = = 3.3V. Video outputs have R L = 15Ω connected to. T A = +25 C, unless otherwise noted.) 12.5T RESPONSE 4ns/div /24 toc12 2mV/div 4mV/div NTC-7 VIDEO TEST SIGNAL 1μs/div /24 toc13 5mV/div 1V/div PAL MULTIBURST RESPONSE 1μs/div /24 toc14 5mV/div 1V/div PAL COLOR BARS /24 toc15 FIELD SQUARE-WAVE RESPONSE /24 toc16-2 SWITCH INPUT-TO-INPUT CROSSTALK vs. FREQUENCY /24 toc17 5mV/div 5mV/div GAIN (db) V/div 1V/div μs/div 2ms/div -12 1k 1M 1M FREQUENCY (Hz) 1M GAIN (db) SWITCH OUTPUT-TO-OUTPUT CROSSTALK vs. FREQUENCY /24 toc18 OUTPUT IMPEDANCE (Ω) OUTPUT IMPEDANCE vs. FREQUENCY /24 toc k 1M 1M FREQUENCY (Hz) 1M.1 1k 1M FREQUENCY (Hz) 1M 7

8 Typical Operating Characteristics (continued) ( = = 3.3V. Video outputs have R L = 15Ω connected to. T A = +25 C, unless otherwise noted.) ENABLE RESPONSE /24 toc2 4ms/div V IN = 1V DISABLE RESPONSE /24 toc22 V IN = 1V 1V/div OUTPUT 1V/div ENABLE RESPONSE /24 toc21 V IN = TO 4ms/div DISABLE RESPONSE /24 toc23 V IN = TO 1V/div OUTPUT 25mV/div 1V/div 1V/div OUTPUT 1V/div OUTPUT 25mV/div 1ns/div 1ns/div Pin Description PIN NAME FUNCTION 1 N.C. No Connection. Not internally connected. 2 Analog Switch 1 Common Terminal 3 Analog Switch 2 Common Terminal 4 Video Output 5 Ground 6 Video Input 7 Analog Switch 2 Normally Open Terminal 8 Analog Switch 1 Normally Open Terminal 9 Active-Low Shutdown Input. Connect to to place device in shutdown. 1 Analog Switch 1 Digital Control Input 11 Analog Switch 2 Digital Control Input 12 Positive Power Supply. Bypass to with a.1µf capacitor. EP Exposed Paddle. Connect EP to. EP is also internally connected to. 8

9 Detailed Description The consist of a lowpass filter and an output amplifier capable of driving a standard 15Ω video load to ground. The has an input buffer and the has an input sync-tip clamp. The both have two SPST analog switches that can be used to route audio, video, or digital signals. The output amplifiers provide a fixed gain of 2V/V. The filter and amplify the video output. External video signals, in which the DC bias is usually not known, can be AC-coupled to the. Input with DC Buffer () The input of the can be directly connected to the video source if the signal is approximately between ground and 1V. This specification is commonly found at the output of most video s. DC-coupling requires that the input signals are ground referenced so that the sync tip of composite or luma signals is within 5mV of ground. Input with Sync-Tip Clamp () When the bias of the incoming video signal is either unknown or not between ground and 1V (such as an external video source), use the to connect the video source through a.1µf capacitor. The input of the can only handle signals with a sync pulse, such as composite video and luma. An internal sync-tip clamp sets the internal DC level of the video signal. Video Filter The filter passband (±1dB) is typically 9MHz to make the device suitable for standard-definition video signals from all sources (including broadcast video and DVD). Broadcast video signals are channel limited: NTSC signals have 4.2MHz bandwidth, and PAL signals have 5MHz bandwidth. Video signals from a DVD player, however, are not channel limited; therefore, the bandwidth of DVD video signals can approach the Nyquist limit of 6.75MHz (recommendation ITU-R BT.61-5 specifies 13.5MHz as the sampling rate for standarddefinition video). Therefore, the maximum bandwidth of the signal is 6.75MHz. To ease the filtering requirements, most modern video systems oversample by two times, clocking the video current at 27MHz. Outputs The video output amplifiers can both source and sink load current, allowing output loads to be DC- or ACcoupled. The amplifier output stage needs around 3mV of headroom from either supply rail. The parts have an internal level shift circuit that positions the sync tip at approximately 3mV at the output. If the supply voltage is greater than 3.135V (5% below a 3.3V supply), each amplifier can drive two DC-coupled video loads to ground. If the supply is less than 3.135V, each amplifier can drive only one DC-coupled or AC-coupled video load. Shutdown The draw less than 1µA supply current when is low. In shutdown, the amplifier output becomes high impedance. IN_ SPST Analog Switches Table 1. Logic for Analog Switches SWITCH STATE OFF 1 ON Applications Information Reducing Power Consumption in the Video s The have high-impedance input buffers that can work with source resistances as high as 3Ω. To reduce power dissipation in the video s, the output resistor can be scaled up in value. The reference resistor that sets the reference current inside the video s must also be similarly scaled up. For instance, if the output resistor is 37.5Ω, the must source 26.7mA when the output is 1V. If the output resistor is increased to 3Ω, the only needs to source 3.33mA when the output is 1V. There is parasitic capacitance from the output to ground. That capacitance in parallel with the output resistor forms a pole that can potentially roll off the frequency response of the video signal. For example, 3Ω in parallel with 5pF creates a pole at 1.6MHz. To minimize this capacitance, reduce the area of the signal trace attached to the output as much as possible, and place the as close as possible to the video outputs. 9

10 AC-Coupling the Outputs The outputs can be AC-coupled because the output stage can source and sink current as shown in Figure 1. Coupling capacitors should be 22µF or greater to keep the highpass filter formed by the 15Ω equivalent resistance of the video transmission line to a corner frequency of 4.8Hz or below. The frame rate of PAL systems is 25Hz, and the frame rate of NTSC systems is 3Hz. The corner frequency should be well below the frame rate. Changing Between Video Output and Microphone Input on a Single Connector A single pole on a mobile phone jack can be used for transmitting a video signal to a television or receiving the signal from the microphone of a headset. Figure 2 shows how the can transmit a video signal. Figure 3 shows how the can receive and pass on the signal from a microphone. Switching Between Video and Digital Signals The dual SPST analog switches and the high-impedance output of the video amplifier enable video transmission, digital transmission, and digital reception all on a single pole of a connector. Figures 4, 5, and 6 show the different configurations of the. Selecting Between Two Video Sources The analog switches can multiplex between two video sources. For example, a mobile phone might have an application processor with an integrated video encoder and a mobile graphics processor with an integrated video encoder, each creating a composite video signal that is between and 1V. Figure 7 shows this application in which the chooses between two internal video sources. The two analog switches can be used as a 2:1 multiplexer to select which video output is actually filtered, amplified, and then driven out to the connector. Close switch 1 to select the video from the application processor. Close switch 2 to select the video from the mobile graphics processor. Figure 8 shows the application in which the chooses between two external video sources with unknown DC bias. Y/C Mixer with Chroma Mute If the video application processor has two current output digital-to-analog converters (s) for luma (Y) and chroma (C), respectively, then the signals can be mixed together to create a composite video signal by summing the currents into a single resistor, as shown in Figure 9. The composite video signal should be ACcoupled into the because the composite video signal has a positive DC level shift. The sync-tip clamp of the will re-establish the DC bias level of the signal inside the chip. The chroma current is connected to essentially a single-pole, double-throw (SPDT) switch. In one position, the switch routes the chroma current into the resistor. In the other position, the switch routes the chroma current into ground. For the Y/C mixer to work properly, the chroma current must be routed through analog switch 1 into the resistor. If the chroma signal needs to be muted, then the chroma current is shunted to ground through analog switch 2. Analog switch 1 stays open. See Figure 1. APPLICATION PROCESSOR BUFFER 22μF MICROCONTROLLER Figure 1. AC-Coupled Outputs 1

11 APPLICATION PROCESSOR V CC V CC BASEBAND IC MIC BIAS OFF MIC AMP BUFFER TO JACK OFF Figure 2. Video Output Configuration APPLICATION PROCESSOR OFF BUFFER TO JACK V CC OFF OFF OFF V CC BASEBAND IC MIC BIAS MIC AMP Figure 3. Microphone Input Configuration 11

12 APPLICATION PROCESSOR V CC V CC BASEBAND IC OFF BUFFER TO JACK OFF Figure 4. Video Output Configuration APPLICATION PROCESSOR OFF BUFFER TO JACK V CC OFF OFF OFF V CC BASEBAND IC OFF Figure 5. Digital Output Configuration 12

13 APPLICATION PROCESSOR V CC OFF BUFFER V CC OFF OFF OFF BASEBAND IC TO JACK OFF Figure 6. Digital Input Configuration BUFFER APPLICATION PROCESSOR SW1 SW2 MOBILE GPU Figure 7. Selecting Between Two Internal Video Sources 13

14 SW_CONTROL CLAMP 6dB _OUT Figure 8. Selecting Between Two External Video Sources GPIO 1 APPLICATION PROCESSOR CLAMP 6dB GPIO 2 C y Figure 9. Luma and Chroma Mixer Circuit (Chroma Current Routed into Resistor) 14

15 APPLICATION PROCESSOR C GPIO 1 GPIO 2 CLAMP 6dB LUMA y Figure 1. Luma and Chroma Mixer Circuit with Chroma Muted. Chroma Current is Shunted into Ground Through Analog Switch 2. 15

16 Anti-Alias Filter The can also provide anti-alias filtering with buffer before an analog-to-digital converter (ADC), which would be present in an NTSC/PAL video decoder, for example. Figure 11 shows an example application circuit for. An external composite video signal is applied to IN, which is terminated with to ground. The signal is AC-coupled to because the DC level of an external video signal is usually not well specified. SHUTDOWN CIRCUIT Power-Supply Bypassing and Ground The operate from a single-supply voltage down to 2.7V, allowing for low-power operation. Bypass to with a.1µf capacitor. Place all external components as close as possible to the device. IN CLAMP VIDEO DECODER Figure 11. is Used as an Anti-Alias Filter with Buffer (Switches Can Route Other Signals) Switch Test Circuits/Timing Diagrams V NO COM V OUT LOGIC INPUT V IH V IL 5% tr < 5ns tf < 5ns R L C L t OFF LOGIC INPUT IN_ SWITCH OUTPUT V V OUT t ON.9 x V UT.9 x V OUT Figure 12. Switching Time C L INCLUDES FIXTURE AND STRAY CAPACITANCE. V OUT = V N_ ( R L R L + R ON ) 16

17 IN+ C L OUT- IN- Switch Test Circuits/Timing Diagrams (continued) R S R S LOGIC INPUT V TO C L OUT+ t INFALL t INRISE V IN+ V 5% 9% 1% 1% 9% V IN- 5% V t OUTFALL t OUTRISE V OUT+ V 5% 9% 1% 1% 9% V OUT- 5% V t SKEW Figure 13. Output Signal Skew 17

18 V GEN + R GEN NO Figure 14. Charge Injection V OR 1nF IN_ IN_ COM_ V TO COM_ Switch Test Circuits/Timing Diagrams (continued) C L V OUT V IN V OUT IN OFF NETWORK ANALYZER 5Ω 5Ω ON Q = (ΔV OUT )(C L ) ΔV OUT OFF OFF-ISOLATION = 2log(V OUT /V IN ) ON-LOSS = 2log(V OUT /V IN ) CROSSTALK = 2log(V OUT /V IN ) NO_ V OUT MEAS REF 5Ω 5Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND ON NO_ TERMINAL ON EACH SWITCH. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 15. On-Loss, Off-Isolation, and Crosstalk 1nF COM_ CAPACITANCE ANALYZER IN V OR f = 1MHz NO_ Figure 16. Channel Off-/On-Capacitance 18

19 APPLICATION PROCESSOR MICROCONTROLLER BUFFER Typical Operating Circuits APPLICATION PROCESSOR CLAMP MICROCONTROLLER 19

20 TOP VIEW N.C. *EP = EXPOSED PADDLE Pin Configuration THIN QFN (3mm x 3mm) EP* PROCESS: BiCMOS Chip Information 2

21 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to MARKING D D/2 E/2 E AAAA LC C L (ND - 1) X e e k L (NE - 1) X e E2 E2/2 D2/2 b D2.1 M C A B 12x16L QFN THIN.EPS.1 C.8 C A A2 A1 L C L C L L e e PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x.8mm I 2 21

22 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to PKG 8L 3x3 12L 3x3 16L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A b D E e.65 BSC..5 BSC..5 BSC. L N ND NE A A2.2 REF.2 REF.2 REF k PKG. CODES MIN. EXPOSED PAD VARIATIONS D2 NOM. MAX. MIN. E2 NOM. MAX. PIN ID JEDEC TQ x 45 WEEC T x 45 WEED-1 T x 45 WEED-1 T T x 45 WEED-2 T1633F-3.65 T x 45 WEED x 45 WEED-2 T1633FH x 45 WEED x 45 WEED-2 T x 45 WEED-2 NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-12. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN.2 mm AND.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO22 REVISION C. 1. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. 12. WARPAGE NOT TO EXCEED.1mm. PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x.8mm I 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 22 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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