PA_IN GND LNA. SiGe FE T7024 GND LNA_IN VS_LNA. Figure 1. Block diagram

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1 T724 ISM 2.4 GHz Front End IC Description The T724 is a monolithic SiGe transmit/ receive front end IC with power amplifier, low-noise amplifier and T/R switch driver. It is especially designed for operation in TDMA systems like Bluetooth, DECT, IEE FHSS WLAN, home RF and ISM proprietary radios. Features Single 3-V supply voltage High-power-added efficient power amplifier (P out typ. 23 dbm) Ramp-controlled output power Low-noise preamplifier (NF typ. 2.3 db) Block Diagram Due to the ramp-control feature and a very low quiescent current an external switch transistor for V S is not required. Electrostatic sensitive device. Observe precautions for handling. Biasing for external PIN diode T/R switch Current-saving standby mode Few external components PSSO2 plastic package with down set paddle heat slug or HP-VFQFP-N2 LNA_IN VS_LNA RX_ON LNA_OUT PA_IN RAMP TX / RX / standby control LNA PA TX SiGe FE T724 R_SWITCH SWITCH_OUT Ordering Information Figure 1. Block diagram Extended Type Number Package Remarks T724-TRS PSSO2 Tube T724-TRQ PSSO2 Taped and reeled T724-PGS HP-VFQFP-N2 Tube T724-PGQ HP-VFQFP-N2 Taped and reeled T724-DB Flipchip Rev. A, 2-May-1 1 (1)

2 T724 Pin Description R_SWITCH SWITCH_OUT LNA_IN VS_LNA RAMP T724 Figure 2. Pinning PSSO VS_LNA LNA_IN T PA:IN RX_ON LNA_OUT PA_IN RAMP SWITCH_OUT R_SWITCH RX_ON LNA_OUT Figure 3. Pinning HP VFQFP N2 Pin SSO2 Pin N2 Symbol Function ÁÁ Resistor to 1 4 ÁÁ R_SWITCH sets the PIN diode current 2 ÁÁ SWITCH_OUT Switched current output for PIN diode 3 6 Ground ÁÁ 4 7 Low-noise amplifier input ÁÁ LNA_IN ÁÁ Supply voltage input for low-noise 9 ÁÁ VS_LNA amplifier ÁÁ 6 8 Ground 7 11 ÁÁ Inductor to power supply and matching network for 8 12ÁÁ 9 13 power amplifier output ÁÁ 1 1 Ground Power ramping 11 1 RAMP control input Inductor to power supply for power amplifier ÁÁ Ground Supply voltage for 1 19 power amplifier ÁÁ Power amplifier 16 2ÁÁ PA_IN input ÁÁ Ground 18 1ÁÁ LNA_OUT Low-noise amplifier output 19 2ÁÁ RX_ON RX active high 2 3 Power-up active high Slug Slug Ground 2 (1) Rev. A, 2-May-1

3 Pad Description Pad Symbol Function X Coordinate of Pad *) (m) T724 Y Coordinate of Pad *) (m) 1 R_SWITCH Resistor to sets the PIN diode current 4 2 SWITCH_OUT Switched current output for PIN diode Ground 4 LNA_IN Low noise amplifier input 4 Ground 8 6 VS_LNA Supply voltage input for low noise amplifier 12 7 Ground 16 8 Ground 2 9 Inductor to power supply and matching network for 24 power amplifier output 1 Ground Ground RAMP Power ramping control input Inductor to power supply for power amplifier Ground Ground Supply voltage for power amplifier PA_IN Power amplifier input Ground LNA_OUT Low noise amplifier output 12 2 RX_ON RX active high 8 21 Power up active high 4 8 *) relative to centre of Pad 3 Pad Location 318 m LNA_OUT PA_IN RAMP 16 m RX_ON 1 2 R_SWITCH SWITCH_OUT Pad diameter 18 m Ball diameter 2 m LNA_IN VS_LNA Figure 4. Pad location, die thickness: 4 m Rev. A, 2-May-1 3 (1)

4 T724 Absolute Maximum Ratings All voltages are referred to ground (Pins and slug), no RF Á Á Á Á Á Á Á Á Á RF input power PA Á Parameters Symbol Value Unit Supply voltage Pins VS_LNA,, and V Á S 6 V Junction temperature T j 1 C Storage temperature T stg 4 to +12 C RF input power LNA P inlna dbm dbm P inpa + 1 dbm dbm Thermal Resistance Parameter Symbol Value Unit Junction ambient PSSOP2, slug soldered on PCB R thja 19 K/W Junction ambient HP VFQFP N2, slug soldered on R thja 27 K/W PCB Operating Range All voltages are referred to ground (Pins and slug). Power supply points are VS_LNA,,,. The following table represents the sum of all supply currents depending on the TX/RX mode. Á Á Á Á Á Parameters Symbol Min. Typ. Max. Unit Supply voltage Pins, and V S V Supply voltage Pin VS_LNA V S V Supply current TX PSSO2 I N2 S 19 ma I S 16 ma RX I S 8 ma Standby current = I S 1 µa Ambient temperature T amb C Electrical Characteristics Test conditions (unless otherwise specified): V S = 3. V, T amb = 2 C Parameter Test Conditions / Pins Symbol Min. Typ. Max. Unit Power amplifier Á 1) Supply voltage Pins, and ÁÁ V S V ÁÁ Supply current TX PSSO2 I S_TX ÁÁ N2 I S_TX ma ma ÁÁ RX (PA off), Á I ÁÁ V RAMP.1 V S_RX ÁÁ 1 µa Á Standby current Á I Standby S_ Á standby 1 µa Á Frequency range ÁÁ TX f GHz 4 (1) Rev. A, 2-May-1

5 Electrical Characteristics (continued) Test conditions (unless otherwise specified): V S = 3. V, T amb = 2 C T724 Parameter Test Conditions / Pins Symbol Min. Typ. Max. Unit Á Gain-control range TX Gp 6 42 db Á Á Á Power gain max. Á TX Gp db Á Power gain min. Á Pin PA_IN to Gp 4 17 db Á Ramping voltage max. Á TX, power gain (max) V RAMP Á Á Pin RAMP max V Á Ramping voltage min. Á TX, power gain (min) V RAMP ÁÁ.1 V Pin RAMP min Á Ramping current max. TX, V Á Á RAMP = 1,7 V I RAMP Á. ma Pin RAMP max Á Power-added efficiency TX PSSO2 Á Á N % % Á Saturated output power TX, input power = dbm referred to Pins Á Á P sat dbm Á Input matching 2) Load TX Pin PA_IN Á VSWR <1.:1 1. : 1 Á Output matching 2) Load ÁÁ TX Pins <1.:1 Á VSWR ÁÁ 1. : 1 Á 1dBCP Á TX Pins 2 fo Á 3 dbc Á 1dBCP Á TX Pins 3 fo Á 3 dbc T/R switch driver (current programming by external resistor from R_SWITCH to ) Á Switch-out current output Á Standby I S_O_ Á Á Pin SWITCH_OUT standby 1 µa ÁÁ RX I S_O_RX Á 1 µa ÁÁ 1 Ω I S_O_1ÁÁ 1.7 ma ÁÁ 1.2 kω I S_O_1k2 ÁÁ 7 ma ÁÁ 33 kω I S_O_33k ÁÁ 17 ma ÁÁ I S_O_ ÁÁ 19 ma Low-noise amplifier Á 3) Supply voltage Á All Pin VS_LNA V S V Á Supply current RX I S ÁÁ 8 9 ma Á Supply current TX (control logic active) Á (LNA and control logic) Á Pin VS_LNA I S Á. ma Á Standby current I Á Á Standby Pin VS_LNA S_ standby 1 1 µa Á Frequency range Á RX f GHz Á Power gain Á RX Pin LNA_IN to ÁÁ Gp Á Á LNA_OUT ÁÁ db Á Noise figure Á RX PSSO2 NF ÁÁ db Á Á N2 NF ÁÁ Rev. A, 2-May-1 (1)

6 T724 Electrical Characteristics (continued) Test conditions (unless otherwise specified): V S = 3. V, T amb = 2 C Á Á Á Input matching Á 4) VSWR ÁÁ RX Pin LNA_IN Á <2:1 2:1 in ÁÁ Output matching Á 4) ÁÁ VSWR RX Pin LNA_OUTÁ <2:1 2:1 Parameter Test Conditions / Pins Symbol Min. Typ. Max. Unit Gain compression RX, O1dB dbm referred to Pin LNA_OUT 3rd-order input interception point RX IIP dbm out Logic input levels (RX_ON, ) High input level = 1 Pins RX_ON and V ih 2.4 V S, LNA V Low input level = V il. V High input current = 1 V ih = 2.4 V I ih 4 6 µa Low input current = I il.2 µa Note: 1) Power amplifier shall be unconditional stable, maximum duty cycle 1%, true cw operation, maximum load mismatch and duration t.b.d. 2) With external matching network, load impedance Ω 3) Low-noise amplifier shall be unconditional stable 4) with external matching components Control Logic for LNA and T/R-Switch Driver Power up 1 Standby RX_ON RX mode 1 TX mode 6 (1) Rev. A, 2-May-1

7 T724 Typical Operating Characteristics 2 2. Gain ( db ) Gain NF NF ( db ) Rel. gain, rel. NF ( db ) NF Gain Frequency ( MHz ) Figure. LNA: Gain and noise figure vs. frequency Temperature ( C ) Figure 8. LNA: NF and gain vs. temperature 2 2 ( dbm ), ( % ) V ramp = 1.7 V P inpa = db 2 1 ( dbm ), ( % ) V ramp = 1.8 V P inpa = db Supply voltage ( V ) Figure 6. PA (PSSO2): Output power and vs. supply voltage Supply voltage ( V ) Figure 9. PA (N2): Output power and vs. supply voltage 2 2 ( dbm ), ( % ) V ramp = 1.7 V P inpa = dbm ( dbm ), ( % ) V ramp = 1.8 V P inpa = dbm Frequency ( MHz ) Figure 7. PA (PSSO2): Output power and vs. frequency Frequency ( MHz ) Figure 1. PA (N2): Output power and vs. frequency Rev. A, 2-May-1 7 (1)

8 T ( dbm ), ( % ) P inpa = dbm ( dbm ), ( % ) P inpa = dbm V ramp ( V ) V ramp ( V ) Figure 11. PA (SSO2): Output power and vs. ramp voltage Figure 14. PA (SSO2): Output power and vs. ramp voltage ( dbm ), ( % ), Gp ( db ) Gain V ramp = 1.7 V P inpa = dbm ( dbm ), ( % ), Gp ( db ) Gain V ramp = 1.8 V P inpa = dbm Input power ( dbm ) Input power ( dbm ) Figure 12. PA (PSSO2): Output power and vs. input power Figure 1. PA (N2): Output power and vs. input power Switch out ( ma ) Supply current ( ma ) R switch ( Ohm ) Temperature ( C ) Figure 13. LNA: Typical switch-out current vs. R switch Figure 16. LNA: Supply current vs. temperature 8 (1) Rev. A, 2-May-1

9 T724 I ( ma ) P in = dbm ( dbm ) P in = dbm C 1 1 4C V ramp ( V ) V ramp ( V ) Figure 17. PA (PSSO2): Current vs. V ramp and temperature Figure 18. PA (PSSO2, N2): P out vs. V ramp and temperature Input / Output Circuits PA_IN Figure 19. Figure 21. RAMP Figure 2. Figure 22. Rev. A, 2-May-1 9 (1)

10 T724 Input / Output Circuits (continued) SWITCH_OUT VS_LNA LNA_IN / R_SWITCH Figure 23. Figure 2. VS_LNA VS_LNA LNA_OUT LNA_IN Figure 24. Figure (1) Rev. A, 2-May-1

11 T724 RX ON 1p LNA OUT PA IN 3.9nH 1p 1n 1u 1p.6nH 3.9p 3p3 HQ 1p 1n 1u 6p PA ramp T R1 is selected with DIL switch R1 Var pin diode replaced by LED on application board 1.8p 6p 1u harm. termination 1p HQ p8 HQ 1nH 1p 1n 1u Blocking capacitors depending on application Switch Out LNA IN VS_LNA V3_PA PA OUT Figure 27. Application board SS2 LNA_OUT PA_IN LNA_SUPPLY 1pF 1pF 3.9nH 3.9pF R.6nH 1pF 1nF 1uF 3.3pF HQ 6pF 1nH 1nF 1uF 1pF 1nF 1uF PA_SUPPLY R DIL Switch 1.8pF LED R 6pF 1uF.8pF HQ 1.pF HQ 2k7 39R R R LNA_IN PA_OUT Figure 28. Layout for SSO2 Rev. A, 2-May-1 11 (1)

12 T724 LNA OUT PA IN 1p 1n 1u 2.2p 1p 1n 1u 1p 3p3 RX ON 1p 1p T harm. termination 6p PA ramp R1 is selected with DIL switch R1 Var pin diode replaced by LED on application board Switch Out 1.8p LNA IN 2p2 6p p8 18nH 1u 1p 1n 1u VS_LNA V3_PA PA OUT Blocking capacitors depending on application Figure 29. Application board N2 LNA_OUT PA_IN R R 1pF 1nF R R 1 F 1pF1nF 1pF R 1 F 3.3pFHQ 2.2pF 1pF 6pF 1pF 18nH HQ.8pF HQ 2.2pF R 1 F 6p HQ 1pF1nF 1.8pF 1 F LED R R 2k7 39R LNA_IN PA_OUT Figure 3. Layout for N2 12 (1) Rev. A, 2-May-1

13 T724 Package Information Package PSSO2 Dimensions in mm Rev. A, 2-May-1 13 (1)

14 T (1) Rev. A, 2-May-1

15 T724 Ozone Depleting Substances Policy Statement It is the policy of Atmel Germany GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (199) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 199 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/4/EEC and 91/69/EEC Annex A, B and C (transitional substances) respectively. Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. 8. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: wm.com Atmel Germany GmbH, P.O.B. 33, D-742 Heilbronn, Germany Telephone: 49 () , Fax number: 49 () Rev. A, 2-May-1 1 (1)