STV6412 AUDIO/VIDEO SWITCH MATRIX FEATURES I 2 C BUS CONTROL. STANDBY MODE WITH INTERRUPT SIGNAL OUTPUT.

Transcription

1 STV642 AUDIO/VIDEO SWITCH MATRI FEATURES I 2 C BUS CONTROL. STANDBY MODE WITH INTERRUPT SIGNAL OUTPUT. VIDEO SECTION 4 CVBS INPUTS, 3 CVBS OUTPUTS (ONE WITH SELECTABLE CHROMA TRAP FILTER). 3 Y/C INPUTS, 2 Y/C OUTPUTS. 6 db GAIN ON ALL CVBS/Y AND C OUTPUTS. INTEGRATED 5Ω BUFFERS. Y/C ADDER. 2 RGB/FB INPUTS, TRI-STATE RGB/FB OUTPUT WITH 6 db ADJUSTABLE GAIN (FROM + 3 db TO + 9 db). VIDEO MUTING ON ALL THE OUTPUTS. 2 SLOW BLANKING INPUTS/OUTPUTS. SYNC BOTTOM CLAMP ON ALL CVBS/Y AND RGB INPUTS, AVERAGE ON C INPUTS. BANDWIDTH: 5 MHZ. CROSSTALK: 5 db min. AUDIO SECTION 4 STEREO INPUTS, 3 STEREO OUTPUTS. MONO SOUND OUTPUT. STEREO TO MONO SOUND CAPABILITY. /6/9 db SELECTABLE GAIN ON ONE STEREO INPUT. FULL RANGE VOLUME CONTROL WITH SOFT CONTROL. AUDIO MUTING ON ALL THE OUTPUTS. TQFP64 (4 x 4 x.4 mm) (Thin Full Plastic Quad Flat Pack) ORDER CODE: STV642D DESCRIPTION The STV642 is a highly integrated I 2 C bus-controlled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full two scart set-top box design. September 999 /26

2 STV642 TABLE OF CONTENTS Page Pin Connections Pin List Block Diagram AppLICATION Block Diagram Absolute Maximum Ratings Thermal Data Latch up Electrical Characteristics I 2 C BUS SELECTION I 2 C BUS Address Input Signals Summary (Write Mode) INPUT/OUTPUT GROUPS Application Note Audio Part Inputs Outputs Video Part Inputs Outputs Bidirectional C_VCR Fast Blanking Slow Blanking I2C Bus Address Write Mode Read Mode ApplicatioN Diagram Package Mechanical Data /26

3 STV642 PIN CONNECTIONS PIN LIST Pin Number Symbol Description V cc +5 V Supply 2 CVBSIN_AU CVBS Input, from Aux 3 DECV Video Decoupling Capacitor 4 Y/CVBSIN_ENC Y/CVBS Input, from Encoder 5 GND Ground 6 YIN_ENC Y Input, from Encoder 7 RIN_AU Audio Right Input, from Aux 8 CIN_ENC Chroma Input, from Encoder 9 LIN_AU Audio Left, Input from Aux R/CIN_ENC Red/Chroma Input, from Encoder RIN_ENC Audio Right, Input from Encoder 2 GIN_ENC Green Input, from Encoder 3 LIN_ENC Audio Left, Input from Encoder 4 BIN_ENC Blue Input, from Encoder 5 NC Not Connected 6 DECA Audio Decoupling Capacitor 7 GND Ground 8 Y/CVBSIN_VCR Y/CVBS Input, from VCR scart 9 LIN_VCR Audio Left, Input from VCR scart 2 RIN_VCR Audio Right, Input from VCR scart 3/26

4 STV642 PIN LIST (continued) Pin Number Symbol Description 2 CVBSIN_TV CVBS Input, from TV scart 22 LIN_TV Audio Left, Input from TV scart 23 RIN_TV Audio Right, Input from TV scart 24 V CCA Audio Supply Voltage - or - Audio Supply Decoupling 25 GNDA Audio Ground 26 NC Not Connected 27 ROUT_CINCH Audio Right Output, to Cinch 28 LOUT_CINCH Audio Left Output, to Cinch 29 ROUT_VCR Audio Right Output, to VCR scart 3 LOUT_VCR Audio Left Output, to VCR scart 3 V CCAO Audio Outputs Supply Voltage - or - Main Audio Supply Voltage 32 ROUT_TV Audio Right Output, to TV scart 33 LOUT_TV Audio Left Output, to TV scart 34 FILTER Chroma Trap Filter 35 AOUT_RF Audio (L+R) Output to RF Modulator 36 VOUT_RF CVBS Video Output to RF Modulator 37 V CCB5 Video Output Buffers Supply Pin 38 BOUT_TV Blue Output, to TV scart 39 V CCB4 Video Output Buffers Supply Pin 4 GOUT_TV Green Output, to TV scart 4 GNDB Video Buffers Ground 42 R/COUT_TV Red/Chroma Output, to TV scart 43 V CCB3 Video Output Buffers Supply Pin 44 Y/CVBSOUT_TV Y/CVBS Output, to TV scart 45 V CCB2 Video Output Buffers Supply Pin 46 COUT_VCR Chroma Output, to VCR scart 47 V CCB Video Output Buffers Supply Pin 48 Y/CVBSOUT_VCR Y/CVBS Output, to VCR scart 49 FBOUT_TV Fast Blanking Output, to TV scart 5 FBIN_VCR Fast Blanking Input, from VCR scart 5 FBIN_ENC Fast Blanking Input, from Encoder 52 C_GATE External MOS Command for C_VCR bidirectional mode 53 V DD +5 V I 2 C Supply 54 ADD I 2 C Address Selection 55 SCL I 2 C Bus Clock 56 SDA I 2 C Bus Data 57 GND Ground Digital 58 IT_OUT Interrupt Output 59 SLB_TV Slow Blanking Input/Output, from TV scart 6 R/CIN_VCR Red Input (or C Input), from VCR scart 6 SLB_VCR Slow Blanking Input/Output, from VCR scart 62 GIN_VCR Green Input, from VCR scart 63 V CC2 +2 V Supply 64 BIN_VCR Blue Input, from VCR scart 4/26

5 STV642 BLOCK DIAGRAM 5/26

6 STV642 APPLICATION BLOCK DIAGRAM SCART TV R/C G B FAST BLANK CVBS AUDIO L AUDIO R CVBS/Y AUDIO L AUDIO R SLOW BLANK STV642 R, G, B, FB SWITCHES CVBS/Y SWITCHES AUDIO L AUDIO R R/C G B FAST BLANK CVBS/Y C AUDIO L AUDIO R Y CINCH OUTPUT ENCODER RF MOD AU MICRO CVBS AUDIO L+R CVBS AUDIO L AUDIO R INTERRUPT CHROMA SWITCHES AUDIO SWITCHES SLOW BLANK, I/O CONTROL R/C G B FAST BLANK CVBS/Y AUDIO L AUDIO R CVBS/Y C AUDIO L AUDIO R SLOW BLANK SCART2 VCR ABSOLUTE MAIMUM RATINGS Symbol Parameter Value Units V cc2 Supply voltage for: Slow blanking sections 3.2 V V CCAO Audio drivers 3.2 V V CCA Audio internal parts Digital V V DD Digital Parts 6 V V cc, V CCBi Video Sections 6 V V I Voltage at Pin i to GND - audio pins, V CCA V - video pins, V CC or V CCBi V - bus pins, 5.5 V - slow blanking pins, V CC2 V V ESD Maximum ESD voltage allowed. pf capacitor discharged through.5 kω serial resistor (Human Body Model) ±4 kv T oper Operating Ambient Temperature, +7 C T stg Storage Temperature -2, +5 C THERMAL DATA Symbol Parameter Value Units R th(j-a) Junction-ambient Thermal Resistance Max. 48 C/W LATCH UP At an ambiant temperature of 25 C, all pins meet the following specification: I trigger 2 ma or I trigger -2 ma. Pin 58 (IT_OUT) does not meet this specification and the trigger current must be limited to - ma. 6/26

7 STV642 ELECTRICAL CHARACTERISTICS T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units V DD Digital Supply Voltage V V CCAO Audio Operating Supply Voltage ACTIVE (all channels ON) I DD Digital Supply Current V DD = 5 V 4.5 ma I CCA Audio Supply Current V CCAO = 2 V, no load 9 5 ma I CCV Total Video Supply Current V CC = 5 V, no load 43 6 ma (V CC +V CCB +V CCB2 +V CCB3 +V CCB4 +V CCB5 ) STANDBY (all channels OFF) - Decoupling capacitor on V CCA - Connected to V CCA V CC Video Operating Supply Voltage V V CC2 Slow Blanking Control Supply Voltage V I CC2 2 V Supply Current V CC2 = 2 V SLB input mode SLB output mode, no load I DD Digital Supply Current V DD = 5 V 4.5 ma I CCAstd Audio Supply Current V CCA = 2 V, no load.5 ma I CCVstd Total Video Supply Current V CC = 5 V ma V V ma 7/26

8 STV642 ELECTRICAL CHARACTERISTICS (continued) T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units AUDIO SECTION SVR Supply Voltage Rejection V RIPPLE = 5m V RMS at f = Hz, Gain= db, DECA filter cap = 47 µf DECA filter cap = 22 µf db db SVRK Supply Voltage Rejection V RIPPLE = 5m V RMS at f = khz, Gain = db 7 8 db V INDC Input DC Level V CCA = 9V V CCA/2 V V INAC Input signal amplitude 2 V RMS R IN Input Resistance 3 5 kω R INmatch Input resistance matching ±2 ± % F RANGE Bandwidth -3 db,.5 V RMS, R LOAD = kω, Gain = db Flatness Spread of gain in audio band -.5 V RMS, 2 Hz to 2 khz, Gain = db CS Channel Separation, from audio inputs Between L & R of TV outputs V IN =.5V RMS, f = khz, on one input, R LOAD = kω, Gain = db 5 khz.5 db 8 9 db 7 74 db Ci Channel Isolation from video inputs V IN = V pp, f = 5 khz, on one point 85 db V OUT Output DC Level V CCA = 9 V V CCA/2 V V OFF DC Offset change Switching between inputs ±5 mv R OUT Output Resistance 6 2 Ω PHD Phase Difference f = khz, V RMS input on each input channel 3 deg. ASN S/N Ratio f = khz, V RMS input (gain = db) weighted CCIR quasi peak 7 db eni Equivalent RMS Input Voltage Noise BW = 2 Hz, 2 khz Flat, Gain = db 5 µv G db Gain.5 V RMS, R LOAD = kω, Gain = db db G STEP Gain Step -62 db to +6 db ( see Figure 2) 2 db G MATCH G MATCH2 Gain matching between different inputs of one output Gain matching between Left/Right outputs of one input channel V IN =.5 V RMS, khz, Gain = db db V IN =.5 V RMS, khz, Gain = db db Total Harmonic Distortion THD THD6 THD9 ENC Input at db ENC Input at 6 db ENC Input at 9 db V OUT =.5 V RMS, khz, 8 khz % % % V CL Output Clipping Level THD =.2%, khz V RMS R L Output Load Resistance V IN = V RMS, THD =.3%, Gain = db kω Mute Mute Suppression V IN =.5 V RMS, on one point -9 db 8/26

9 STV642 ELECTRICAL CHARACTERISTICS (continued) T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units VIDEO SECTION V DCIN DC Input Level Bottom Synch Pulse 2 V I CLAMP Clamping Current at V DCIN -4 mv 2 ma I LEAK Input Leakage Current V IN = V DCIN + V µa C IN Input Capacitance 2 pf V IN Max Input Signal V CC = 5 V.5 V PP DYN Dynamic Output Signal V CC = 5 V 3 V PP BW Bandwidth at -3 db Y/CVBS RGB Y/C Mixer (on VOUT-RF) V IN = V PP V IN = V PP V IN = V PP, V INC = muted MHz MHz MHz Flatness Spread of Gain in Video Band (5 khz - 5 MHz) Y/CVBS RGB Y/C Mixer (on VOUT-RF) V IN = V PP V IN = V PP V IN = V PP, V INC = muted +/-.5 +/-.5 +/-.5 db db db CTi Crosstalk Isolation between Input Channel V IN = V PP at f = 4.43 MHz, on one point 6 db CTo Crosstalk Isolation between Output Channel V IN = V PP at f = 4.43 MHz, on one point, R LOAD = 5Ω 5 db R OUT Output Resistance 5 Ω G RGB Gain at RGB outputs V IN = V pp, gain set to 6 db db G RGBM Gain matching between R, G, B V IN = V PP, gain set to 6 db db G RGBSTEP Step of Gain 3 db to 6 db db G YCVBS Gain on Y,/CVBS channels V IN = V PP db G YCVBSM Gain matching between Y, CVBS V IN = V PP db inputs DC OUT DC Output Voltage Bottom sync pulse.6 V DC OUT RF RF Output Voltage Bottom sync pulse V DPHI Differential Phase V IN = V PP at f = 4.43 MHz 5 deg. DG Differential Gain V IN = V PP at f = 4.43 MHz 5 % Mute Mute Suppression V IN = V PP at f = 5 MHz on one db -55 point LNL Luminance non-linerarity.3 3 % VSN Video S/N Ratio Refer to Note 65 db Note: S/N = 2 log (V OUT Black to White =.7 V PP / V Noise (mv RMS ) weighted CCIR 567). 9/26

10 STV642 ELECTRICAL CHARACTERISTICS (continued) T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units CHROMA SECTION V DCIN DC Input Level 3 V R IN Input Resistance 3 5 kω C IN Input Capacitance 2 pf V IN Max Input Signal.5 V PP DYN Dynamic Output Signal 3 V PP DC OUT DC Output VCR Voltage 2.2 V CBW Chroma Bandwidth C IN = V PP at -3 db CTi CTo Crosstalk Isolation between Input Channel Crosstalk Isolation between Output Channel V IN = V PP at f = 4.43 MHz, on one input V IN = V PP at f = 4.43 MHz, on one input, R LOAD = 5 Ω MHz 55 db 5 db R OUT Output Resistance 5 Ω G OUTC Gain at OUTC V IN = V pp db G CM Gain matching between C inputs V IN = V PP db Mute Mute Suppression V IN = V PP at f = 4.43 MHz, on one input CToYdel Chroma to luma delay, source Y/C Pin other than VOUT_RF, V 4.43 MHz, -55 db 2 ns CToYdel Chroma to luma delay, source Y/C Pin VOUT_RF 2 ns /26

11 STV642 ELECTRICAL CHARACTERISTICS (continued) T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units SLOW BLANKING SECTION INPUT (Input mode V DD = 5 V ±%) SLBlow Input Low Level Threshold V SLBhigh Input High Level Threshold V I IN Input Current 5 µa OUTPUT (Output mode V CC2 = 2 V ±%, V DD = 5 V ±%, R LOAD > kω,) SLBlow Output Low Level (int. TV).2.5 V SLBmed Output Medium Level (ext. 6/9) V SLBhigh Output High Level (ext. 4/3) 2 V FAST BLANKING SECTION INPUT (Input mode V DD = 5 V ±%) FBlow/high Input Low/High Level Threshold V I IN Input Current 2 µa OUTPUT (Output mode V DD = 5 V ±%) R LOAD = 5Ω FB LOW Output Low Level.5 V FB HIGH Output High Level V FB DEL Fast Blanking RGB delay At 5% on digital RGB transients, at 2 V on FB rise transient, at V on FB fall, C LOAD = pf maximum 5 ns FB TRANS Fast Blanking Transitions at FB output Rise Time Fall Time C LOAD = pf maximum between % and 9% between 9% and % ns ns C_GATE FUNCTION OUTPUT C_GATE-H Pull-up Resistor Value to V CCB 2 kω C_GATE-L Output Low Level I IN = ma I IN = ma INTERRUPT OUTPUT (refer to the below Note).3.7 V V IT-Leak High Level Leakage External pull-up to 5 V µa IT-Low Output Low Level (Active) I IN = ma I IN = ma ADDRESS SELECTION INPUT ADDsel_L Address Selection Low Level.2 V ADDsel_H Address Selection High Level 2.5 V DD V I LEAK Leakage Current µa.3.7 V V Note: The interrupt is forced to a low level when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. And, it is released by reading the I 2 C bus register. /26

12 STV642 ELECTRICAL CHARACTERISTICS (continued) T amb = 25 C, V CCAO = 2 V, V CC = 5 V, V CC2 = 2 V, V DD = 5 V R GA = 6Ω, R LOUTA = kω, R GV = 5Ω, R LOUTV = 5Ω, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Units I 2 C BUS CHARACTERISTICS SCL V IL Low Level Input Voltage V V IH High Level Input Voltage V I LI Input Leakage Current V IN = to 5.5 V - µa SDA V IL Low Level Input Voltage V V IH High Level Input Voltage V I LI Input Leakage Current V IN = to 5.5 V - µa C I Input Capacitance pf t R Input Rise Time.5 V to 3 V µs t F Input Fall Time.5 V to 3 V 3 ns V OL Low Level Output Voltage I OL = 3 ma.4 V t F Output Fall Time 3 V to.5 V 25 ns C L Load Capacitance 4 pf TIMING t LOW Clock Low Period 4.7 µs t HIGH Clock High Period 4 µs t SU,DAT Data Setup Time 25 ns t HD,DAT Data Hold Time 34 ns t SU,STO Setup Time from Clock High to Stop 4 µs t BUF Start Setup Time following a Stop 4.7 µs t HD,STA Start Hold Time 4 µs t SU,STA Start Setup Time following Clock Low to High Transition 4.7 µs Note: The device can also operate at 4 khz. Figure : I 2 C Bus Timing (start, stop) 2/26

13 STV642 I 2 C BUS SELECTION Data transfers follow the usual I 2 C format: after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit which is a data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC s I 2 C bus decoder permits the automatic incrementation mode in write mode. String Format Write only mode (S = start condition, P = stop condition, A = acknowledge) S SLAVE ADDRESS A SUB-ADDRESS A DATA A P Read only mode S SLAVE ADDRESS A DATA A P Slave Address Address A6 A5 A4 A3 A2 A A Value Auto Increment Mode S SLAVE ADDRESS A SUB-ADDRESS A DATA A DATA A... DATAn A P I 2 C BUS ADDRESS Sub-Address Sub-Address + Sub-Address + N Write Address: Read Address: Address Selection Pin Grounded: =, write address = 94 HE, read address = 95 HE Address Selection Pin to Supply: =, write address = 96 HE, read address = 97 HE INPUT SIGNALS SUMMARY (WRITE MODE) Reg. Addr. (Hex) Data d7 d6 d5 d4 d3 d2 d d AUDIO TV Stereo Mono VCR Stereo Mono TV /6 db TV Volume-62 db to db - 2 db steps Soft Volume Mode Not Used VCR Audio Switch Control CINCH Audio Gain TV/CINCH Audio Switch Control VIDEO 2 VCR Chroma muted MISCELLANEOUS VCR Video and Chroma Switch Control TV Chroma muted TV Video and Chroma Switch Control 3 RGB Tri-state RGB Gain RGB Switch Control Fast Blanking Mode/Input Selection 4 IT Enable SLB Mode Not Used VCR-C Output Control VCR-C Gate Control RF Trap Filter Control 5 VCR Slow Blanking TV Slow Blanking ENC Audio Input Gain /6/9 db RF Adder Control VCR R/C sub Clamp TV R or C Output Selection ENC R/C sub Clamp STB-BY 6 RF Outputs TV Outputs CINCH Outputs Not used data must be put to. VCR Outputrs AU Inputs TV Inputs VCR Inputs ENC Inputs 3/26

14 STV642 I 2 C BUS SELECTION (continued) Input Signals (Write Mode) Data Byte TV Audio Output Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments Soft Volume Change Active Disabled Level Adjustment 5 db -62 db (-2 db/step) 6 db Extra Gain db +6 db Stereo or Mono Mode = Stereo = Mono Audio Selection & VCR Audio Output Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments TV & CINCH Audio Output Selection 3 Muted Encoder L/R selected VCR L/R selected AU L/R selected TV L/R selected Not allowed Not allowed Not allowed CINCH Audio Gain db Follow TV Gain VCR Audio Output Selection 2 Muted Encoder L/R selected TV L/R selected AU L/R selected VCR Stereo or Mono Mode = Stereo = Mono 4/26

15 STV642 5/26 I 2 C BUS SELECTION (continued) TV & VCR Video Selection RGB & Fast Blanking Outputs Reg. Addr. (Hex) Description Bits Data Comments d7 d6 d5 d4 d3 d2 d d 2 TV Video Output Selection 3 Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR CVBS_AU & Chroma muted Not allowed Not allowed Not allowed TV Chroma Output Control Chroma defined by d2dd Chroma force to mute VCR Video Output Selection 3 Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & Chroma muted CVBS_AU & Chroma muted Not allowed Not allowed Not allowed VCR Chroma Output Control Chroma defined by d6d5d4 Chroma force to mute Reg. Addr. (Hex) Description Bits Data Comments d7 d6 d5 d4 d3 d2 d d 3 Fast Blanking Control 2 FB forced to low level FB forced to high level FB from Encoder FB from VCR RGB Selection 2 Muted RGB_ENC selected RGB_VCR selected Not allowed RGB Gain 2 +6 db gain +5 db gain +4 db gain +3 db gain + db extra gain +3 db for weak input signals RGB Control RGB outputs high imp state RGB outputs active

16 STV642 I 2 C BUS SELECTION (continued) RF & Miscellaneous Control Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments 4 R/C TV Output Selection Red signal selected Chroma signal selected RF Output: adder control and chroma sub-carrier filter selection 2 CVBS to RF output Y + C to RF output Filter not active Filter active C_Gate Output Control High level Low level C_VCR Output Control Tri-state mode (high impedance) Active Slow Blanking Mode Normal Mode SLB TV is driven by SLB VCR IT Enable No interrupt flag IT enable Slow Blanking & Inputs Control Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments 5 Encoder R/Csub Clamp Bottom level clamp Average level clamp VCR R/Csub Clamp Bottom level clamp Average level clamp Encoder Input Level Adjustment 2 db for normal audio inputs +6 db for weak audio inputs +9 db for weak audio inputs Slow Blanking TV SCART 2 Input mode only Output <2 V Output 6/9 format Output 4/3 format Slow Blanking VCR SCART 2 Input mode only Output <2 V Output 6/9 format Output 4/3 format 6/26

17 STV642 I 2 C BUS SELECTION (continued) Standby Modes Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments 6 ENC Inputs VCR Inputs TV Inputs AU Inputs VCR Outputs CINCH Outputs TV Outputs RFmod Outputs Output Signals (Read Mode) Data Byte Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Full Stop Only I2 C bus and slow blanking detection parts are supplied. Reg. Addr. (Hex) Description Bits Data d7 d6 d5 d4 d3 d2 d d Comments Slow Blanking TV SCART 2 Input <2 V Input 6/9 format Input 4/3 format Slow Blanking VCR SCART 2 Input <2 V Input 6/9 format Input 4/3 format Interrupt Flag No change since read One change has been detected (refer to the below Note) Note: The Interrupt Flag will be cleared by reading this register. To prepare for a new interrupt, a must be re-written to the IT Enable bit (Reg. 4, d7). 7/26

18 STV642 I 2 C BUS SELECTION (continued) Power-on Reset Bus Register Initial Conditions Power-on Reset is active when the supply V DD is below 3.5 volts. Non significant bits () are preset to. Reg. Addr. (Hex) Data d7 d6 d5 d4 d3 d2 d d Comments Audio TV and Cinch outputs are in Stereo Mode, db Gain Adjustment. TV, Cinch and VCR audio outputs are muted. VCR output is in Stereo Mode. 2 VCR, TV and RFmod video outputs are muted. 3 Fast Blanking is forced to. RGB outputs are muted and in high impedance. 4 C_GATE is high. C_VCR is high impedance. 5 Encoder and VCR R/Csub Bottom Level Clamp, RGB outputs 6 db Gain, and Slow Blanking parts are in read mode. 6 All internal blocks are ON. Figure 2: Volum Control Characteristic Figure 2: Volum control characteristic +/-.5dB 8 3 Step Number -36 +/-.5dB -62 db + 2dB -.5dB 8/26

19 STV642 INPUT/OUTPUT GROUPS Figure 3: V CC 5V Bottom Clamped Video Inputs (Pins 2, 4, 6, 2, 4, 8, 2, 62, 64) V CC 5V Figure 6: Average Clamped Video Inputs (Pin8) V CC 5V V CC 5V I B 2V + V D 25 kω 25 kω 3V 5 kω tri tri Figure 4: R/C Clamped Video Inputs (Pins, 6) Figure 7: Cgate Logical Output (Pin 52) V CC 5V V CC 5V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. 8 kω 5 ohms Figure 5: Fast Blanking Inputs (Pins 5, 5) V CC 5V Figure 8: Fast Blanking Output (Pin 49) V CC 5V V CC 5V tri 9/26

20 STV642 INPUT/OUTPUT GROUPS (continued) Figure 9: Video Outputs (Pins 38, 4, 42, 44, 46, 48) Figure 2: Trap Filter (Pin 34) V CC 5V V CC 5 V V CC 5V V CC 5V kω Ω ib Figure : Audio Inputs (Pins 7, 9, 3, 9, 2, 22, 23) V CCA 9V Figure 3: Audio Outputs (Pins 27, 28, 29, 3, 32, 33,35) V CCAO I2 V 5 kω V CC /2 6 Ω I B Figure : Slow Blanking I/O (Pins 59, 6) V CC 2 V Figure 4: Interrupt Output (Pin 58) V CC 2 V V DD 5V float kω 25 kω kω 4 Ω 5V 55 kω 2/26

21 STV642 INPUT/OUTPUT GROUPS (continued) Figure 5: I 2 C Bus (SDA) (Pin 56) Figure 6: I 2 C Bus (ADD) (Pin 54) V DD 5V float V DD 5V float Acknowledge 5V kω 5V kω Figure 7: I 2 C Bus (SCL) (Pin 55) V DD 5V float kω Figure 8: Power Supply Connections V CC B V CC B2 V CC B3 V CC B4 V CC B5 V CC A V CC A V CC V CC 2 V DD V V 2 V 5V 4 GNDP GNDA GNDref GNDV GDD These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 2/26

22 STV642 APPLICATION NOTE - Audio Part. - Inputs The audio inputs are designed to follow sources of up to (at least) 2 V R MS (that is around 6 V PP ) with an expected DC level of V CC /2(4.5 typ.). That is why the device is providing this DC polarization. This means, that in most cases, the inputs are AC coupled via chemical capacitors. The recommended values are µf, 2.2 µf or 4.7 µf (internal polarization is made via a 5 kω resistor). It should be noted that, the internal polarization is filtered by an external capacitor (or Pin called DECA ). This capacitor contributes to a good performance of the device. Its value should be 47 µf or more. Figure 9: Audio Inputs L/R Audio 22Ω 4.7µF Audio In 2 - Video Part 2. - Inputs Video inputs need to be AC coupled. But only some small capacitor values are requested due to the internal clamps provided by these values. Usually some nf HF capacitors (47 nf to 22 nf) are enough to provide good performance on Y, CVBS, RGB and C inputs. Chrominance inputs: average clamp this means that the DC is measured as the average value of the input signal and set to an internal reference (close to 3 V). The dynamic allowed is more than.5 V. RGB, Y, CVBS inputs: bottom sync top clamp this means that the DC level is measured at the lowest value of the input signal and set to an internal reference (close to 2 V). The dynamic allowed is more than.5 V. Figure 2: Video Inputs 62Ω STV 642 Y/C/CVBS/RGB 22Ω nf Video In Note:In some particular cases (loopback from outputs to inputs) the AC coupling capacitor can be removed. However, some small offsets in the audio chain can cause some noise while switching from input to another. 75Ω STV Outputs Audio output buffers are able to provide more than 2. V RMS (around 6 V PP ) on a typical load of kω (in fact a 2 kω load is acceptable). For best dynamic performance, the DC level is once again V CC /2. Usually some AC coupling capacitors are used at the outputs. To drive some typical kω loads, it is normal to use capacitors with a value 5 to times the value of the input capacitors. This gives a value between 4.7 µf and 47 µf. Moreover, it can be a good idea to insert resistors (22Ω or 47Ω) in series with the audio outputs. This will provide a protection for the output stages. No external drivers or buffers are needed in a typical use of the device. Figure 2: Audio Outputs Audio Out 4.7 µf 47Ω L/R Audio Outputs There are eight video internal buffers (video outputs, plus RF modulator drive, and TV Fast Blanking). And these outputs, source enough current to drive 5Ω with 3 V PP signals. The only requirement is for an external network made of DC coupled resistors. One is located on the board, while the other one is the load. The total value is typically 5Ω, but can be increased in some specific uses. Figure 22: Video Out STV 642 Video (and Fast Blanking) Outputs 75Ω Video External load 75Ω STV /26

23 STV642 APPLICATION NOTE (continued) Bidirectional C_VCR Here is an easy way to manage bidirectional C capability on the VCR scart. If you do not need to output C, just connect the R/C input as described in Section 2. - Inputs on page 22. Figure 23: C Out C Gate R/C In STV 642 R/C_VCR Input/Output 75Ω nf 22Ω R/C Fast Blanking A Fast Blanking signal is used to make an equipment consider its RGB inputs for full-screen display or fast insertion (OSD, etc.). The output of such a signal is exactly managed in the same way as RGB (which is important for levels and displays). The input is DC coupled (insert a few one hundred ohms resistors for external input) Slow Blanking A Slow Blanking signal is used to make an equipment consider an external input (e.g. CVBS and SOUND). The input/output of such a signal is very simple, DC coupled (insert a few one hundred ohms resistors for external I/O). You will notice that this function is requesting for a 2 V power supply (on Pin V CC 2). This pin can be left open (not pulled down) if this function is not used. There are several ways to manage slow blanking signals: One simple method is to scan the slow blanking input states and to react in case of change. Another method is to use an Interrupt signal (open drain pin IT) that indicates any change. This mode avoids permanent scanning of the read register and allows for the microprocessor to enter in sleep mode when the box is not used. At last, the slow blanking I/O may be configured to run in stand-alone mode. In this case, the TV slow blanking I/O must be set to output mode and the VCR pin to input mode. And then, the TV output is simply following the VCR slow blanking input state. There is no need for the microprocessor anymore. But internal inputs, switches and outputs must stay active and correctly configured. 3 - I 2 C Bus 3. - Address You can choose the address of the device by setting the pin ADD to ground or to V DD. The former selects 94h and the latter selects 96h. These values correspond to the writeable (or control) registers. Change the lowest bits to (this gives 95h and 97h) to read the readable register of the device. One device will answer (acknowledge) to its both addresses 94h and 95h or 96h and 97h Write Mode This mode is used to control the device, to select switch positions, gains, etc. Send a start condition, the address of the device, the address of the register (its number), and the data to put in it. At this point, you can send a stop or send the data of the following registers (that is what we call auto-increment) Read Mode This mode is used to read some data such as slow blanking input signals. Send a start condition, the address of the device (+), then send one byte clock to read the data register, and then send a stop condition. Note: To read some changing data requires some special care. In some cases (e.g. long time between reads or critical application), it is advised to confirm each changed value by reading it twice. Note: Do not forget ESD protections for I/O plug signals. 23/26

24 STV642 APPLICATION DIAGRAM Modulator 4.43MHz Trap 24/26

25 STV642 PACKAGE MECHANICAL DATA 64 Pins Thin Full Plastic Quad Flat Pack (TQFP) e A, mm.4 inch SEATING PLANE A A2 E3 E E B D3 32 D D c L L K,25 mm. inch GAGE PLANE Millimeters Inches Dimensions Min. Typ. Max. Min. Typ. Max. A.6.63 A A B C D D D e.8.35 E E E L L..39 K (Min.), 7 (Max.) 25/26

26 STV642 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics. 999 STMicroelectronics - All Rights Reserved Purchase of I 2 C Components of STMicroelectronics, conveys a license under the Philips I 2 C Patent. Rights to use these components in a I 2 C system, is granted provided that the system conforms to the I 2 C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 26/26 26