1 Watt High Linearity, High Gain InGaP HBT Amplifier. Product Description

Transcription

1 Product Features MHz 24.7 db Gain +3 dbm P1dB +46 dbm Output IP3 +V Single Positive Supply Internal Active Bias Lead-free/ RoHS-compliant SOIC-8 & 4xmm DFN Package Applications Mobile Infrastructure WiBro Infrastructure TD-SCDMA Product Description The is a high dynamic range two-stage driver amplifier in a low-cost surface mount package. The InGaP/GaAs HBT is able to achieve superior performance for various narrowband-tuned application circuits with up to +46 dbm OIP3 and +3 dbm of compressed 1-dB power. The amplifier is available in an industry-standard SMT lead-free/ RoHS-compliant SOIC-8 or 4xmm DFN package. All devices are 1% RF and DC tested. The product is targeted for use as linear driver amplifier for various current and next generation wireless technologies such as GPRS, GSM, CDMA, W-CDMA, TD-SCDMA, and WiBro, where high linearity and high power is required. The internal active bias allows the to maintain high linearity over temperature and operate directly off a + V supply. Functional Diagram Vcc1 Vbias1 RF In Vbias N/C Vcc2 / RF Out Vcc2 / RF Out N/C -S8G Vbias Vcc1 N/C 2 11 N/C RF In 3 1 Vcc2 / RF Out N/C 4 9 Vcc2 / RF Out N/C 8 N/C Vbias2 6 7 N/C -EG Specifications (1) Parameters Units Min Typ Max Operational Bandwidth MHz Test Frequency MHz 214 Gain db Input Return Loss db Output Return Loss db 9 Output P1dB dbm Output IP3 (2) dbm Noise Figure db 6. W-CDMA Channel - dbc ACLR dbm +21 Operating Current Range, Icc ma 34 4 Stage 1 Amp Current, Icc1 ma 8 Stage 2 Amp Current, Icc2 ma 31 Device Voltage, Vcc V Typical Performance (1) Parameters Units Typical Frequency MHz Gain (3) db Input Return Loss db 12. Output Return Loss db 1 9 Output P1dB (3) dbm Output IP3 dbm IS-9A Channel - dbc ACPR dbm +23. W-CDMA Channel - dbc ACLR dbm +21 Noise Figure db. 6. Supply Bias + 4 ma 3. The performance is shown for the -S8G (SOIC-8 package) at ºC. The -EG in a 4x mm DFN package offers approximately.db more gain and. db higher P1dB. 1. Test conditions unless otherwise noted: ºC, +V, in tuned application circuit. 2. 3OIP measured with two tones at an output power of +1 dbm/tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule. Absolute Maximum Rating Parameter Rating Storage Temperature -6 to +1 C RF Input Power (continuous) + dbm Device Voltage +7 V Device Current 9 ma Device Power W Thermal Resistance, Rth 33 C/W Junction Temperature +2 C Operation of this device above any of these parameters may cause permanent damage. Ordering Information Part No. -S8G -EG -S8PCB196 -S8PCB214 -EPCB196 -EPCB214 Description 1 Watt, High Gain InGaP HBT Amplifier (lead-free/ RoHS-compliant SOIC-8 package) 1 Watt, High Gain InGaP HBT Amplifier (lead-free/ RoHS-compliant 12-pin 4xmm DFN package) 196 MHz Evaluation Board 214 MHz Evaluation Board 196 MHz Evaluation Board 214 MHz Evaluation Board Standard tape / reel size = pieces for SOIC-8 package on a 7 reel Standard tape / reel size = 1 pieces for DFN package on a 7 reel. TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 1 of 12 July 21

2 Typical Device Data (SOIC-8) S-Parameters (V CC = + V, I CC = 4 ma, T = C, calibrated to device leads) Gain (db) 3 2 Gain DB( S(2,1) ) S Swp Max 3GHz S Swp Max 3GHz Frequency (GHz) -.4 S(1,1) Swp Min.1GHz -.4 S(2,2) Swp Min.1GHz Notes: The gain for the unmatched device in -ohm system is shown as the trace in blue color. For a band specific tuned circuit, it is expected that actual gain will be higher. The impedance plots are shown from 3 MHz, with markers placed at. 3. GHz in. GHz increment. S-Parameters for -S8G (V CC = + V, I CC = 4 ma, T = C, unmatched ohm system, calibrated to device leads) Freq (MHz) S11 (ang) S21 (ang) S12 (db) S12 (ang) S22 (ang) Device S-parameters are available for download from the website at: Application Circuit PC Board Layout Circuit Board Material:.14 FR4, four layer, 1 oz copper, Microstrip line details: width =., spacing =. The silk screen markers A, B, C, etc. and 1, 2, 3, etc. are used as placemarkers for the input and output tuning shunt capacitor C7. The markers and vias are spaced in. increments. TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 2 of 12 July 21

3 -S8 18 MHz Reference Design Typical RF Performance at C Gain (db).4.1 Input Return Loss (db) Output Return Loss (db) Output P1dB (dbm) Output IP3 (dbm) (+1 dbm / tone, 1 MHz spacing) Noise Figure (db) Device / Supply Voltage + V 4 ma DNP 2.7 pf 2 Notes: 1. C7 is placed at silkscreen marker 2 and 3 on tqs evalboard 1 deg at 1.8 GHz away from pins 6 and All passive components are of size 63 unless otherwise noted C -4 C +8 C C -4 C +8 C C -4 C +8 C OIP3 vs. Frequency + C, +1 dbm/tone TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 3 of 12 July 21

4 Typical RF Performance at C Frequency 196 MHz Gain 24.6 db Input Return Loss 12. db Output Return Loss 1 db Output P1dB +3 dbm Output IP3 (+1 dbm / tone, 1 MHz spacing) +48 dbm Channel Power (@- dbc ACPR, IS-9, 9 channels fwd) 23 dbm Noise Figure. db Device / Supply Voltage + V 4 ma 196 MHz Application Circuit (-S8PCB196) DNP 2.7 pf 2 Notes: 1. C7 is placed at silkscreen marker 2 and 3 on tqs evalboard deg at 1.96 GHz away from pins 6 and All passive components are of size 63 unless otherwise noted. + C -4 C +8 C C -4 C +8 C OIP3 vs. Frequency + C, +1 dbm/tone OIP3 vs. Temperature freq. = 196 MHz, 1961 MHz, +1 dbm/tone C -4 C +8 C OIP3 vs. Output Power freq. = 196 MHz, 1961 MHz, + C P1dB (dbm) P1dB vs. Frequency Circuit boards are optimized at 196 MHz -4 C + C +8 C NF (db) Temperature ( C) Noise Figure vs. Frequency 3-4 C + C +8 C ACPR (dbc) Output Power (dbm) ACPR vs. Channel Power IS-9, 9 Ch. Fwd, ±88 khz offset, 3 khz Meas BW, 196 MHz C + C +8 C Output Channel Power (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 4 of 12 July 21

5 -S8 21 MHz Reference Design for TD-SCDMA Applications Typical RF Performance at C 21 2 Gain (db) Input Return Loss (db) Output Return Loss (db) 9. 9 Output P1dB (dbm) Output IP3 (dbm) (+1 dbm / tone, 1 MHz spacing) Channel Power (dbm) (@- dbc ACPR, IS-9, 9 channels fwd) Noise Figure (db) 6 6 Device / Supply Voltage + V 4 ma DNP 2.7 pf 2 Note: 1. C7 is placed at silkscreen marker 2 and 3 on tqs evalboard deg at 2.1 GHz away from pins 6 and All passive components are of size 63 unless otherwise noted. + C -4 C +8 C C -4 C +8 C OIP3 vs. Frequency ACPR vs. Channel Power + C, +1 dbm/tone IS-9, 9 Ch. Fwd, ±88 khz offset, 3 khz Meas BW, 21 MHz C -4 C +8 C ACPR (dbc) Output Channel Power (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page of 12 July 21

6 214 MHz Application Circuit (-S8PCB214) Typical RF Performance at C Frequency 214 MHz Gain 24.7 db Input Return Loss db Output Return Loss 9 db Output P1dB +29. dbm Output IP3 (+1 dbm / tone, 1 MHz spacing) +46 dbm Channel Power (@- dbc ACLR, W-CDMA, TM64 DPCH) +21 dbm Noise Figure 6 db Device / Supply Voltage + V 4 ma DNP 2.4 pf Notes: 1. C7 is placed at silkscreen marker 2 on tqs evalboard deg at 2.14 GHz away from pins 6 and 7. DNP C3. 2. All passive components are of size 63 unless otherwise noted C -4 C +8 C C -4 C +8 C C -4 C +8 C OIP3 vs. Frequency + C, +1 dbm/tone OIP3 vs. Temperature freq. = 214 MHz, 2141 MHz, +1 dbm/tone OIP3 vs. Output Power freq. = 214 MHz, 2141 MHz, + C P1dB vs. Frequency Circuit boards are optimized at 214 MHz Temperature ( C) Noise Figure vs. Frequency Output Power (dbm) ACLR vs. Channel Power 3GPP W-CDMA, Test Model 1+64 DPCH, ± MHz offset, 214 MHz -4 P1dB (dbm) 29-4 C + C +8 C NF (db) C + C +8 C ACLR (dbc) - -4 C + C +8 C Output Channel Power (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 6 of 12 July 21

7 -S8 2 MHz Reference Design for WiBro Applications Typical RF Performance at C Gain (db) Input Return Loss (db) Output Return Loss (db) Output P1dB (dbm) Output IP3 (dbm) (+1 dbm / tone, 1 MHz spacing) Device / Supply Voltage + V 4 ma DNP 2.2 pf Notes: 1. C7 is placed at the silkscreen marker 1 on tqs evalboard 4.2 degrees at 2. GHz away from pin 6 and 7. C3 is placed at silkscreen marker A or@ 4.2 degrees at 2. GHz away from pin All passive components are of size 63 unless otherwise noted OIP3 vs. Frequency + C, +1 dbm/tone 31 P1dB vs. Frequency 4 P1dB (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 7 of 12 July 21

8 Typical Device Data (DFN 4x mm) S-Parameters (V CC = + V, I CC = 4 ma, T = C, calibrated to device leads) Gain (db) 3 2 Gain DB( S(2,1) ) S Swp Max 3GHz S Swp Max 3GHz Frequency (GHz) -.4 S(1,1) Swp Min.1GHz -.4 S(2,2) Swp Min.1GHz Notes: The gain for the unmatched device in ohm system is shown as the trace in blue color. For a band specific tuned circuit, it is expected that actual gain will be higher. The impedance plots are shown from 3 MHz, with markers placed at. 3. GHz in. GHz increment. S-Parameters for -EG (V CC = + V, I CC = 4 ma, T = C, unmatched ohm system, calibrated to device leads) Freq (MHz) S11 (ang) S21 (ang) S12 (db) S12 (ang) S22 (ang) Device S-parameters are available for download from the website at: Application Circuit PC Board Layout Circuit Board Material:.14 FR4, four layer, 1 oz copper, Microstrip line details: width =., spacing =. The silk screen markers A, B, C, etc. and 1, 2, 3, etc. are used as placemarkers for the input and output tuning shunt capacitor C7. The markers and vias are spaced in. increments. TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 8 of 12 July 21

9 Typical RF Performance at C Frequency 196 MHz Gain db Input Return Loss 16 db Output Return Loss 1 db Output P1dB +3. dbm Output IP3 (+1 dbm / tone, 1 MHz spacing) +46. dbm Channel Power (@- dbc ACPR, IS-9, 9 channels fwd) +24. dbm Noise Figure. db Device / Supply Voltage + V 4 ma 196 MHz Application Circuit (-EPCB196) C -4 C +8 C + C -4 C +8 C C -4 C +8 C Supply Bias vs. Temperature OIP3 vs. Output Power freq. = 196 MHz, 1961 MHz, + C OIP3 vs. Temperature freq. = 196 MHz, 1961 MHz, +1 dbm/tone P1dB (dbm) Temperature ( C) P1dB vs. Frequency Circuit boards are optimized at 196 MHz -4 C + C +8 C NF (db) Output Power (dbm) Noise Figure vs. Frequency 3-4 C + C +8 C ACPR (dbc) Temperature ( C) - - ACPR vs. Channel Power IS-9, 9 Ch. Fwd, ±88 khz offset, 3 khz Meas BW, 196 MHz -6-4 C + C +8 C Output Channel Power (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 9 of 12 July 21

10 Typical RF Performance at C efrequency 214 MHz Gain. db Input Return Loss 24 db Output Return Loss 9 db Output P1dB +3. dbm Output IP3 (+1 dbm / tone, 1 MHz spacing) +46 dbm Channel Power (@- dbc ACPR, IS-9, 9 channels fwd) +22 dbm Noise Figure 6 db Device / Supply Voltage + V 4 ma 214 MHz Application Circuit (-EPCB214) 24 + C -4 C +8 C C -4 C +8 C C -4 C +8 C Supply Bias vs. Temperature OIP3 vs. Output Power freq. = 214 MHz, 2141 MHz, + C OIP3 vs. Temperature freq. = 214 MHz, 2141 MHz, +1 dbm/tone Temperature ( C) P1dB vs. Frequency Circuit boards are optimized at 214 MHz Output Power (dbm) Noise Figure vs. Frequency Temperature ( C) -4 ACLR vs. Channel Power 3GPP W-CDMA, Test Model 1+64 DPCH, ± MHz offset, 214 MHz P1dB (dbm) C + C +8 C NF (db) C + C +8 C ACLR (dbc) - -4 C + C +8 C Output Channel Power (dbm) TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 1 of 12 July 21

11 -S8G (Lead-Free SOIC-8 Package) Mechanical Information This package is lead-free/ RoHS-compliant. The plating material on the leads is NiPdAu. It is compatible with both lead-free (maximum C reflow temperature) and lead (maximum 2 C reflow temperature) soldering processes. Outline Drawing Product Marking The component will be marked with an G designator with an alphanumeric lot code on the top surface of the package. Tape and reel specifications for this part are located on the website in the Application Notes section. ESD / MSL Information ESD Rating: Class 1B Value: Passes V to <1V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD22-A114 ESD Rating: Class IV Value: Passes 2V min. Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD22-C11 MSL Rating: Level 2 at + C convection reflow Standard: JEDEC Standard J-STD-2 Mounting Config. Notes Mounting Configuration / Land Pattern 1. A heatsink underneath the area of the PCB for the mounted device is recommended for proper thermal operation. Damage to the device can occur without the use of one. 2. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.mm (#8 /.1 ) diameter drill and have a final plated thru diameter of. mm (.1 ). 3. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. 4. Mounting screws can be added near the part to fasten the board to a heatsink. Ensure that the ground / thermal via region contacts the heatsink.. Do not put solder mask on the backside of the PC board in the region where the board contacts the heatsink. 6. RF trace width depends upon the PC board material and construction. 7. Use 1 oz. Copper minimum. 8. All dimensions are in millimeters Functional Pin Layout Vcc1 1 8 N/C Vbias1 2 7 Vcc2 / RF Out RF In 3 6 Vcc2 / RF Out Vbias2 4 N/C Function Pin No. Vcc1 1 Input 3 Output/ Vcc2 6, 7 Vbias1 2 Vbias2 4 GND Backside Paddle N/C or GND, 8 TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 11 of 12 July 21

12 -EG (Lead-Free DFN 4x mm Package) Mechanical Information This package is lead-free/ RoHS-compliant. The plating material on the leads is Matte Tin. It is compatible with both lead-free (maximum C reflow temperature) and lead (maximum 2 C reflow temperature) soldering processes. -EG Outline Drawing Product Marking The component will be marked with an -EG designator with an alphanumeric lot code on the top surface of the package. Tape and reel specifications for this part are located on the website in the Application Notes section. ESD / MSL Information ESD Rating: Class 1B Value: Passes V to <1V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD22-A114 Mounting Configuration / Land Pattern ESD Rating: Class IV Value: Passes 2V min. Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD22-C11 MSL Rating: Level 2 at + C convection reflow Standard: JEDEC Standard J-STD-2 Mounting Config. Notes 1. A heatsink underneath the area of the PCB for the mounted device is recommended for proper thermal operation. Damage to the device can occur without the use of one. 2. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.mm (#8 /.1 ) diameter drill and have a final plated thru diameter of. mm (.1 ). 3. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. 4. Mounting screws can be added near the part to fasten the board to a heatsink. Ensure that the ground / thermal via region contacts the heatsink.. Do not put solder mask on the backside of the PC board in the region where the board contacts the heatsink. 6. RF trace width depends upon the PC board material and construction. 7. Use 1 oz. Copper minimum. 8. All dimensions are in millimeters Functional Pin Layout Vbias1 1 N/C 2 RF In 3 N/C 4 N/C Vbias Vcc1 11 N/C 1 Vcc2 / RF Out 9 Vcc2 / RF Out 8 N/C 7 N/C Function Pin No. Vcc1 12 Input 3 Output /Vcc2 9, 1 Vbias1 1 Vbias2 6 GND Backside Paddle N/C or GND 2, 4,, 7, 8, 11 TriQuint Semiconductor Inc Phone FAX: info-sales@tqs.com Web site: Page 12 of 12 July 21