System Quality Indicators

Size: px
Start display at page:

Download "System Quality Indicators"

Transcription

1 Chapter 2 System Quality Indicators The integration of systems on a chip, has led to a revolution in the electronic industry. Large, complex system functions can be integrated in a single IC, paving the road to many battery powered portable applications like the cellular phone, wireless products, MP3 players and so on. The constant drive to improve these applications and to include extra features has enormously increased the pace with which new generation portable products are introduced on the market. Keeping its main function, extra demands are put on the system realizing this function. Smarter integrated system solutions, which are cheaper, smaller, more power efficient, robust to interference, more flexible, etc. are required. In this chapter these additional system requirements are captured in five quality indicators which indicate the quality of the integrated system, and which help to structure the analysis complex systems. The five quality indicators used are: accuracy, robustness, efficiency, flexibility, and emission. The system and its quality indicators are presented in Sects. 2.1 and 2.2 respectively. In Sect. 2.3 the quality indicators are used to motivate why it can be advantageous to shift analog functionality into the digital domain which implicates the need for high dynamic range and high bandwidth analog-digital interfaces. In Chap. 3,the quality indicators are used to find a power efficient receiver architecture for use in a mobile phone. The influence of system partitioning on the quality indicator requirements of the analog-digital interface used in such receiver is postponed to Chap. 4. The quality indicators are used to determine the quality of the analog-todigital interface in Chaps. 5 to 8. In a later stage in this book (Chaps. 8 and 9), the quality indicators are used to compare the analog-to-digital interfaces presented in this book to the quality of analog-digital interfaces presented in literature with the help of a benchmark. In this benchmark, the same or similar analog-digital R.H.M. van Veldhoven, A.H.M. van Roermund, Robust Sigma Delta Converters, Analog Circuits and Signal Processing, DOI / , Springer Science+Business Media B.V

2 14 Chapter 2. System Quality Indicators interfaces are compared, on their quality indicators as these indicators can be a key differentiator to a customer. 2.1 The System Function and Its In- and Outputs A system could be defined as a group of interacting, interrelated, and interdependent elements executing a function. A system function has one or more input(s) X, which are processed in some way by the system function F, yielding one or more output(s) Y. This is schematically shown in Fig The system inputs Figure 2.1: System function with its inputs and outputs can be sub-divided in 2 categories, namely the primary inputs and the secondary inputs. The primary inputs are the wanted inputs, which have to be transferred by the system to the wanted outputs, a process which is called the primary process. The secondary inputs are inputs, which are unavoidable in some way, when implementing the system. The secondary inputs are split up in 3 categories: Resources Outside world influences System interface The first category describes the resources that are required for the systems primary process (e.g. power source, material, design effort). The second category comprises the outside world influences, which describe inputs imposed by the outside world onto the system and can degrade the quality of the primary process (e.g. temperature, interference, manufacturing imperfections, noise). The last category represents inputs, which are required by the user or the system itself, to adapt and change the properties of the primary process to the current system application (e.g. volume control, or tuning function). The secondary inputs are showninfig.2.2. The outputs of the system can also be sub-divided in the primary and secondary categories. The primary output is the output the system was designed for, the wanted output. A secondary output is an output, which was not

3 2.2. System Quality 15 Figure 2.2: System with its primary and secondary inputs and outputs intended to be an output of the system function, like the heat or interference generated by the system. The primary output might be a function of the secondary inputs. Next to that, the combination of primary and secondary inputs might cause cross-correlated secondary outputs. The different in- and outputs are shown in Fig It is very likely that some of the cross-correlation factors of F are zero. Of course there is also wanted correlation between inputs and outputs, examples are: primary input to primary output, secondary system interface input to primary output. 2.2 System Quality An ideal system has infinite accuracy, uses its resources 100% efficiently, is unaware of influences from the outside world and is re-usable for different applications. However, during the system implementation phase, it will show, that there are limits to the accuracy and efficiency the system can achieve, including flexibility turns out to have its cost, the system will be susceptible to the outside world, and the system will generate secondary outputs which might interfere with the system itself or neighboring systems. To determine the quality of a system it is judged on several quality indicators, which are divided into five groups:

4 16 Chapter 2. System Quality Indicators 1. Accuracy 2. Robustness to secondary inputs 3. Flexibility 4. Efficiency 5. Emission of secondary outputs The quality indicators will be explained by the following sections Accuracy The accuracy is the precision with which the primary system function can be fulfilled. The accuracy or performance of the system is measured on the quality of its primary outputs, compared to the quality of the primary inputs, and is determined by system choices Robustness to Secondary Inputs Another measure to judge the quality of a system is the systems robustness. The outside world can distort the primary function of the system in some way due to implementation aspects. The more insensitive the system is for influences from the outside, the more robust the system is. Examples of outside world influences are temperature, humidity, interference, noise, force, process spread and material imperfections. A few examples of different measures to quantify the systems insensitivity to the outside world are durability, reliability, reproducibility and portability (technology independence) Flexibility The flexibility of a system indicates the re-configurability, adaptability and scalability a system, to meet changing requirements, or circumstances. It measures the extent in which (parts of) the system function can be changed into different system functions, for instance with a different accuracy. An adaptable system has the ability to respond to a changing outside world. To be able to respond, the system needs inputs measuring the changes in the outside world. Scalability describes the ability to scale or trade system parameters to meet the requirements of the current system function application. A re-configurable system is able to change from one system function into another system function, by changing the order or position of the different sub-systems of the main system.

5 2.2. System Quality 17 The requirements on the flexibility of a system are often identified by use-case studies. It makes an inventory of expected human behavior and the way a system is expected to be used. To make an inventory of use-cases, marketing research has to be done Efficiency Efficiency indicates how economical a resource is spent. Important efficiencies are power and area efficiency, as nowadays feature rich, battery powered and portable applications require low power consumption and small form factor. Other relevant efficiencies are testability, re-useability and design effort. Testability describes the ease with which the required system accuracy of a system can be verified after manufacturing. Re-useability describes the extent in which parts of the system can be re-used for other systems. Sub-system functions can be categorized in libraries with clearly defined input and output conditions. In this way new system functions can be created with of the shelve parts coming out of the library, decreasing time to market, and reducing maintenance of different products as they share parts from the same library. Design effort describes the effort to build the system and is a resource which should be spent with great care, as it is costly and scarce. Benchmarking is used to quantify the efficiency of a certain system. In a benchmark different system implementations, which have the same or similar system functionality are compared on their efficiencies. The efficiencies are bounded by fundamental limits (like thermal noise, maximum technology speed and availability of man power), but as the implementation of a system has additional cost, the maximum system efficiencies achievable are determined by the current state-ofart Emission of Secondary Outputs Another system quality indicator is the amount in which the system generates secondary outputs. It is important to make an inventory of the secondary outputs the system emits as these outputs can distort the primary process of the system itself, or the primary process of other systems. Examples are heat, and electrical and magnetic interference.

6 18 Chapter 2. System Quality Indicators 2.3 The Digital Revolution The quality indicators presented in the previous section, make the introduction of digital circuitry in nowadays integrated system functions unstoppable. A digitally implemented system is greatly in line with the quality indicators as will be shown in the next section, something that is not so obvious for the same system function implemented with analog circuits. The application of digital enhancements to system functions is numerous. Below several examples are given of systems, which use digital functionality to implement tasks, which are very difficult to implement with analog circuits, if possible at all. The reliability of wireless transmission of speech and video streams is greatly improved by the introduction of digital data transmission. The digital modulation techniques used in these wireless links are much more robust to interference than completely analog modulation schemes. Digital error correction algorithms further improve the reliability of the wireless link. In medical imaging applications an A/D converter converts the sensor outputs of medical imaging equipment into the digital domain. The digital signal processing following the A/D converter for example allows for the construction of 3D images of the human body, leading to a diagnosis of better quality and potentially a longer life. A digital photo camera turns something visible into a digital representation using a photo sensor and A/D converter. After transferring the data to a PC, further image processing and retouching (like red-eye reduction) can easily be done in software. The digital world is penetrating daily life everywhere. But it is not only the digital processing, which facilitates this increased quality of life and number of features; an interface is required between the analog and digital world. Although the outside world is analog, it is seems much easier to do advanced signal processing in digital hardware or software. It must be noted though that this shift from analog to digital signal processing, does not come for free and is bounded by the performance-cost ratio of A/D and D/A functions and by the speed limits of the technology the digital processing is made in.

7 2.3. The Digital Revolution The Analog-Digital Interface Because the outside world is still analog and the processing is preferably done digitally, the introduction of analog-to-digital and digital-to-analog converters has been inevitable. Figure 2.3 shows a generalized implementation of a system function which has been (partly) digitized. From the figure it is evident that the quality of the A/D and D/A converters used in the signal path can be a quality determining factor in the overall system function. This opposes challenges on the design of the A/D and D/A converters. The more our world is captured digitally, the more we must convert from analog to digital and reconstruct from digital to analog, which implicates a trade-off between the amounts of analog and digital functionality and their implementation cost. The system of Fig. 2.3is split into a receiver, a process- Figure 2.3: Partially digitized system ing unit and a transmitter. The receiver receives an analog input X from a sensor, e.g. a microphone, a temperature sensor or an antenna. X is conditioned by F, which can include both gain and filtering, such that it most efficiently fits the input DR of the ADC. The ADC converts the analog input signal into its digital representation at a clock rate f s. In the digital domain G represents the required digital signal processing which implements the task which is more efficient or powerful in digital hardware, or maybe even software. The output of the processing unit is connected to a D/A converter, which outputs the analog signal, which again is conditioned to the right amplitude and frequency content, yielding the desired output Y. The more of the analog functionality represented by F and H is shifted into G,the more demands will be put on the A/D and D/A converter. This requires a system optimization which leads to realistic A/D and D/A converter requirements, which are in line with what is dictated by a benchmark of converters with state-of-the-art performance. This process will be described in Chap. 4.

8 20 Chapter 2. System Quality Indicators Before going into the converter function, first it will be motivated why it is advantageous to replace as much as analog functionality by digital functionality. This is done in the next section, where digital functionality will be tested for its compliance to the quality indicators Digital Systems and the Quality Indicators The advantages of digital signal processing compared to analog signal processing are clear. Once in the digital domain, the signal processing is much more powerful, and advanced features can be added in the signal processing path much easier. In this section the match between digital circuits and the quality indicators will be explored Accuracy One of the primary advantages of digital circuits is the accuracy of digital circuits is 100% when operating well within the noise margin [5] and below the maximum speed of the technology. The maximum switching frequency of the technology chosen sets an upper bound for the sample frequency that can be used for the digital processing unit. If digital circuits are designed on the edge of the speed boundary of the technology and are processed in a slow technology corner, timing errors might occur leading to faulty outputs. For analog circuits the accuracy analysis is much more difficult. The accuracy of the analog circuits is much more dependent on bias conditions and transistor parameters. Furthermore, once introduced, the offset, noise and distortion introduced by the analog circuits accumulates along the signal path, whereas in digital circuitry the accuracy is independent of transistor offset, distortion, circuit noise and interference, when operating well within the noise margin and below the maximum technology speed. Because digital circuits are 100% accurate within the noise margin, they can be captured in a high level descriptive language. The mapping of the VHDL code functionality on the functionality extracted from the layout of the digital system normally is 100% when the digital circuits operate well within the maximum technology speed and noise margin. The maximum achievable accuracy is set by the sample frequency of the digital system, and the number of bits used for the calculations. If the required accuracy is proven by simulation, the hardware implementation of it will show exactly the same performance, under ideal outside world circumstances.

9 2.3. The Digital Revolution Robustness The noise margin and maximum technology switching speed of digital circuits are subject to outside world influences, like process spread, process corners (slow, typical and fast processing), power supply variations (typical +/ 10% of the nominal technology supply voltage), temperature (typical 40 and 125 C). To characterize the influences of these conditions on the noise margin and speed of the technology, several standard digital cells are exposed to these conditions. The outcome of this characterization can than be generalized to define the performance of the technology. At the end of the design trajectory of a digital system, timing verification is done to verify if the accuracy is guaranteed by the system when exposed to these conditions. The extraction of the noise margin from the characterization of different digital cells, will lead to a general substrate, power supply and decoupling strategy. For analog circuits a generalization of the design strategy is much more difficult. As the errors introduced by the outside world influences mentioned above accumulate along the signal path. Due to the robustness of digital systems, they are almost push-button portable to newer technologies, which adds more flexibility to the system. Once available in VHDL code, the layout of a digital system can be ported from one technology to another in only limited amount of time, with a high degree of automation. Although in the discussion above digital circuits seem very robust, the technology scaling of digital circuits predicts that interference within the digital system is an increasing threat. As the accuracy in lithography scales with s T,wiresare closer to each other, increasing mutual crosstalk. Furthermore the impedance of supply lines is increasing, which together with an increase of the current density per area increases the supply bounce. With the increasing number of switching transistors per area the di/dt increases per area which causes the ground bounce to increase. Next to that the noise margin will become smaller as supply voltage and V T are decreasing. This means that shifting analog functionality into the digital domain does not come for free, and noise margin, supply and substrate bounce, and decoupling strategy will become more and more important. As in this book the digital circuits which are used to replace the analog functions are comparably small in area, the (influence on the total digital) interference problem is only small.

10 22 Chapter 2. System Quality Indicators Flexibility As the performance overhead in the noise margin of digital circuits allows for a high abstraction level description (like VHDL) of digital systems, the flexibility potential of digital circuits is enormous. As analog design is mostly custom design it is much more difficult to make flexible. Moreover, adding flexibility to analog circuits introduces parasitic behavior which can even limit the maximum achievable accuracy of the analog circuit. The VHDL code describing a digital system can be set up in a scalable way by using parameterization, to be able to program the systems performance in line with the current application requirements. If the VHDL code describing a digital sub-system is set-up in a scalable way, with clearly defined input and output conditions, the main system function can easily be re-configured to a different system function re-using sub-system functions in a different way or order. A digital system function can be made adaptable to changing outside world circumstances, by reprogramming of the coefficients of the input-output matrix defining the system. To be able to respond to changes in the outside world, the digital system should be supplied with inputs which represent the changes in the outside world Efficiency The power consumption of digital circuitry is related to P = C V 2 supply f s.as V supply scales with s T (for constant field scaling [4]), and C also scales with s T, the consumed power of a digital circuit switching at a constant f s scales with s 3 T (for constant voltage technology scaling, consumed power scales with s T ). This makes it attractive to shift analog functionality in the digital domain, because power consumption of analog circuits 1 at best remains constant when scaled into to deep submicron technologies. The area of digital circuitry scales with s 2 T as the minimum gate length of the smallest transistor that can be used in logic cells, scales with s T. As with power, the area of analog functions at best remains the same when scaling an analog function into deep submicron technologies. Looking into the future, the scaling of digital systems in deep submicron technologies shows promising area and power advantages compared to the scaling of analog systems. 1 Note that the focus of this book is on A/D converters. For other analog circuits like for example oscillators, technology scaling also provides some advantages. The exact analysis of these advantages however is without the scope of this book.

11 2.4. Conclusions 23 Although difficult to measure, the effort to design a certain function (e.g. a channel filter) with analog circuits is more time consuming compared to the design of the same functionality with digital circuits. Moreover, for digital circuitry the generation of layout is automated to a great extent. Analog layout often still is handcraft, for sure for high-end analog functions. For analog functionality some design and layout automation methods have been published ([6, 7] and many more), but are often limited to a specific analog function. To test high performance analog functionality, expensive equipment is required to be able to generate and qualify the analog signals going in or coming out of the analog block respectively. Complicated and difficult to generalize tests with high quality input signals have to be carried out, to be able to completely check if the analog system achieves the required performance under all conditions. The qualification of the system accuracy is difficult because it is degraded by the noise, distortion and interference introduced along the analog signal path. In digital circuits test chains are introduced to verify the systems performance. A pattern generator generates input vectors which sufficiently cover the system functionality. The output vectors of the system are either wrong or right. In general the testing of digital systems is much easier as the behavior of digital circuits is much more predictable, and the results are easier to interpret Emission A drawback of digital circuits is the fact that they are notorious for their emission of interference to supplies and substrate. This asks for a good supply, substrate, and decoupling connection strategy. This way the interference generated by the digital system can be kept under control, and is no threat to the surrounding systems on the same chip or in the same application. As nowadays deep submicron technologies have a deep N-well technology option, at least the substrate bounce of digital circuits can be better shielded from other systems on the same chip. 2.4 Conclusions The design of a system is not only about system functionality but also about system quality. The wish to create more efficient and flexible systems, insensitive to outside world influences, comes from the drive to get products faster to the market, at a lower price, and including more features in a smaller volume, making products more differentiating. This asks for the introduction of quality indicators,

12 24 Chapter 2. System Quality Indicators with which the quality of a system can be judged. In this chapter five quality indicators have been presented, which are: accuracy, robustness to secondary inputs, flexibility, efficiency, and emission of secondary outputs. Throughout the book these are used to judge a system s quality. Quality indicator emission is outside the scope of this book. The quality indicators are shown in Fig In Chap. 1 Figure 2.4: The quality indicators introduced in this book it was shown that Moore s law predicts that if a digital function is ported to the next technology node, clear technology advantages like area scaling (s 2 T ), increase of power efficiency (1/s 2 T ) and speed increase (1/s T ) become available. Furthermore, as digital circuits have built-in performance overhead in their noise margin, a high degree of automation to do the port to the next technology node is possible. Next to that, digital circuits can be made re-configurable very easily as they are captured in a descriptive language like VHDL. For a fixed analog function the area scaling in the next technology node is not that evident. The change of analog design parameters like power supply, V T,etc.,ask for a re-design of all the analog circuit blocks when going to the next technology node. This reduces the portability of these analog blocks and thus increases time-to-market. Next to that, analog circuits are much more difficult to make reconfigurable. Therefore, it is advantageous to increase the digitization of a system as digital circuits score high on the quality indicators. In this book the digitization process

13 2.4. Conclusions 25 Figure 2.5: Digitization of an analog system at different levels will be carried through four different abstraction levels, displayed in Fig At system level, this calls for an early introduction of the A/D and D/A conversion in the system pipe-line, which shifts the signal processing as much as possible into the digital domain. Once in the digital domain, the systems accuracy is only determined by the accuracy described in the VHDL code when operating within the maximum achievable speed of the technology and within the noise margin. This makes the system robust to outside world influences. In the digital domain the signal processing is more powerful, can be setup in a flexible way more easily and shows increased power and area efficiencies in newer technologies, being future proof. However, shifting more of the signal processing in the digital domain, higher demands are put on the DR and bandwidth requirements of the ADC. It is the challenge to trade off analog and digital functionality with the ADC DR to come to a realistic but competitive system solution. At analog IP architecture smart circuit choices should be made to reduce the amount of critical analog functions and replace or assist them with digital circuits as much as possible. At circuit level, the circuits should be designed such that the analog blocks can be built up by a limited amount of unit cells, like in digital circuits. Due to the simplicity of the analog unit cells, the analog library can be ported to a next technology node very quickly, as its optimization process can be done by using simulation scripts for the analog simulator.

14 26 Chapter 2. System Quality Indicators At layout level, each unit cell out of the analog unit cell library is turned into a parameterized layout (p-cell layout). Once these p-cell layouts are available, the routing tool normally used to layout digital circuits can be used, which reduces time-to-market tremendously. This way digitally assisted systems and circuits are created which score high on the quality indicators.

15

Sharif University of Technology. SoC: Introduction

Sharif University of Technology. SoC: Introduction SoC Design Lecture 1: Introduction Shaahin Hessabi Department of Computer Engineering System-on-Chip System: a set of related parts that act as a whole to achieve a given goal. A system is a set of interacting

More information

Scan. This is a sample of the first 15 pages of the Scan chapter.

Scan. This is a sample of the first 15 pages of the Scan chapter. Scan This is a sample of the first 15 pages of the Scan chapter. Note: The book is NOT Pinted in color. Objectives: This section provides: An overview of Scan An introduction to Test Sequences and Test

More information

Introduction to Data Conversion and Processing

Introduction to Data Conversion and Processing Introduction to Data Conversion and Processing The proliferation of digital computing and signal processing in electronic systems is often described as "the world is becoming more digital every day." Compared

More information

Low-Power Decimation Filter for 2.5 GHz Operation in Standard-Cell Implementation

Low-Power Decimation Filter for 2.5 GHz Operation in Standard-Cell Implementation Low-Power Decimation Filter for 2.5 GHz Operation in Standard-Cell Implementation Manfred Ley, Oleksandr Melnychenko Abstract A low-power decimation filter for very high-speed over-sampling analog to digital

More information

Design of Fault Coverage Test Pattern Generator Using LFSR

Design of Fault Coverage Test Pattern Generator Using LFSR Design of Fault Coverage Test Pattern Generator Using LFSR B.Saritha M.Tech Student, Department of ECE, Dhruva Institue of Engineering & Technology. Abstract: A new fault coverage test pattern generator

More information

Chapter 1. Introduction to Digital Signal Processing

Chapter 1. Introduction to Digital Signal Processing Chapter 1 Introduction to Digital Signal Processing 1. Introduction Signal processing is a discipline concerned with the acquisition, representation, manipulation, and transformation of signals required

More information

EMI/EMC diagnostic and debugging

EMI/EMC diagnostic and debugging EMI/EMC diagnostic and debugging 1 Introduction to EMI The impact of Electromagnetism Even on a simple PCB circuit, Magnetic & Electric Field are generated as long as current passes through the conducting

More information

Analog Performance-based Self-Test Approaches for Mixed-Signal Circuits

Analog Performance-based Self-Test Approaches for Mixed-Signal Circuits Analog Performance-based Self-Test Approaches for Mixed-Signal Circuits Tutorial, September 1, 2015 Byoungho Kim, Ph.D. Division of Electrical Engineering Hanyang University Outline State of the Art for

More information

Timing Error Detection: An Adaptive Scheme To Combat Variability EE241 Final Report Nathan Narevsky and Richard Ott {nnarevsky,

Timing Error Detection: An Adaptive Scheme To Combat Variability EE241 Final Report Nathan Narevsky and Richard Ott {nnarevsky, Timing Error Detection: An Adaptive Scheme To Combat Variability EE241 Final Report Nathan Narevsky and Richard Ott {nnarevsky, tomott}@berkeley.edu Abstract With the reduction of feature sizes, more sources

More information

Chapter 3 Evaluated Results of Conventional Pixel Circuit, Other Compensation Circuits and Proposed Pixel Circuits for Active Matrix Organic Light Emitting Diodes (AMOLEDs) -------------------------------------------------------------------------------------------------------

More information

Area-Efficient Decimation Filter with 50/60 Hz Power-Line Noise Suppression for ΔΣ A/D Converters

Area-Efficient Decimation Filter with 50/60 Hz Power-Line Noise Suppression for ΔΣ A/D Converters SICE Journal of Control, Measurement, and System Integration, Vol. 10, No. 3, pp. 165 169, May 2017 Special Issue on SICE Annual Conference 2016 Area-Efficient Decimation Filter with 50/60 Hz Power-Line

More information

News from Rohde&Schwarz Number 195 (2008/I)

News from Rohde&Schwarz Number 195 (2008/I) BROADCASTING TV analyzers 45120-2 48 R&S ETL TV Analyzer The all-purpose instrument for all major digital and analog TV standards Transmitter production, installation, and service require measuring equipment

More information

7 DESIGN ASPECTS OF IoT PCB DESIGNS JOHN MCMILLAN, MENTOR GRAPHICS

7 DESIGN ASPECTS OF IoT PCB DESIGNS JOHN MCMILLAN, MENTOR GRAPHICS 7 DESIGN ASPECTS OF IoT PCB DESIGNS JOHN MCMILLAN, MENTOR GRAPHICS P C B D E S I G N W H I T E P A P E R w w w. p a d s. c o m INTRODUCTION: IoT EVERYWHERE Designing electronic products with IoT capabilities

More information

Layers of Innovation: How Signal Chain Innovations are Creating Analog Opportunities in a Digital World

Layers of Innovation: How Signal Chain Innovations are Creating Analog Opportunities in a Digital World The World Leader in High Performance Signal Processing Solutions Layers of Innovation: How Signal Chain Innovations are Creating Analog Opportunities in a Digital World Dave Robertson-- VP of Analog Technology

More information

Future of Analog Design and Upcoming Challenges in Nanometer CMOS

Future of Analog Design and Upcoming Challenges in Nanometer CMOS Future of Analog Design and Upcoming Challenges in Nanometer CMOS Greg Taylor VLSI Design 2010 Outline Introduction Logic processing trends Analog design trends Analog design challenge Approaches Conclusion

More information

EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP. Due İLKER KALYONCU, 10043

EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP. Due İLKER KALYONCU, 10043 EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP Due 16.05. İLKER KALYONCU, 10043 1. INTRODUCTION: In this project we are going to design a CMOS positive edge triggered master-slave

More information

VLSI Chip Design Project TSEK06

VLSI Chip Design Project TSEK06 VLSI Chip Design Project TSEK06 Project Description and Requirement Specification Version 1.1 Project: High Speed Serial Link Transceiver Project number: 4 Project Group: Name Project members Telephone

More information

Why Use the Cypress PSoC?

Why Use the Cypress PSoC? C H A P T E R1 Why Use the Cypress PSoC? Electronics have dramatically altered the world as we know it. One has simply to compare the conveniences and capabilities of today s world with those of the late

More information

Adding Analog and Mixed Signal Concerns to a Digital VLSI Course

Adding Analog and Mixed Signal Concerns to a Digital VLSI Course Session Number 1532 Adding Analog and Mixed Signal Concerns to a Digital VLSI Course John A. Nestor and David A. Rich Department of Electrical and Computer Engineering Lafayette College Abstract This paper

More information

Data Converters and DSPs Getting Closer to Sensors

Data Converters and DSPs Getting Closer to Sensors Data Converters and DSPs Getting Closer to Sensors As the data converters used in military applications must operate faster and at greater resolution, the digital domain is moving closer to the antenna/sensor

More information

About... D 3 Technology TM.

About... D 3 Technology TM. About... D 3 Technology TM www.euresys.com Copyright 2008 Euresys s.a. Belgium. Euresys is a registred trademark of Euresys s.a. Belgium. Other product and company names listed are trademarks or trade

More information

Design for Test. Design for test (DFT) refers to those design techniques that make test generation and test application cost-effective.

Design for Test. Design for test (DFT) refers to those design techniques that make test generation and test application cost-effective. Design for Test Definition: Design for test (DFT) refers to those design techniques that make test generation and test application cost-effective. Types: Design for Testability Enhanced access Built-In

More information

International Research Journal of Engineering and Technology (IRJET) e-issn: Volume: 03 Issue: 07 July p-issn:

International Research Journal of Engineering and Technology (IRJET) e-issn: Volume: 03 Issue: 07 July p-issn: IC Layout Design of Decoder Using Electrical VLSI System Design 1.UPENDRA CHARY CHOKKELLA Assistant Professor Electronics & Communication Department, Guru Nanak Institute Of Technology-Ibrahimpatnam (TS)-India

More information

Digital Audio Design Validation and Debugging Using PGY-I2C

Digital Audio Design Validation and Debugging Using PGY-I2C Digital Audio Design Validation and Debugging Using PGY-I2C Debug the toughest I 2 S challenges, from Protocol Layer to PHY Layer to Audio Content Introduction Today s digital systems from the Digital

More information

data and is used in digital networks and storage devices. CRC s are easy to implement in binary

data and is used in digital networks and storage devices. CRC s are easy to implement in binary Introduction Cyclic redundancy check (CRC) is an error detecting code designed to detect changes in transmitted data and is used in digital networks and storage devices. CRC s are easy to implement in

More information

RedEye Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision

RedEye Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision Robert LiKamWa Yunhui Hou Yuan Gao Mia Polansky Lin Zhong roblkw@rice.edu houyh@rice.edu yg18@rice.edu mia.polansky@rice.edu lzhong@rice.edu

More information

Co-simulation Techniques for Mixed Signal Circuits

Co-simulation Techniques for Mixed Signal Circuits Co-simulation Techniques for Mixed Signal Circuits Tudor Timisescu Technische Universität München Abstract As designs grow more and more complex, there is increasing effort spent on verification. Most

More information

Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED)

Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED) Chapter 2 Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED) ---------------------------------------------------------------------------------------------------------------

More information

Multiband Noise Reduction Component for PurePath Studio Portable Audio Devices

Multiband Noise Reduction Component for PurePath Studio Portable Audio Devices Multiband Noise Reduction Component for PurePath Studio Portable Audio Devices Audio Converters ABSTRACT This application note describes the features, operating procedures and control capabilities of a

More information

DESIGN PHILOSOPHY We had a Dream...

DESIGN PHILOSOPHY We had a Dream... DESIGN PHILOSOPHY We had a Dream... The from-ground-up new architecture is the result of multiple prototype generations over the last two years where the experience of digital and analog algorithms and

More information

Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper.

Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper. Powerful Software Tools and Methods to Accelerate Test Program Development A Test Systems Strategies, Inc. (TSSI) White Paper Abstract Test costs have now risen to as much as 50 percent of the total manufacturing

More information

IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology.

IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology. IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology. T.Vijay Kumar, M.Tech Associate Professor, Dr.K.V.Subba Reddy Institute of Technology.

More information

Designing for the Internet of Things with Cadence PSpice A/D Technology

Designing for the Internet of Things with Cadence PSpice A/D Technology Designing for the Internet of Things with Cadence PSpice A/D Technology By Alok Tripathi, Software Architect, Cadence The Cadence PSpice A/D release 17.2-2016 offers a comprehensive feature set to address

More information

VLSI Test Technology and Reliability (ET4076)

VLSI Test Technology and Reliability (ET4076) VLSI Test Technology and Reliability (ET476) Lecture 9 (2) Built-In-Self Test (Chapter 5) Said Hamdioui Computer Engineering Lab Delft University of Technology 29-2 Learning aims Describe the concept and

More information

ADVANCES in semiconductor technology are contributing

ADVANCES in semiconductor technology are contributing 292 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 14, NO. 3, MARCH 2006 Test Infrastructure Design for Mixed-Signal SOCs With Wrapped Analog Cores Anuja Sehgal, Student Member,

More information

nmos transistor Basics of VLSI Design and Test Solution: CMOS pmos transistor CMOS Inverter First-Order DC Analysis CMOS Inverter: Transient Response

nmos transistor Basics of VLSI Design and Test Solution: CMOS pmos transistor CMOS Inverter First-Order DC Analysis CMOS Inverter: Transient Response nmos transistor asics of VLSI Design and Test If the gate is high, the switch is on If the gate is low, the switch is off Mohammad Tehranipoor Drain ECE495/695: Introduction to Hardware Security & Trust

More information

How to Predict the Output of a Hardware Random Number Generator

How to Predict the Output of a Hardware Random Number Generator How to Predict the Output of a Hardware Random Number Generator Markus Dichtl Siemens AG, Corporate Technology Markus.Dichtl@siemens.com Abstract. A hardware random number generator was described at CHES

More information

FDTD_SPICE Analysis of EMI and SSO of LSI ICs Using a Full Chip Macro Model

FDTD_SPICE Analysis of EMI and SSO of LSI ICs Using a Full Chip Macro Model FDTD_SPICE Analysis of EMI and SSO of LSI ICs Using a Full Chip Macro Model Norio Matsui Applied Simulation Technology 2025 Gateway Place #318 San Jose, CA USA 95110 matsui@apsimtech.com Neven Orhanovic

More information

Monitor QA Management i model

Monitor QA Management i model Monitor QA Management i model 1/10 Monitor QA Management i model Table of Contents 1. Preface ------------------------------------------------------------------------------------------------------- 3 2.

More information

ECE 5765 Modern Communication Fall 2005, UMD Experiment 10: PRBS Messages, Eye Patterns & Noise Simulation using PRBS

ECE 5765 Modern Communication Fall 2005, UMD Experiment 10: PRBS Messages, Eye Patterns & Noise Simulation using PRBS ECE 5765 Modern Communication Fall 2005, UMD Experiment 10: PRBS Messages, Eye Patterns & Noise Simulation using PRBS modules basic: SEQUENCE GENERATOR, TUNEABLE LPF, ADDER, BUFFER AMPLIFIER extra basic:

More information

6.111 Project Proposal IMPLEMENTATION. Lyne Petse Szu-Po Wang Wenting Zheng

6.111 Project Proposal IMPLEMENTATION. Lyne Petse Szu-Po Wang Wenting Zheng 6.111 Project Proposal Lyne Petse Szu-Po Wang Wenting Zheng Overview: Technology in the biomedical field has been advancing rapidly in the recent years, giving rise to a great deal of efficient, personalized

More information

High Performance TFT LCD Driver ICs for Large-Size Displays

High Performance TFT LCD Driver ICs for Large-Size Displays Name: Eugenie Ip Title: Technical Marketing Engineer Company: Solomon Systech Limited www.solomon-systech.com The TFT LCD market has rapidly evolved in the last decade, enabling the occurrence of large

More information

Bit Swapping LFSR and its Application to Fault Detection and Diagnosis Using FPGA

Bit Swapping LFSR and its Application to Fault Detection and Diagnosis Using FPGA Bit Swapping LFSR and its Application to Fault Detection and Diagnosis Using FPGA M.V.M.Lahari 1, M.Mani Kumari 2 1,2 Department of ECE, GVPCEOW,Visakhapatnam. Abstract The increasing growth of sub-micron

More information

Your partner in testing the Internet of Things

Your partner in testing the Internet of Things Your partner in testing the Internet of Things The power of testing in all phases of the product lifecycle The majority of devices sensors, actors, gateways building the Internet of Things (IoT) use wireless

More information

Supervision of Analogue Signal Paths in Legacy Media Migration Processes using Digital Signal Processing

Supervision of Analogue Signal Paths in Legacy Media Migration Processes using Digital Signal Processing Welcome Supervision of Analogue Signal Paths in Legacy Media Migration Processes using Digital Signal Processing Jörg Houpert Cube-Tec International Oslo, Norway 4th May, 2010 Joint Technical Symposium

More information

Made- for- Analog Design Automation The Time Has Come

Made- for- Analog Design Automation The Time Has Come Pulsic Limited Made- for- Analog Design Automation The Time Has Come White Paper Mark Williams Co- Founder Pulsic A Brief History of Analog Design Automation Since its inception, most of the efforts and

More information

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE. On Industrial Automation and Control

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE. On Industrial Automation and Control INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR NPTEL ONLINE CERTIFICATION COURSE On Industrial Automation and Control By Prof. S. Mukhopadhyay Department of Electrical Engineering IIT Kharagpur Topic Lecture

More information

Understanding Compression Technologies for HD and Megapixel Surveillance

Understanding Compression Technologies for HD and Megapixel Surveillance When the security industry began the transition from using VHS tapes to hard disks for video surveillance storage, the question of how to compress and store video became a top consideration for video surveillance

More information

UNIT IV CMOS TESTING. EC2354_Unit IV 1

UNIT IV CMOS TESTING. EC2354_Unit IV 1 UNIT IV CMOS TESTING EC2354_Unit IV 1 Outline Testing Logic Verification Silicon Debug Manufacturing Test Fault Models Observability and Controllability Design for Test Scan BIST Boundary Scan EC2354_Unit

More information

Digital Video Telemetry System

Digital Video Telemetry System Digital Video Telemetry System Item Type text; Proceedings Authors Thom, Gary A.; Snyder, Edwin Publisher International Foundation for Telemetering Journal International Telemetering Conference Proceedings

More information

SI-Studio environment for SI circuits design automation

SI-Studio environment for SI circuits design automation BULLETIN OF THE POLISH ACADEMY OF SCIENCES TECHNICAL SCIENCES, Vol. 60, No. 4, 2012 DOI: 10.2478/v10175-012-0087-5 ELECTRONICS SI-Studio environment for SI circuits design automation S. SZCZĘSNY, M. NAUMOWICZ,

More information

IC Design of a New Decision Device for Analog Viterbi Decoder

IC Design of a New Decision Device for Analog Viterbi Decoder IC Design of a New Decision Device for Analog Viterbi Decoder Wen-Ta Lee, Ming-Jlun Liu, Yuh-Shyan Hwang and Jiann-Jong Chen Institute of Computer and Communication, National Taipei University of Technology

More information

Digital Logic Design: An Overview & Number Systems

Digital Logic Design: An Overview & Number Systems Digital Logic Design: An Overview & Number Systems Analogue versus Digital Most of the quantities in nature that can be measured are continuous. Examples include Intensity of light during the day: The

More information

Innovative Rotary Encoders Deliver Durability and Precision without Tradeoffs. By: Jeff Smoot, CUI Inc

Innovative Rotary Encoders Deliver Durability and Precision without Tradeoffs. By: Jeff Smoot, CUI Inc Innovative Rotary Encoders Deliver Durability and Precision without Tradeoffs By: Jeff Smoot, CUI Inc Rotary encoders provide critical information about the position of motor shafts and thus also their

More information

[Krishna*, 4.(12): December, 2015] ISSN: (I2OR), Publication Impact Factor: 3.785

[Krishna*, 4.(12): December, 2015] ISSN: (I2OR), Publication Impact Factor: 3.785 IJESRT INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY DESIGN AND IMPLEMENTATION OF BIST TECHNIQUE IN UART SERIAL COMMUNICATION M.Hari Krishna*, P.Pavan Kumar * Electronics and Communication

More information

Low Power VLSI Circuits and Systems Prof. Ajit Pal Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur

Low Power VLSI Circuits and Systems Prof. Ajit Pal Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur Low Power VLSI Circuits and Systems Prof. Ajit Pal Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur Lecture No. # 29 Minimizing Switched Capacitance-III. (Refer

More information

ADE Assembler Flow for Rapid Design of High-Speed Low-Power Circuits

ADE Assembler Flow for Rapid Design of High-Speed Low-Power Circuits DEPARTMENT OF INFORMATION TECHNOLOGY IDLab ADE Assembler Flow for Rapid Design of High-Speed Low-Power Circuits Wouter Soenen, Bart Moeneclaey, Xin Yin and Johan Bauwelinck High-speed and low-power circuit

More information

Calibrate, Characterize and Emulate Systems Using RFXpress in AWG Series

Calibrate, Characterize and Emulate Systems Using RFXpress in AWG Series Calibrate, Characterize and Emulate Systems Using RFXpress in AWG Series Introduction System designers and device manufacturers so long have been using one set of instruments for creating digitally modulated

More information

Introduction to The Design of Mixed-Signal Systems on Chip 1

Introduction to The Design of Mixed-Signal Systems on Chip 1 Introduction to The Design of Mixed-Signal Systems on Chip 1 Ken Kundert Cadence Design Systems Design of Mixed-Signal Systems on Chip 35 th Design Automation Conference, 1998 Henry Chang Felicia James

More information

DIGITAL COMMUNICATION

DIGITAL COMMUNICATION 10EC61 DIGITAL COMMUNICATION UNIT 3 OUTLINE Waveform coding techniques (continued), DPCM, DM, applications. Base-Band Shaping for Data Transmission Discrete PAM signals, power spectra of discrete PAM signals.

More information

Therefore, HDCVI is an optimal solution for megapixel high definition application, featuring non-latent long-distance transmission at lower cost.

Therefore, HDCVI is an optimal solution for megapixel high definition application, featuring non-latent long-distance transmission at lower cost. Overview is a video transmission technology in high definition via coaxial cable, allowing reliable long-distance HD transmission at lower cost, while complex deployment is applicable. modulates video

More information

Digital Video Engineering Professional Certification Competencies

Digital Video Engineering Professional Certification Competencies Digital Video Engineering Professional Certification Competencies I. Engineering Management and Professionalism A. Demonstrate effective problem solving techniques B. Describe processes for ensuring realistic

More information

INF4420 Project Spring Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC)

INF4420 Project Spring Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) INF4420 Project Spring 2011 Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) 1. Introduction Data converters are one of the fundamental building blocks in integrated circuit design.

More information

CHAPTER 2 SUBCHANNEL POWER CONTROL THROUGH WEIGHTING COEFFICIENT METHOD

CHAPTER 2 SUBCHANNEL POWER CONTROL THROUGH WEIGHTING COEFFICIENT METHOD CHAPTER 2 SUBCHANNEL POWER CONTROL THROUGH WEIGHTING COEFFICIENT METHOD 2.1 INTRODUCTION MC-CDMA systems transmit data over several orthogonal subcarriers. The capacity of MC-CDMA cellular system is mainly

More information

FPGA Hardware Resource Specific Optimal Design for FIR Filters

FPGA Hardware Resource Specific Optimal Design for FIR Filters International Journal of Computer Engineering and Information Technology VOL. 8, NO. 11, November 2016, 203 207 Available online at: www.ijceit.org E-ISSN 2412-8856 (Online) FPGA Hardware Resource Specific

More information

Unit V Design for Testability

Unit V Design for Testability Unit V Design for Testability Outline Testing Logic Verification Silicon Debug Manufacturing Test Fault Models Observability and Controllability Design for Test Scan BIST Boundary Scan Slide 2 Testing

More information

Lecture 17: Introduction to Design For Testability (DFT) & Manufacturing Test

Lecture 17: Introduction to Design For Testability (DFT) & Manufacturing Test Lecture 17: Introduction to Design For Testability (DFT) & Manufacturing Test Mark McDermott Electrical and Computer Engineering The University of Texas at Austin Agenda Introduction to testing Logical

More information

Troubleshooting EMI in Embedded Designs White Paper

Troubleshooting EMI in Embedded Designs White Paper Troubleshooting EMI in Embedded Designs White Paper Abstract Today, engineers need reliable information fast, and to ensure compliance with regulations for electromagnetic compatibility in the most economical

More information

Integrated Circuit for Musical Instrument Tuners

Integrated Circuit for Musical Instrument Tuners Document History Release Date Purpose 8 March 2006 Initial prototype 27 April 2006 Add information on clip indication, MIDI enable, 20MHz operation, crystal oscillator and anti-alias filter. 8 May 2006

More information

Precision testing methods of Event Timer A032-ET

Precision testing methods of Event Timer A032-ET Precision testing methods of Event Timer A032-ET Event Timer A032-ET provides extreme precision. Therefore exact determination of its characteristics in commonly accepted way is impossible or, at least,

More information

RF amplifier testing from wafer to design-in

RF amplifier testing from wafer to design-in RF amplifier testing from wafer to design-in We help you reach your target: Improve efficiency Ensure RF performance Increase throughput Turn your signals into success. Benefit from 85 years of experience

More information

Enhanced JTAG to test interconnects in a SoC

Enhanced JTAG to test interconnects in a SoC Enhanced JTAG to test interconnects in a SoC by Dany Lebel and Sorin Alin Herta 1 Enhanced JTAG to test interconnects in a SoC Dany Lebel (1271766) and Sorin Alin Herta (1317418) ELE-6306, Test de systèmes

More information

LFSR Counter Implementation in CMOS VLSI

LFSR Counter Implementation in CMOS VLSI LFSR Counter Implementation in CMOS VLSI Doshi N. A., Dhobale S. B., and Kakade S. R. Abstract As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size

More information

National Park Service Photo. Utah 400 Series 1. Digital Routing Switcher.

National Park Service Photo. Utah 400 Series 1. Digital Routing Switcher. National Park Service Photo Utah 400 Series 1 Digital Routing Switcher Utah Scientific has been involved in the design and manufacture of routing switchers for audio and video signals for over thirty years.

More information

Skip Length and Inter-Starvation Distance as a Combined Metric to Assess the Quality of Transmitted Video

Skip Length and Inter-Starvation Distance as a Combined Metric to Assess the Quality of Transmitted Video Skip Length and Inter-Starvation Distance as a Combined Metric to Assess the Quality of Transmitted Video Mohamed Hassan, Taha Landolsi, Husameldin Mukhtar, and Tamer Shanableh College of Engineering American

More information

White Paper. Uniform Luminance Technology. What s inside? What is non-uniformity and noise in LCDs? Why is it a problem? How is it solved?

White Paper. Uniform Luminance Technology. What s inside? What is non-uniformity and noise in LCDs? Why is it a problem? How is it solved? White Paper Uniform Luminance Technology What s inside? What is non-uniformity and noise in LCDs? Why is it a problem? How is it solved? Tom Kimpe Manager Technology & Innovation Group Barco Medical Imaging

More information

PICOSECOND TIMING USING FAST ANALOG SAMPLING

PICOSECOND TIMING USING FAST ANALOG SAMPLING PICOSECOND TIMING USING FAST ANALOG SAMPLING H. Frisch, J-F Genat, F. Tang, EFI Chicago, Tuesday 6 th Nov 2007 INTRODUCTION In the context of picosecond timing, analog detector pulse sampling in the 10

More information

Using the MAX3656 Laser Driver to Transmit Serial Digital Video with Pathological Patterns

Using the MAX3656 Laser Driver to Transmit Serial Digital Video with Pathological Patterns Design Note: HFDN-33.0 Rev 0, 8/04 Using the MAX3656 Laser Driver to Transmit Serial Digital Video with Pathological Patterns MAXIM High-Frequency/Fiber Communications Group AVAILABLE 6hfdn33.doc Using

More information

Frame Processing Time Deviations in Video Processors

Frame Processing Time Deviations in Video Processors Tensilica White Paper Frame Processing Time Deviations in Video Processors May, 2008 1 Executive Summary Chips are increasingly made with processor designs licensed as semiconductor IP (intellectual property).

More information

ONE SENSOR MICROPHONE ARRAY APPLICATION IN SOURCE LOCALIZATION. Hsin-Chu, Taiwan

ONE SENSOR MICROPHONE ARRAY APPLICATION IN SOURCE LOCALIZATION. Hsin-Chu, Taiwan ICSV14 Cairns Australia 9-12 July, 2007 ONE SENSOR MICROPHONE ARRAY APPLICATION IN SOURCE LOCALIZATION Percy F. Wang 1 and Mingsian R. Bai 2 1 Southern Research Institute/University of Alabama at Birmingham

More information

Iterative Direct DPD White Paper

Iterative Direct DPD White Paper Iterative Direct DPD White Paper Products: ı ı R&S FSW-K18D R&S FPS-K18D Digital pre-distortion (DPD) is a common method to linearize the output signal of a power amplifier (PA), which is being operated

More information

SIC Vector Generation Using Test per Clock and Test per Scan

SIC Vector Generation Using Test per Clock and Test per Scan International Journal of Emerging Engineering Research and Technology Volume 2, Issue 8, November 2014, PP 84-89 ISSN 2349-4395 (Print) & ISSN 2349-4409 (Online) SIC Vector Generation Using Test per Clock

More information

An Efficient IC Layout Design of Decoders and Its Applications

An Efficient IC Layout Design of Decoders and Its Applications An Efficient IC Layout Design of Decoders and Its Applications Dr.Arvind Kundu HOD, SCIENT Institute of Technology. T.Uday Bhaskar, M.Tech Assistant Professor, SCIENT Institute of Technology. B.Suresh

More information

Challenges in the design of a RGB LED display for indoor applications

Challenges in the design of a RGB LED display for indoor applications Synthetic Metals 122 (2001) 215±219 Challenges in the design of a RGB LED display for indoor applications Francis Nguyen * Osram Opto Semiconductors, In neon Technologies Corporation, 19000, Homestead

More information

DELTA MODULATION AND DPCM CODING OF COLOR SIGNALS

DELTA MODULATION AND DPCM CODING OF COLOR SIGNALS DELTA MODULATION AND DPCM CODING OF COLOR SIGNALS Item Type text; Proceedings Authors Habibi, A. Publisher International Foundation for Telemetering Journal International Telemetering Conference Proceedings

More information

Digital Correction for Multibit D/A Converters

Digital Correction for Multibit D/A Converters Digital Correction for Multibit D/A Converters José L. Ceballos 1, Jesper Steensgaard 2 and Gabor C. Temes 1 1 Dept. of Electrical Engineering and Computer Science, Oregon State University, Corvallis,

More information

Based on slides/material by. Topic 14. Testing. Testing. Logic Verification. Recommended Reading:

Based on slides/material by. Topic 14. Testing. Testing. Logic Verification. Recommended Reading: Based on slides/material by Topic 4 Testing Peter Y. K. Cheung Department of Electrical & Electronic Engineering Imperial College London!! K. Masselos http://cas.ee.ic.ac.uk/~kostas!! J. Rabaey http://bwrc.eecs.berkeley.edu/classes/icbook/instructors.html

More information

Investigation of Digital Signal Processing of High-speed DACs Signals for Settling Time Testing

Investigation of Digital Signal Processing of High-speed DACs Signals for Settling Time Testing Universal Journal of Electrical and Electronic Engineering 4(2): 67-72, 2016 DOI: 10.13189/ujeee.2016.040204 http://www.hrpub.org Investigation of Digital Signal Processing of High-speed DACs Signals for

More information

100Gb/s Single-lane SERDES Discussion. Phil Sun, Credo Semiconductor IEEE New Ethernet Applications Ad Hoc May 24, 2017

100Gb/s Single-lane SERDES Discussion. Phil Sun, Credo Semiconductor IEEE New Ethernet Applications Ad Hoc May 24, 2017 100Gb/s Single-lane SERDES Discussion Phil Sun, Credo Semiconductor IEEE 802.3 New Ethernet Applications Ad Hoc May 24, 2017 Introduction This contribution tries to share thoughts on 100Gb/s single-lane

More information

LabView Exercises: Part II

LabView Exercises: Part II Physics 3100 Electronics, Fall 2008, Digital Circuits 1 LabView Exercises: Part II The working VIs should be handed in to the TA at the end of the lab. Using LabView for Calculations and Simulations LabView

More information

Barnas International Pvt Ltd Converting an Analog CCTV System to IP-Surveillance

Barnas International Pvt Ltd Converting an Analog CCTV System to IP-Surveillance Barnas International Pvt Ltd Converting an Analog CCTV System to IP-Surveillance TABLE OF CONTENTS INTRODUCTION 1 BENEFITS OF GOING DIGITAL 1 FACTORS TO CONSIDER: THE MOVE TO DIGITAL 2 ANALOG CCTV TO IP-SURVEILLANCE

More information

A FOUR GAIN READOUT INTEGRATED CIRCUIT : FRIC 96_1

A FOUR GAIN READOUT INTEGRATED CIRCUIT : FRIC 96_1 A FOUR GAIN READOUT INTEGRATED CIRCUIT : FRIC 96_1 J. M. Bussat 1, G. Bohner 1, O. Rossetto 2, D. Dzahini 2, J. Lecoq 1, J. Pouxe 2, J. Colas 1, (1) L. A. P. P. Annecy-le-vieux, France (2) I. S. N. Grenoble,

More information

MODELING OF ADC ARCHITECTURES IN HDL LANGUAGES

MODELING OF ADC ARCHITECTURES IN HDL LANGUAGES MODELING OF ADC ARCHITECTURES IN HDL LANGUAGES Marco Oliveira, Nuno Franca Modeling Group, Chipidea Microelectronics, Inc. Taguspark, Edifício Inovação IV, sala 733, 2780-920 Porto Salvo, Portugal Phone

More information

VLSI System Testing. BIST Motivation

VLSI System Testing. BIST Motivation ECE 538 VLSI System Testing Krish Chakrabarty Built-In Self-Test (BIST): ECE 538 Krish Chakrabarty BIST Motivation Useful for field test and diagnosis (less expensive than a local automatic test equipment)

More information

Switching Solutions for Multi-Channel High Speed Serial Port Testing

Switching Solutions for Multi-Channel High Speed Serial Port Testing Switching Solutions for Multi-Channel High Speed Serial Port Testing Application Note by Robert Waldeck VP Business Development, ASCOR Switching The instruments used in High Speed Serial Port testing are

More information

Avoiding False Pass or False Fail

Avoiding False Pass or False Fail Avoiding False Pass or False Fail By Michael Smith, Teradyne, October 2012 There is an expectation from consumers that today s electronic products will just work and that electronic manufacturers have

More information

Dac3 White Paper. These Dac3 goals where to be achieved through the application and use of optimum solutions for:

Dac3 White Paper. These Dac3 goals where to be achieved through the application and use of optimum solutions for: Dac3 White Paper Design Goal The design goal for the Dac3 was to set a new standard for digital audio playback components through the application of technical advances in Digital to Analog Conversion devices

More information

Doubletalk Detection

Doubletalk Detection ELEN-E4810 Digital Signal Processing Fall 2004 Doubletalk Detection Adam Dolin David Klaver Abstract: When processing a particular voice signal it is often assumed that the signal contains only one speaker,

More information

Optimizing BNC PCB Footprint Designs for Digital Video Equipment

Optimizing BNC PCB Footprint Designs for Digital Video Equipment Optimizing BNC PCB Footprint Designs for Digital Video Equipment By Tsun-kit Chin Applications Engineer, Member of Technical Staff National Semiconductor Corp. Introduction An increasing number of video

More information

RF (Wireless) Fundamentals 1- Day Seminar

RF (Wireless) Fundamentals 1- Day Seminar RF (Wireless) Fundamentals 1- Day Seminar In addition to testing Digital, Mixed Signal, and Memory circuitry many Test and Product Engineers are now faced with additional challenges: RF, Microwave and

More information