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1 Logistics We are here 8 Week If you caot logi to arkus, me your UTORID ad ame. heck lab marks o arkus, if it s recorded wrog, cotact Larry withi a week after the lab. Quiz average: 8% Assembly Laguage Processors Arithmetic Logic Uits Devices ircuits Fiite tate achies Flip-flops After quiz due date, the correct aswers will be show. Ay questios about the completed quizzes, ask o the discussio board or i the office hours. Gates Trasistors Buildig up from gates ultiplexers Logical Devices ome commo ad more complex structures: ú ultiplexers (U) ú Adders (half ad full) ú ubtractors ú Decoders eve-segmet decoders ú omparators Logical devices ultiplexer desig ultiplexer uses ertai structures are commo to may circuits, ad have block elemets of their ow. ú e.g. ultiplexers (short form: mux) ú Behaviour: Output is if is, ad if is, i.e., selects which iput ca go through = + uxes are very useful wheever you eed to select from multiple iput values. ú Example: ú urveillace video moitors, ú Digital cable boxes, ú routers
2 Adder circuits Adders Also kow as biary adders. ú mall circuit devices that add two -bit umber. ú ombied together to create iterative combiatioal circuits add multiple-bit umbers Types of adders: ú Half adders () ú Full adders () ú Ripple arry Adder ú arry-look-ahead Adder (LA) Review of Biary ath Review of Biary ath Each digit of a decimal umber represets a power of : 8 = x + x + 8x Each digit of a biary umber represets a power of : = x + x + x + x + x = Usiged biary additio 7 + arry bit 7 = = carry bit + + Half Adder Iput: two -bit umbers Output: -bit sum ad -bit carry Half Adders A -iput, -bit width biary adder that performs the followig computatios: =? =? Half Adder Implemetatio Equatios ad circuits for half adder uits are easy to defie (eve without Karaugh maps) = = + = xor A half adder outputs a carry-bit, but does ot take a carry-bit as iput. A half adder adds two bits to produce a two-bit sum. The sum is expressed as a sum bit ad a carry bit. 7 8
3 Full Adders Full Adder Desig Full Adder takes a carry bit as iput imilar to half-adders, but with aother iput, which represets a carry-i bit. ú ad are sometimes labeled as out ad i. Whe is, the uit behaves exactly like ú a half adder. Whe is : = + + = xor xor 9 = + ( xor ) For gate reuse( xor ) cosiderig both ad Full Adder Desig The term ca also be rewritte as: = + ( xor ) Two terms come from this: ú = carry geerate (G). Whether ad geerate a carry bit ú xor = carry propagate (P). Whether carry will be propagated to out Results i this circuit à = xor xor G out P Now we ca add oe bit properly, but most of the umbers we use have more tha oe bits. it, usiged it: bits (architecture-depedet) short it, usiged short it: bits log log it, usiged log log it: bit char, usiged char: 8 bits How do we add multiple-bit umbers? Each full adder takes i a carry bit ad outputs a carry bit. Each full adder ca take i a carry bit which is output by aother full adder. That is, they ca be chaied up. Ripple-arry Biary Adder Full adders chaied up, for multiple-bit additio Ripple-arry Biary Adder Full adder uits are chaied together i order to perform operatios o sigal vectors. out Adder i out i is the sum of ad 7
4 The role of i Let s play a game ubtractors Why ca t we just have a half-adder for the smallest (rightmost) bit? Because if we ca use it to do subtractio! out i 8. Pick two umbers betwee ad. overt both umbers to -bit biary form. Ivert each digit of the smaller umber. Add up the big biary umber ad the iverted small biary umber. Add to the result, keep the lowest digits. overt the result to a decimal umber What do you get? ou just did subtractio without doig subtractio! 9 ubtractors are a extesio of adders. ú Basically, perform additio o a egative umber. Before we ca do subtractio, eed to uderstad egative biary umbers. Two types: ú Usiged = a separate bit exists for the sig; data bits store the positive versio of the umber. ú iged = all bits are used to store a s complemet egative umber. Two s complemet Usiged subtractio (separate sig bit) Need to kow how to get s complemet: ú Give umber with bits, take ( -)- ú Negates each idividual bit (bitwise NOT). à à s complemet = ( s complemet + ) à à Kow this! Note: Addig a s complemet umber to the origial umber produces a result of zero. ( s complemet of A) + A =. The s complemet of A is like -A Geeral algorithm for A - B:. Get the s complemet of B (-B). Add that value to A. If there is a ed carry (out is high), the fial result is positive ad does ot chage.. If there is o ed carry (out is low), get the s complemet of the result (B-A) ad add a egative sig to it, or set the sig bit high (-(B-A) = A-B). Usiged subtractio example iged subtractio (easier) iged subtractio example (-bit) 7 carry bit o carry bit + s complemet tore egative umbers i s complemet otatio. ú ubtractio ca the be performed by usig the biary adder circuit with egative umbers. ú To compute A B, just do A + (-B) ú Need to get -B first (the s complemet of B) is is - is ( s complemet of ) - is which is - sig bit is low (positive) sig bit is - high (egative) -
5 iged additio example (-bit) Now you uderstad code better Trivia about sig umbers + is is +: This is -! The supposed result is exceedig the rage of -bit siged itegers. This is called a overflow. 7 #iclude <stdio.h> it mai() { } /* char is 8-bit iteger */ siged char a = ; siged char b = ; siged char s = a + b; pritf("%d\", s); 8 The largest positive 8-bit siged iteger? = 7 ( followed by all ) The smallest egative 8-bit siged iteger? = -8 ( followed by all ) The biary form 8-bit siged iteger -? (all oe) For -bit siged umber there are possible values - are egative umbers (e.g. 8 bit, - to -8) - - are positive umber (e.g. 8 bit, to 7) ad a zero 9 ubtractio circuit Decoders ub Ivert all the digits (if sub = ) -8: (siged) out i If sub =, = + If sub =, = Oe circuit, both adder or subtractor Add, so gettig s complemet What is a decoder? Decoders Demultiplexers Decoder umber umber umber umber rock! good job!.. Decoders are essetially traslators. ú Traslate from the output of oe circuit to the iput of aother. Example: Biary sigal splitter ú Activates oe of four output lies, based o a twodigit biary umber. Decoder A B D Related to decoders: demultiplexers. ú Does multiplexer operatio, i reverse. W -bit iput, ecoded origial iformatio The origial iformatio
6 7-segmet decoder Note ultiplexer: hoose oe from multiple iputs as output Demultiplexer: Oe iput chooses from multiple outputs ommo ad useful decoder applicatio. ú Traslate from a -digit biary umber to the seve segmets of a digital display. ú Each output segmet has a particular logic that defies it. ú Example: egmet Activate for values:,,,,, 7, 8, 9. I biary:,,,,,,,. ú First step: Build the truth table ad K-map. What we talk about here is NOT the same as what we do i Lab I labs we traslate umbers,,,,, to displayed letters such as (H, E, L, L, O, _, E, L, I) ú This is specially defied for the lab Here we are talkig about traslatig,,,,,, to displayed,,,,,... ú This is more commo use segmet decoder For 7-seg decoders, turig a segmet o ivolves drivig it low. (active low) ú (I Lab, we treat it like active high. It s OK because Logisim does autocoversio to make it work). ú i.e. Assumig a -digit biary umber, segmet is low wheever iput umber is,,,,,, or, ad high wheever iput umber is or. ú This create a truth table ad map like the followig 9 7-segmet decoder HE rows missig! HE = + But what about iput values from to? ~ Do t care values ome iput values will ever happe, so their output values do ot have to be defied. ú Recorded as i the Karaugh map. These values ca be assiged to whatever values you wat, whe costructig the fial circuit. HE = + Boxes ca cover x s, or ot, whichever you like. Agai for segmet Agai for segmet The fial 7-seg decoder HE HE Decoders all look the same, except for the iputs ad outputs. Ulike other devices, the implemetatio differs from decoder to decoder. 7-seg decoder HE HE HE HE HE HE HE HE = + HE =
7 omparators (leftover from last week) omparators A circuit that takes i two iput vectors, ad determies if the first is greater tha, less tha or equal to the secod. How does oe make that i a circuit? Basic omparators osider two biary umbers A ad B, where A ad B are oe bit log. The circuits for this would be: ú A==B: ú A>B: ú A<B: A B + A B A B A B A B omparator A B A=B A>B A<B 7 Basic omparators AA BB Basic omparators AA BB omparig large umbers What if A ad B are two bits log? The terms for this circuit for have to expad to reflect the secod sigal. For example: omparator A=B A>B A<B What about checkig if A is greater or less tha B? ú A>B: omparator A B + (A B+A B) (A B) A=B A>B A<B The circuit complexity of comparators icreases quickly as the iput size icreases. For comparig large umber, it may make more sese to just use a subtractor. ú A==B: ake sure that the values of bit are the same (A B+A B) (A B+A B) ake sure that the values of bit are the same heck if first bit satisfies coditio ú A<B: If ot, check that the first bits are equal A B + (A B+A B) (A B) ad the do the -bit compariso ú ubtract ad the check the sig bit. A > B if ad oly if A > B or (A = B ad A > B) 8 9 Today we leared How a computer does followig thigs otrol the flow of sigal (mux ad demux) Arithmetic operatios: adder, subtractor Decoder comparators Next week: equetial circuits: circuits that have memories. 7
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