ASIC = Application specific integrated circuit

Transcription

1 ASIC = Application specific integrated circuit

2 CS 2630 Computer Organization Meeting 19: Building a MIPS processor Brandon Myers University of Iowa

3 The goal: implement most of MIPS

4 So far

5 Implementing the addu instruction register file

6 still need to: support more than 1 kind of arithmetic operation feed the CPU with a program support branches and load/store

7 Next: we ve discussed what is in this box, but we need to learn about the rest of what is needed for a MIPS processor Project 2-1: the stuff in this box Project 2-2: everything else

8 Implementing the addu instruction register file How do we program the addu machine?

9 Peer instruction Give the sequence of addu machine inputs to perform $t0 = $t1 + $t2 + $t3 a) 1 st clock cycle: rd=8, rs=9, rt=10 2 nd clock cycle: rd=8, rs=8, rt=11 b) 1 st clock cycle: rd=0, rs=9, rt=10 2 nd clock cycle: rd=8, rs=0, rt=0 3 rd clock cycle: rd=0, rs=8, rt=11 4 th clock cycle: rd=8, rs=0, rt=0 c) 1 st clock cycle: rd=0, rs=10, rt=11 2 nd clock cycle: rd=8, rs=0, rt=0 3 rd clock cycle: rd=0, rs=8, rt=9 4 th clock cycle: rd=8, rs=0, rt=0 d) 1 st clock cycle: rd=9, rs=10, rt=11 2 nd clock cycle: rd=8, rs=0, rt=0

10 Administrivia Reminder: HW4 due March 30 (Thursday) Project 2 out later this week; you will complete it in phases brief break now for project groups On ICON by April 3, one group member submit to assignment Project 2 Groups add self to a Project 2 group in the People tab

11 How do we program the addu machine? Example: On each clock cycle, we are allowed to change the inputs rd, rs, and rt to perform another addition.

12 But, where do those inputs come from?

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15 CS 2630 Computer Organization Meeting 20: Building a MIPS processor Brandon Myers University of Iowa

16 But, where do those inputs come from? the instruction memory recall the layout of bits in R-type instructions

17 How do we know which instruction we are on?

18 How do we know which instruction we are on? Store the current address in a 32-bit register called the program counter (PC) Add 4 each cycle to go to the next word (next instruction)

19 The complete addu machine

20 Architecture and microarchitecture Architecture also known as ISA, the programmer s interface it includes the things on the MIPS reference sheet: 32 registers, PC, instructions and their behavior (RTL) Microarchitecture an implementation of the ISA we ll examine at least two kinds of microarchitectures for MIPS right now: a single-cycle design where an instruction executes in one clock period later: a pipelined design where an instruction takes multiple clock periods

21 The complete addu machine But, how do we get data into the addu machine? All registers start with the value 0. Let s modify the circuit to include addiu

22 Peer instruction Modify the processor so it also knows how to execute both addiu and addu Assume you have a component called control that takes a MIPS opcode as input and provides a 1-bit signal isaddiu as output. isaddiu = 0 if the opcode is 0x0 (the opcode for addu) isaddiu = 1 if the opcode is 0x9 (the opcode for addiu) opcode control isaddiu bonus: implement the inside of control

23 Addu/addiu machine 1. Look at RTL of addu and addiu. What are the differences? 2. Where do we get the immediate from? 3. Each difference in the RTL can be handled with a MUX Interesting points: there was a 2- cycle solution, too lookup microcode for more information about that kind of design

24 Project 2: MIPS processor Project 2-1 is assigned later today one submission per team team check ins weekly Project 2-1: ALU and register file and tests Project 2-2: datapath and control path of pipelined MIPS processor, tests, and test programs

25 Project 2-1: ALU ALU stands for arithmetic logic unit Notice that the output Equal is different from the Zero? signal from the textbook and lecture examples

26 Project 2-1: ALU Switch plays the same role as the signal ALU control in the textbook. However, mind the differences! Do not bother building your own adder/shifter/comparator! You can use any built-in Logisim component.

27 Project 2-1: testing the ALU You must use a Linux environment to run the tests. Many options for students using Windows computers: a) connect to instructional machines through ssh (using WinSCP) or through fastx.divms.uiowa.edu b) Use the lab machines directly c) Use a Virtual machine d) Use cygwin e) if Windows 10, then enable Ubuntu console For students using Linux or MacOSX computers: use the terminal Ask for help early! There is no excuse to not run the tests.

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29 Administrivia The next three weeks including this week will have lab space for you to work on Project2 with your group! All three sessions are still Wednesday (4/5, 4/12, 4/19) 6pm-7pm but in a different room: 474 VAN (van allen hall). This classroom is "TILE" so you can work at circular tables and there is plenty of room.

30 Logisim hack! Converting truth tables to boolean logic to circuits getting you down? Use Logisim s logic analysis tools! Steps: 1. create a new circuit with just the inputs and outputs (only 1-bit signals are allowed) 2. Project > Analyze Circuit > enter your circuit as a truth table or as a boolean expression 3. Click build circuit, then look at the different representations (truth table, expression, circuit,...)

31 Next steps Add more instructions to our processor: other R and I types (or, ori, subu) load and store (lw, sw) branches (beq/bne) jumps (j, jr, jal) How do we implement the control logic?

32 Addu/addiu machine sign extend

33 How to control the ALU s operation Control unit outputs a control signal ALUOp to tell ALU controller what operation to compute on inputs A and B ALUOp encoding ALUOp Means pick a unique encoding for each operation 00 add 01 subtract 1x R-type, so look at funct to get the operation This ALUOp has 2 bits but you would need more to support all the operations done by I-type instructions Create an ALU decoder unit that uses the ALUOp and the Funct to produce the Switch signal Switch (aka ALUControl) ALUOp A ALUResult ALU ==Zero? B DDCA, 2 nd Ed

34 How to control the ALU s operation Control unit outputs a control signal ALUOp to tell ALU controller what operation to compute on inputs A and B ALUOp encoding ALUOp Means pick a unique encoding for each operation 00 add 01 subtract 1x R-type, so look at funct to get the operation This ALUOp has 2 bits but you would need more to support all the operations done by I-type instructions Create an ALU decoder unit that uses the ALUOp and the Funct to produce the Switch signal ALUControl truth table ALUOp Switch (aka ALUControl) ALUOp Funct Switch (aka ALUControl) 00 x add 01 x sub 1x 0 shift left 1x 1 shift right logical 1x 2 shift right arithmetic 1x A B ALU ALUResult ==Zero?

35 When you just don t care A don t care is where you put an X in the truth table to indicate that it doesn t matter if the bit is a 0 or a 1. X s can drastically simplify the truth table and the resulting combinational logic circuit. Why? The person/tool simplifying the circuit can pick whether a 1 or 0 for the X makes the circuit simpler. Example from your recent experience... What should happen to the Soda Machine FSM when Dime and Nickel inputs are both 1 in the same clock period? If our circuit s behavior is unspecified for a certain input case then we can put X s into the truth table. You can also put X s in the output column an X in the output means that you don t care what the output is for a certain input case if you use Logisim s logic analyzer, be aware that it allows for X s in the output bits but not the input bits Do not confuse don t cares (X s in the truth table) with Logisim s RED wires (i.e., wires where the value has X s in it). Red wires are always bad.

36 Using memory for data Load word DataIn ReadAddr DataOut 32 Store word 32 Data memory WriteAddr WrEnable 1. Draw the Data Memory on the right side of your processor 2. Using the RTL above, add circuitry that is sufficient for executing load word (lw). Assume that you have a 1-bit control signal islw (1 when instruction is a lw, 0 otherwise) 3. Using the RTL above, add circuitry that is sufficient for executing load word (sw). If you need a control signal, just pick a descriptive name. Assume that you have a 1-bit control signal issw (1 when instruction is a sw, 0 otherwise)

37 Control unit truth table Instruction Opcode Regwrite RegDst ALUSrc Branch MemWrite MemToReg ALUOp R-type addiu lw sw beq Here is our ALUOp encoding for reference ALUOp Means 00 add 01 subtract 1x R-type, so look at funct to get the operation