Communication Lab. Assignment On. Bi-Phase Code and Integrate-and-Dump (DC 7) MSc Telecommunications and Computer Networks Engineering

Transcription

1 Faculty of Engineering, Science and the Built Environment Department of Electrical, Computer and Communications Engineering Communication Lab Assignment On Bi-Phase Code and Integrate-and-Dump (DC 7) MSc Telecommunications and Computer Networks Engineering By ATM Shafiul Alam Student Number: (Group Member: Tunde Patrick Addedigba) Supervisor: Dr. Vincent Siyau 4 Dec, 2008

2 Abstract: In telecommunication, a line code (also called digital baseband modulation) is a code chosen for use within a communications system for transmission purposes. Line coding is often used for digital data transport. There are many line encoding methods used in data communications- some of them produce dc components. However, in many systems, the dc component can not be passed from the transmitter to receiver because of clock recovery and synchronization difficulty. Streams encoded in NRZ are affected by the same problem. Using bi-phase code makes synchronization easier by ensuring that there is at least one transition on the channel between every data bit; in this way it behaves much like the Manchester code scheme. The objectives of the assignment are to investigate the bi-phase code system which gives near zero dc components and a strong bit rate component in the spectrum and to investigate the Integrate and Dump method of data retrieval.

3 Table of Content Abstract 1. Introduction 2. Apparatus 3. Important Terminologies 4. Line Coding 5. Description of Encoding Techniques 5.1 Unipolar Non Return to Zero (NRZ) 5.2 Bipolar Non Return to Zero (BNRZ) 5.3 Unipolar Return to Zero (URZ) 5.4 Bipolar Return to Zero (BRZ) 5.5 Bi-phase Code 6. Integrate and Dump 7. Experimental Description 8. Result and Discussion 9. Conclusion 10. References

4 1. Introduction: In order to transport digital bits of data across carrier waves, encoding techniques (commonly known as called line coding) have been developed each with their own pros and cons. This report describes the importance of the encoding scheme, how to generate for transmission and how to receive correctly. 2. Apparatus: 1. DCS297A Data Source 2. DCS297B Data Format 3. DCS297C Double Balanced Modulator 4. DCS297F Data Clock Regenerator 5. DCS297G Data Recovery 6. DCS297H Data Receiver 7. DCS297M Power Supply 8. A Two channel oscilloscope with external trigger 9. Connecting Cables 3. Important Terminologies: Signal element: Pulse (of constant amplitude, frequency, phase). Unipolar: All signal elements have same sign, i.e. either all positive or all negative voltage. Bipolar: One logic state represented by positive voltage and other by negative voltage Mark/Space: 1 or 0. Modulation Rate: rate at which signal level changes; measured in baud = 1/Duration of the smallest element (element per second). Data Rate (Bit Rate): rate of data transmission in bits per second. Clocking: Ease of determining beginning and end of each bit position. 4. Line Coding: The PCM signal is indeed digital, but isn t ready to be transmitted along the channel. Line coding is overcoming some typical problems like: i. The frequency range of a Baseband signal is very low (near to zero, including DC). Such a frequency range isn t suitable for transitions.

5 ii. iii. Many applications require synchronization, therefore the signal should imply when a bit (or a block of bits) starts and ends. We always desire to achieve the narrowest bandwidth possible (due to the cost of filters and signal processing). There are many techniques available for line encoding. The common types of line encoding technique are unipolar, polar, bipolar and Manchester encoding. However, bi-phase technique is the most common, error-free technique for baseband digital modulation. It can be obtained from the NRZ stream by clocking it through some logic circuits with the bit rate clock. This is performed in this experiment using the Data Format Module (the DCS297B module). At the receiver, the bi-phase baseband data can be recovered by using a correlation detector/integrate-and-dump circuit. Line encoding is the method used to represent the digital information on the media.[1] Line coding consists of representing the digital signal to be transported by an amplitude- and timediscrete signal that is optimally tuned for the specific properties of the physical channel (and of the receiving equipment). The waveform pattern of voltage or current used to represent the 1s and 0s of a digital signal on a transmission link is called line encoding. For reliable clock recovery at the receiver, the maximum number of consecutive ones or zeros is bounded to a reasonable number. A clock period is recovered by observing transitions in the received sequence, so that a maximum run length guarantees such clock recovery, while sequences without such a constraint could seriously hamper the detection quality. After line coding, the signal is put through a "physical channel", either a "transmission medium" or "data storage medium". Unfortunately, most long-distance communication channels cannot transport a DC component. The DC component is also called the disparity, the bias, or the DC coefficient. The simplest possible line code, called unipolar because it has an unbounded DC component, gives too many errors on such systems. Most line codes eliminate the DC component - such codes are called DC balanced, zero-dc, zero-bias or DC equalized etc. Line coding should make it possible for the receiver to synchronize itself to the phase of the received signal. If the synchronization is not ideal, then the signal to be decoded will not have optimal differences (in amplitude) between the various digits or symbols used in the line code. This will increase the error probability in the received data.[2] 5. Description of Encoding Techniques: 5.1 Unipolar Non Return to Zero (NRZ) 0 is represented by 0 volts 1 is represented by a +V volts or V volts

6 The problem with this is that it is difficult to distinguish a series of '1's or '0's due to clock synchronisation issues. Also, the average DC voltage is 1/2V, not 0 volts so there is high power output (some electrical components (e.g. capacitor) need constant change in voltage). 5.2 Bipolar Non Return to Zero (BNRZ) 0 is represented as negative voltage level (-V volts) 1 is represented as positive voltage level (+V volts) This code is similar to the previous one. It handles the DC component issue, meaning the average voltage level is 0. It still has the synchronization problem. 5.3 Unipolar Return to Zero (URZ) 0 is represented by 0 volts 1 is represented by +V volts for half the cycle and 0 volts for the second half of the cycle. This means that the average DC voltage is reduced to 1/4V plus there is the added benefit of there always being a voltage change even if there are a series of '1's. Unfortunately, the efficiency of bandwidth usage decreases if there are a series of '1's since now a '1' uses a whole cycle.

7 5.4 Bipolar Return to Zero (BRZ) 0 is represented by -V volts for half the cycle and 0 volts for the second half of the cycle. 1 is represented by +V volts for half the cycle and 0 volts for the second half of the cycle. The signal is self-clocking. This means that a separate clock does not need to be sent alongside the signal, but suffers from using twice the bandwidth to achieve the same datarate as compared to non-return-to-zero format. 5.5 Bi-phase Code: The bi-phase code is a type of encoding for binary data streams. When a binary data stream is sent without modification via a channel, there can be long series of logical ones or zeros without any transitions which makes clock recovery and synchronization difficult. Streams encoded in NRZ are affected by the same problem. Using bi-phase mark code makes synchronization easier by ensuring that there is at least one transition on the channel between every data bit; in this way it behaves much like the Manchester code scheme. When encoding, the symbol rate must be twice the bit rate of the original signal. Every bit of the original data is represented as two logical states which, together, form a bit. The form of the bi-phase code is that: (i) it undergoes a transition in the mid-position of the symbol. (ii) the direction of the transition is determined by the polarity of the original symbol say a V to +V transition for a 0 and +V to -V transition for a 1. In bi-phase coding, output the logical 1 and 0 are represented with the same voltage amplitude but opposite polarities, as shown in the following figure:

8 Bi-phase coding provides a better synchronization since there is a change in the polarity at least every two bits. It is not necessary to know the polarity of the sent signal since the information is not kept in the actual values of the voltage but in their change: in other words it does not matter whether a logical 1 or 0 is received, but only whether the polarity is the same or is different from the previous value; this makes synchronization even easier. Finally, biphase coded signals have zero average DC voltage, thus reducing the necessary transmitting power and minimizing the amount of electromagnetic noise produced by the transmission line. All these positive aspects are achieved at the expense of doubling clock frequency. 6. Integrate and Dump: The traditional integrate-and-dump circuit is shown in the figure below. In this simple implementation, an op amp is used with capacitive feedback to create an integrator with a response Thus, as shown in circuit timing figure, the response to a step of current id is a negative ramp at the amplifier output Va. At the end of each bit, a short clock pulse CLK is used to reset the integrator for reception of the next bit.

9 Integrate & Dump Circuit S 1 Multiplier C F Bi-phase Data R Input S 1 V out Clock Figure- Correlator and Integrate-and-Dump Circuit Figure- Circuit timing

10 7. Experimental Description: The following figure shows the block diagram of the bi-phase system: TRANSMITTER Data Source (Module A) Data Format (Module B) Data Clock Regenerator (Module F) Double Balanced Modulator (Module C) RECEIVER Data Recovery (Module D) Data Receiver (Module H) Figure: Block diagram of the bi-phase system. After setting up the equipments properly with external trigger, we get the outputs from the Data Format Module for three different data sequences. We also observe the outputs of the Data Format Module for different encoding techniques (such as UNRZ, BNRZ, URZ, BRZ, and Bi-phase). The outputs of the module together with clock signal are given in the next page. 8. Result and Discussion: In our experiment, we use the following sequences of data: From the graphs, we see that there is a presence of dc component for NRZ and RZ outputs for a sequence of 1 s or 0 s, i.e. lack of synchronization capability whereas in bi-phase coding, there is no dc components as there is one bit transition per bit. Hence, it can easily be synchronized on mid bit transition (self clocking). However, the maximum modulation rate of the bi-phase scheme is twice that of NRZ, so more bandwidth is required. Now the output of the Data Format module is connected to the Data Clock Regenerator through link 7 and 8, which use as transmission medium. The receiver has two paths: the timing extraction and the data path.

11 The timing path includes a decision circuit (comparator) which slices the signal in half to give reasonable pulses for the differentiator and PLL. This is accomplished on the Data Regenerator Module. The PLL picks out the 160 khz component in the signal and locks onto it. This is divided by two to give the 80 khz clock. If the original clock and the regenerated clock are out of synchronization, the comparator circuits in the timing module detect this due to transitions appearing where there should not any, so the logic circuits reverse the phase after this. The data recovery is achieved with the aid of the Double Balanced Modulator unit. The incoming bi-phase data is multiplied by the bit clock give a NRZ signal. The bit clock or the data have to be delayed slightly meaning that they are appropriately synchronized. The output of the modulator contains some spikes. Now, this signal is fed into the Data Recovery Module for the duration of the pulse period which includes an integrate-and-dump circuit which actually make the decision of the pulse (either 0 or 1). At the output of the Data Recovery Module is exactly the same of the data sequence that we input the Data Source Module. 9. Conclusion: From the above experimental description with considering signal spectrum (lack of dc components, concentrate power in the middle of the bandwidth), clocking (synchronizing transmitter and receiver), and cost and complexity (higher signal rate lead to higher costs), we can conclude that bi-phase encoding technique is the efficient technique for digital baseband transmission, although it has some downside.

12 10. References: [1] [2] [3] Stallings, William, Data and computer communications, 8 th Edition, Upper Saddle River, N.J. : Pearson/Prentice Hall. [4]- Proakis, John G., Digital communications, 3 rd Edition, New York: London: McGraw-Hill. [5]- Glover, Ian, Digital communications, London: Prentice Hall. [6]- Roddy, D., Coolen, J., Electronic communications, 4 th Edition, Englewood Cliffs, N.J. : Prentice Hall ; London : Prentice Hall International. [7] Eslami, Mansour., Analog and digital circuits theory and experimentation. Vol. 2, Original edition. Malabar, Fla. : R.E. Krieger Pub. Co. [8] Roden, Martin S., Analog and digital communication systems, Englewood Cliffs, N.J. ; London : Prentice-Hall.