AVI ASCII INTERFACE PANEL (OPTION #2) \NABCC SERVICE MANUAL 6042 B ...

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1 .. \NABCC An American-Standard Company SERVCE MANUAL 642 B AV ASC NTERFACE PANEL (OPTON #2)..... May, 98 A UNON SWTCH & SGNAL DVSON WESTNGHOUSE AR BRAKE COMPANY Swissvale, PA 528

2 WABCO CONTENTS Section V GENERAL. PURPOSE.2 GENERAL DESCRPTON.3 NDCATONS OPERATON 2. THEORY OF OPERATON (Basic) 2.2 ASC NTERFACE PROGRAMMNG 2.3 THEORY OF OPERATON (Detailed) 2.4 ASC WRE WRAP PANEL CONNECTONS 2.5 ASC OUTPUTS STATUS BTS NSTALLATON 3. MOUNTNG 3.2 NTERCONNECTONS TROUBLESHOOTNG Page /2 3-/2 3-/'2 4- v. 4. BASC TROUBLESHOOTNG Special Equipment Preliminary Set-Up Basic Diagnostic Procedure DETALED TROUBLESHOOTNG ncorrect Key On Operation ncorrect Transmit ndication No Output At Terminal rncorrect or No Data At Terminal ncorrect Format At Terminal 4-26 DRAWNGS AND PARTS LST 5-/2.. ii

3 SECTON GENERAL. PURPOSE The purpose of the ASC nterface Panel, when used in conjunction with the basic AV Decoder Logic Unit, is to provide a means to output AV data from the basic Decoder Logic Unit in a standard ASC code format, compatible with teletype or other serial interface devices (CRT's etc.). The ASC nterface Panel has the optional capability to generate the necessary characters (carriage return, line feed and spaces) to allow the AV data from a given train to be outputted to a terminal device in a readable format..2 GENERAL DESCRPTON The ASC nterface Panel N provides an interface from the Decoder Logic Panel N to an ASC Communication Channel. This ASC interface is constructed of CMOS integrated circuits on a 6 position wire wrapped panel. t interfaces with the decoder drawer via 26 conductor flat cable connections and is designed to fit into a basic AV Decoder Logic Unit. Outputs to the communications channel, via opto-isolators, are provided for 2 milliampere current loops for teleprinters and EA RS232-C data interfaces. External power sources are necessary for these interfaces. nformation outputted from the ASC can be programmed via jumpers to include:. Spaces between various digits and between various data words. 2. Line feed and carriage returns to control a teleprinter. r 3. Selectable bit rate from 75 through 9,6 baud. 4. Odd, even, fixed or no parity bits. These jumpers are located in positions Al7, A22, and A27 on the interface panel. The interface also includes two LEDs, KEY ON and TRANSMT, that indicate when the device is in operation. Provisions have been incorporated into the design to allow for future adaptation to a memory system. n addition, a non-formatted output (Data Only) is available. 642-B, p. -

4 WABCO.3 NDCATONS The label on the inside of the cover of the Decoder Logic Unit type N (Figure -) shows the location of two (2) LEDs. The TRANSMT LED is lit when the ASC panel is outputting data. The KEY ON LED is lit when the track circuit is occupied and also when the track circuit is unoccupied and the ASC panel is still outputting data. The KEY ON LED will be lit constantly when the optional constant key on jumper is selected in location A B, p. -2

5 AV ASC CONVERTER JUMPER OPTON DESGNATONS J6 J7 O"',!:::,, N t:rj to -' w...,:::,, Location A 7 - Message Parity - 6 Odd Parity 2-5 Parity Generator Output 3-4 Parity Bit = Mark 4-3 Parity Bit = Space 5-2 Parity = 8th Bit 6 - Constant Key On 7 - nhibit Bits/Sec. 8-9 Bits/Sec. Location A22 - Output Frequency Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec. Location A27 - Format - 6 Sign Per Line Format Signs Per Line Formal Signs Per Line Formal Output 6 Digits 6 - Space Alter Digit Suppress Spaces 8-9 Formatted System Figure -. TRANSMT [:] KEY ON J6 """'SEE TAB. D A7 ASC NTERFACE PANEL UN D A22 D A27 J7 N r l...i ERROR GOOD MESSAGE O MESSAGE CARRER DETECTOR O O TRACK CAB O O KEY ON SGNAL BG3 DECODER UN Decoder Logic Unit Major Component Location POWER SUPPLY UJ AC AC - + TWSTED PAR o. LEDi 3 TEST RECEVER j WTWSTED PAR RECEVER U , 8

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7 WABCO...,... SECTON OPERATON 2. THEORY OF OPERATON (Basic) The ASC interface converts the AV message data, stored in the decoder shift register, into ASC characters and serially outputs the ASC characters to a terminal device. A block diagram is shown in Figure 2-. This interface is controlled via signals from the basic decoder N When valid message data is received and decoded at the decoder, either a Good or Error Message indication is forwarded to the ASC device. When a Good Message indication is received by the priority register, the twenty-eight data bits (DBl through DB28), from the decoder are dumped into the data register by a Load Msg signal, and a Cycle Output signal is generated to enable the transmit control logic. The transmit control logic dumps the first four bits of data from the data register into the ASC output register, along with a 4 bit formatting character from the format generator, to produce the 8 bit ASC character. The data is shifted out of the ASC register at a rate determined by the baud rate counter. This rate is selectable from 75 through 96 baud via program jumpers. ASC start and two stop bits are automatically added. After data is dumped from the data register to the ASC output register, the scan counter is advanced one count, gating the next group of 4 data bits out of the data register, When the first ASC character has been shifted out of the ASC register, the next character is immediately loaded into the ASC register from the data register for transmission, The scan counter is then advanced one count more. After all of the 7 characters (4 bits each) have been transferred from the data register to the ASC register, the Cycle Output signal is removed and data transmission is terminated when the ASC register is emptied of the last character. The Good Message indication is also cleared and the interface is enabled to accept additional data from the decoder when available. When an Error Message indication is received by the ASC interface from the decoder, the data bits are not dumped into and out of the data register. The Error Message indication causes the priority register and format generator to dump the ASC character equivalent to an equal sign"=" into the ASC output register in place of the seven characters of invalid data. This equal sign character is interpreted as a message received in error at the decoder. 642-B, p. 2-

8 WABCD The Format Generator also generates three additional characters which are useful in arranging hardcopy printout on the terminal device. These characters are:. Space 2. Carriage Return 3. Line Feed Spaces can be inserted after the first two digits of a message (route number) and between the four digit car number and the status character. They may also be completely eliminated from a message printout. Formatting of these spaces is controlled via programming jumpers. Carriage return and line feed characters can also be used to format data on the terminal device. The format generator contains a counter that counts the number of messages printed out per line in a formatted system. This counter can be programmed, via jumpers, to format between one and seven messages on one line of printout, automatically inserting a carriage return after the set number of messages. When multiple messages are outputted on a line, 3 spaces are inserted after the end of each message to physically separate the hardcopy printout of each message. n addition, in a formatted system, the input from the track circuit interface on the decoder to the ASC interface will generate a carriage return and line feed whenever the track circuit is occupied and also when the track circuit is unoccupied. This produces a blank line between a group message from one train and the next. Unoccupying of the track circuit generates an additional ASC character, End Of Transmission (EOT), to indicate the end of data from one train. This EOT character is non-printing on the terminal device, but it can be used by an ASC compatible interface to a computer terminal to indicate end of data. When using an ASC compatible computer terminal, a non-formatted system is generally recommended. The non-formatted data consists of only ASC characters for the message data, without any special formatting characters such as carriage return, line feed and spaces. These "control" characters are more easily serviced by the intelligence in the computer itself. The EOT character is available as a terminator to indicate end of data for a particular sequence of signs. The track circuit input also controls a Key On indication which may be used to control a data set, turning on the carrier device whenever the track circuit is occupied and turning it off whenever the track circuit is unoccupied. The carrier equipment may be keyed on constantly by a jumper option in location Al B, p. 2-2

9 DATA FROM DECODER 28 BTS,r SCAU COUNTER... DATA REGSTER.. COUNTER - CLOCK BAUD RATE BAUD 53.6 KHz._ SELECTOR RATE... - TilNG LOGC MSTR..... OUTPUT SHFT TRANSMT., ASC... OUTPUT REGSTER DATA... OPTCAL COUPLER E xternal A SC 'B USS.. EXTERNAL CONTROL NPUTS EXTERNAL... CONT!lOL REGSTER F FORMAT LOGC O' N trj.. i-o. N w.. GOOD MSG.... PRORTY ERROR SG REGSTER TRACK.... Figure 2-. u CYCLE_ OUTPUT'" TRANSMT CONTROL KEY-ON... OPTCl\.L ASC nterface Panel Block Diagram T COUPLER --+, 8

10 WABCO 2.2 ASC NTERFACE PROGRAMMNG The ASC interfaces incorporates an area in location Al?, A22, and A27 that provides a means of programming the format, output baud rate and message parity of the ASC data. The formatted system is engaged by adding a jumper between location A27, pins 8 and 9. With this jumper installed, the remaining jumpers in location A27 provide the various formatting functions. Jumpers installed in A27, pins to 6, pins 2 to 5, and pins 3 to 4, provide a means of formatting between one and seven signs per line of printout. The jumper between A27, pin 5 and pin 2, will suppress the output of the status digit when installed. Note: (Format XX [] XXXX, X indicates a digit,[] indicates a space). The jumper installed in A27, pins 6 and, will place a space before the status digit output. (Format xx[] xxxx[]x.} The jumper installed in A27, pins 7 to, will suppress all spaces. (Format: XXXXXXX.) These jumpers may be used in any combination to produce the required format. When a jumper is not installed in A27, pins 8 to 9, the output will not be formatted. Line feeds, carriage return and spaces will be automatically suppressed and data will be outputted as a continuous string of digits. However, note that the jumper A27, pin 5 to pin 2, will still be effective, allowing the suppression of the status word transmission. The jumpers in location A22 provide the means of selecting output baud rates from 75 bits/sec. to 96 bits/sec. n addition, the jumper in Al7, pin 8 to 9, will select bits/ sec. Only one of these baud rate select jumpers must be installed at any time. Also, when NOT using the bit/sec. output rate, a jumper MUST BE NSTALLED in Al?, pin 7 to pin, to inhibit the Hz circuit operation; otherwise, improper operation of the output frequency generator will occur. The remaining option available in location Al7 is concerned with the parity bit control of the ASC data word. 642-B, p. 2-4

11 A jumper installed in location Al7, pin 2 to 5, will insert a parity generator on the eighth bit input to the ASC output register. This generator will then calculate an even parity bit from the first seven bits of ASC data available on the data buss. f an additional jumper is installed in location Al7, pins to 6, the parity generator will calculate an odd parity bit for the ASC word. Three other parity options are available. A jumper installed in Al7, pins 3 to 4, will cause the eighth ASC bit {parity bit) to be a MARK. A jumper installed in Al7, pin 4 to 3, will cause the parity bit to be a space. A jumper installed in Al7 pin. 5 to 2, will connect the parity bit input of the ASC ' output register to the Bit 8 line on the ASC data buss. One of the message parity options must be installed for proper operation of the ASC nterface. A jumper installed in Al7, Pin 6 to will cause the data set output to be keyed on constantly. ASC nterface Jumper Option Designations Location Al7 - Message Parity - 6 Odd Parity 2-5 Parity Generator Output 3-4 Parity Bit= Hark 4-3 Parity Bit= Space Parity= 8th Bit Constant Key On 7 - nhibit Bits/Sec. 8-9 Bits/Sec. Location A22 - Output Frequency Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec Bits/Sec. Location A27 - Format - 6 Sign Per Line Format Signs Per Line Format Signs Per Line Format Output 6 Digits 6 - Space After Digit Suppress Spaces 8-9 Formatted System 642-B, p. 2-5

12 WABCC 2.3 THEORY OF OPERATON (Detailed) (Refer to Figures 5-, 5-2, and 5-3) The AV nterface is controlled by and receives data from the AV Decoder Logic Panel N The basic control signals received by the ASC nterface are: *NOTE: TRAK, MASTR, TEST, GMST, AND EMST n the following explanations, gates are defined by location and output pin number. TRAK is a logic level signal whenever the track circuit activating the AV decoder is occupied. MSTR is a logic O pulse generated by the decoder when power is first applied to the equipment. ts function is to reset the ASC nterface upon power turn on. TEST is a logic level whenever the decoder is in the test mode. TEST inhibits the ASC device from outputting the test messages provided in the decoder to keep xtraneous data from being transmitted. GHST. and EMST are logic O pulses that indicate a good or error message has been received by the decoder and data is available for transmission. Twenty-eight bits of data are transferred to the ASC device upon receipt of GMST. The ASC device develops several timing pulses to synchronously control data flow, based upon the input from the decoder. This timing is controlled by the baud rate generator and timing logic Cs Al3, Al4, Al8,. A2, A23 and A24. A 53.6 KHz squarewave input from the decoder on pin BJ2-ll is divided down by the binary counter Al8 to produce frequencies from 96 to 75 Hertz. One of these frequencies can be selected via program jumpers (Location A22) to provide the proper frequency of operation at the required output baud rate. NAND gate A23 and dual D flip-flop C24 provides a.hertz output by dividing the input clock by 396. When the Hertz output is not selected, the program jumper in location Al7-7 to Al7- must be installed to inhibit operation of C24. Otherwise, improper operation of the binary counter C8 will result, producing an incorrectly timed clock frequency. This occurs because the output of counter Al8 is decoded by A23 after 698 counts to set flip-flop A24, pin (one-half cycle of a Hertz squarewave is 698 counts). A24, pin 2, resets the counter via gate Al4, pins and 3, causing the counter Al8 to again count from zero to 698 for the next half cycle. f the jumper is not installed in Al7-7 to Al7-, the Hertz generator is enabled constantly. The reset signal from A24, pin 2, will reset the counter Al8 every 698 counts, causing the lower frequency outputs to be disabled. When the jumper is installed in Al7-7 to Al7-, the flip-flop A24 will not be 642-B, p. 2-6

13 WABCC...,. set after 698 counts, the reset to counter Al8 will be inhibited, allowing it to divide and count properly. f data is not available for transmission, the Baud Rate Clock signal is inverted and gated via NAND/NOR gates A2, pins 3 and 4 (as Transmit Clock} and A3 to the clock enable flip-flop A8, pin. The Transmit Clock generates a Clock Enable signal on its positive edge and causes an overlapping clock and clock 2 pulse to be generated on the next two cycles of the KHz clock. (See Figure 5-4, Timing Diagram.} ti/hen Clock 2 occurs, the clock enable flip-flop is reset, and clock and clock 2 are reset on the next two cycles of the 53.6 KHz signal. These two clocks (clock and clock 2), along with clock enable, produce three independent clock signals that are used to synchronize the operation of the ASC nterface. The ASC nterface commences operation when the track circuit is occupied (Refer to Figure 5-4, Timing Diagram.} Receipt of a logic TRAK input at BJ2-5 generates an 8 millisecond logic O going KEY+ TRAK pluse, which sets the occupy flipflop (B3, pin 2} on its trailing positive going edge. The track input is also inverted and sets a flip-flop A3-3 that produces an Enable Key pulse from A3, pin 3. Enable Key immediately generates a Key On signal that turns off the optical isolator Al-5, allowing the external Key On signal to go to EA + volts, keying on any attached data set. Note that the key on is immediate, while the occupy flip-flop is set 8 milliseconds later. This delay allows the carrier equipment to stabilize. When the constant Key On jumper option is used, the optical isolator Al-5 is held off by the input on A2, Pin 5. Track Occupancy - Formatted System f the ASC nterface is configured in the formatted mode by installing a jumper in location A27-8 to A27-9, the CR flipflop B25-5 is set on the next positive (leadingdge} of clock after the occupy flip-flop is set. The CR signal is fed via inverter B26, pin 6, to the priority encoder C B24, that encodes the input D6 into an octal 6 (} on its output (QC B24, pin 6, most significant digit} and also sets the cycle output signal B24-4 to a logic. The octal 6 outputs on QA to QC of the priority encoder are fed into a decoder C-B23, that decodes the octal number 6 and outputs a logic on its "6" output B23, pin 7. The output of the decoder chip drives two lines ENCR + LF and ENCR and LF + EOT, that enable two groups of four tri-state, non-inverting gates (via Bl6, pin and Bl7, pin }. These gate array loads the eight bit ASC character for a line feed on the tri-state ASC data buss lines, Bit through Bit B, p. 2-7

14 WABCD The Cycle Output logic signal from B24, pin 4, is fed via the Xl input and Zl output on the quad and/or select chip A3 to the transmit flip-flop (A8, pin ). On the next positive edge of the Transmit Clock (logic O edge of Baud Rate Clock), the transmit flip-flop is set (A8, pin 5) and the output cycle is initiated. Before the output is initiated, the count down counter Al9 is held reset by the transmit flip-flop. The CO output (pin 2) is at a logic. mmediately after the transmit flip-flop is set and'the reset to the Counter Al9 is removed, the logic state of CO and the logic O level of the Baud Rate Clock at pin 6 of Al9 cause the counter to be preset to a count of. CO then immediately goes to a logic O, generating a two microsecond Dump Pulse from single shot All, pin 6. This Dump Pulse loads the data from the 8 bit ASC data buss into the output shift register A6 and the "start bit" (space) into flip-flop A7, pin 5. The transmit flip-flop also enables gate Al4, pin 3, allowing the Baud Rate Clock to produce a Shift Clock that moves the data out of the shift register at the selected baud rate. The Transmit signal also gates the data out to the optical isolators in a manner that when the transmit flip-flop is reset, all serial data lines are marking. Note that Clock Enable, Clock and Clock 2 are inhibited by gate A3, pin 4 on the cycle of Transmit Clock when the transmit flip-flop is first set (after start is logic, but Transmit is still a logic ). This prevents extra clocks from skipping over the first word of data. As data is being shifted out of the shift register A6, logic l's are shifted in. After nine shift clock pulses, all ASC data bits are shifted out and the logic shifted through the register appear as the ASC stop bits. After eleven shift clock pulses have occurred, the count counter has counted down to zero, causing the CO output Al9, pin 2, to go to a logic. This CO signal gated with Transmit through NANO/NOR gates A2, pins 3 and 4, generates a logic Transmit Clock pulse. The Transmit and Transmit Clock signals are gated through the AND/OR select gates X2 and X3 inputs and generate Clock Enable and Clock and Clock 2 pulses. With the CR flip-flop B25, pin 5, set, clock and Empty combine through gate B27, pin 3, to set flip-flop B3, pin 5. This flip-flop through XOR gates B2, pins 3, 2, and 3, changes Bits through 3 of the ASC data buss producing the ASC character for a carriage return on the ASC data buss and also generates a reset through gates B22, pin 2, and B27, pin 3, that resets the occupy flip-flop via B3, pin B, p. 2-8

15 Since the CR flip-flop is still set, the Cycle Output signal from the priority encoder B24 and the Start signal remain at a logic, and the transmit flip-flop remains set. When the Baud Rate Clock goes to a logic O, the CO output of the count counter Al9, presets the counter to and CO then goes to a logic, generating another Dump pulse from single shot All, pin 6. The ASC character for carriage return is dumped into the output shift register A6 and this character is shifted out of the output register. When the count Counter Al9, has again counted down to zero (CO goes to logic ), indicating that the carriage return character has been outputted, another Transmit Clock, Clock Enable, Clock and Clock 2 are generated. Clock, in conjunction with flip-flop B3, pin 5, resets the CR flip-flop B25, pin 5, removing the CR input to the priority register. The Cycle Output and Start signals go to a logic O and the priority encoder output goes to (octal). The decoder B23 "6" output then goes to a logic O (the unused zero output goes to a logic ) removing the logic OEN CR+ LF and EN CR+ LF + EOT signals from tri-state gates Bl6 and Bl7, pin. With all of the tri-state gates disabled, the ASC data buss is tied to a logic level through look resistors in Al, and no data appears on this buss. When CO goes low, producing a Dump Pulse, all l's are loaded into the ASC output register A6. The logic O Start and Dump Pulse combine through gates A29, pin 4, and A3, pin 3, to produce a reset signal at pin 2 of the transmit flip-flop A8. The transmit flip-flop resets, ending the transmission and the output lines are held in the marking state. The reset signal at A3, pin 3, also attempts to clear the TRAK flip-flop A3, pin 3; it cannot since the track circuit is still occupied and TRAK is still logic O. The next logic O edge of the Baud Rate Clock generates a Transmit Clock and Clock and 2, to reset flip-flop B3, pin 5. The ASC nterface is now available to accept another input from the decoder. f the format jumper is removed from A27, pin 8, to A27, pin 9, the ASC nterface will not generate line feeds and carriage returns. A logic from gate B27, pin 4, holds the CR flipflop reset, preventing the priority encoder B24 from receiving the CR input. 642-B, p. 2-9

16 WABCCJ Data Transmission - Good Message Refer to Figures 5-5 and 5-6, Timing Charts. After a valid message has been received and decoded by the AV decoder card and data is available for transmission, the decoder outputs a logic GMST (Good.Message Strobe) pulse to the ASC nterface. f the ASC nterface is not currently processing a message, both the good and error message flip-flop BlO are reset and the NO MSG signal B2-4 is a logic. The G.MST signal on BJ2-8 sets the Good USG flip-flop Bl- whenever the Clock Enable-Clock 2 cycle is not occurring, via gate A2-6. As soon as the Good MSG flip-flop becomes set, the No HSG signal goes to a logic O, preventing any further message input from being accepted until after the current message has been processed. Since No MSG was initially a logic, the scan counter BlS was reset and the empty signal Bl5, pin 2, is a logic. The Good MSG flip-flop generates a 2 microsecond Load MSG pulse through single shot All, pin, that together with EMPTY Bl4, pin 2, strobes the 28 bits of message information into the data registers B2, 3, 4, 6, 7, 8, 9. These data registers have tri-state outputs and are sequentially strobed by the scan counter to output the data in seven groups of four bits each. The output of the Good MSG flip-flop BlO, pin, is fed to the priority encoder B24, Dl input, that produces a logic at the output of the decoder B23, pin. The decoder output generates a logic O NUMBERS signal at Bl8, pin 2, and a logic O ERROR+ NUMBERS signal at B22, pin 3. ERROR+ NUMBERS enables the Scan Counter Bl5 and NUMBERS, together with one of the outputs of the Scan Counter, enables the first 4 bit data register B4. Since the data is in complement BCD form (BCD), the data from the digits is fed to tri-state inverter Bl3, before being tied to the first four bits (Bit through Bit 4) of the ASC data buss. The ERROR + NUlBERS signal enables gates Bl6, Bl 7, pin 5, to generate the numbers mode character on Bits 5 through B8 of the ASC buss. The ASC buss has the first BCD character on the first four bits (Bit Bit 4). and on Bits 5 through Bit 8. The Cycle Output signal from the priority encoder B24 generates a Start signal and on the next cycle of the transmit clock, the transmit flip-flop is set and a Dump pulse is generated in the same manner as discussed previously under "Track Occupancy". Note that the Enable Clock, Clock and Clock 2 cycle is inhibited on the transmit clock cycle during which the transmit flip-flop is set. Since Clock 2 does not occur during this cycle, the scan counter remains in the first count (QO output is a logic ), enabling the first data register B4. After the transmit flip-flop is set, the Shift Clock is enabled and the data is shifted out of the Shift Register A6, to the terminal device. When the CO output goes positive after 642-B, p. 2-

17 WABCO 'V"Av"'" counts of counter Al9 and a Transmit Clock, Clock Enable, Clock and Clock 2 cycle is generated, the Scan Counter is advanced by one count and the second group of BCD data is placed on the ASC buss from B9. When CO goes to logic O, a Dump pulse is again produced, loading the next data word into the ASC output register A6. The transmission cycle continues with the seoond ASC character. The Scan Counter Ql output is now a logic, generating a logic Space signal through gates B2, pins 2 and 3, provided a jumper is not inserted in A27, pin 7, to A27, pin {which disables space). When the next Clock pulse occurs after the second data word is outputted, the Space input flip-flop B25, pin, is set, producing another input to the priority encoder that generates the ASC character for space. Note that both the Space input and Good MSG signals are present at the inputs to the priority encoder B24. This priority encoder chip operates in a manner that a higher number input has priority. The Space input is connected to input D4, while Good MSG is connected to Dl. Therefore, the priority encoder generates an octal 4 output {) that enables the 4 output of the decoder B23 and disables the output. Since the output is removed, the NU.HEERS and ERROR+ NUUBERS signals go to a logic, disabling the tri-state output of the data registers and inverter Bl3. The scan counter is also disabled, preventing it from advancing on the following Clock 2 pulse. The 4 output of the decoder B23 generates logic OEN SPACE signal at Bl2, pin, and also holds tri-state gates Bl6 and Bl7 on, through pin 5, producing an ASC character for space on the data buss. When _CO again goes low, the Dump pulse loads the space character into the ASC register for transmission. After the space character is transmitted, another Clock pulse is generated that resets the Space input flip-flop B25, pin. The Space input is removed from the priority register and decoder, and the NUMBERS and ERROR+ NUMBER return to logic O. Clock 2 advances the Scan Counter Bl5 one count, (Bl5, pin 3, is a logical ) and the next BCD character is placed on the ASC data buss. The transmission process continues and the remaining characters are loaded and shifted out. An optional space may be included after the 6 digit and before the status bits are loaded by placing a jumper in A27, pin 6 to A27, pin. After all of the characters have been transmitted out, Clock 2 causes the scan counter Q7 output Bl5, pin, to go to a logic, generating a logic zero LAST DGT pulse at gate B2 pin 3. This LAST DGT pulse triggers a two microsecond single shot that resets the good message flip-flop through gate Bl9, pin 2,removing the good message input from the priority 642-B, p. 2-

18 WABCO encoder. The No MSG signal goes high, enabling the good and error message flip-flops and resetting the scan counter BS, permitting the interface to accept another message. The Last Digit single shot A2, pin 6, also clocks the message per line counter A28, sets the space flip-flop B25, pin, and resets the divide by 3 counter B29. The space input flip-flop and 7 3 counter B29 cause a space to be outputted for 3 character times. This produces three spaces after each message on the terminal device, separating the message. When the last space has been outputted, the space flip-flop is reset by Clock. Since there is no input to the priority register, the Cycle Output and Start signals go to logic zero, the transmit flip-flop is reset by the nexc Dump pulse, and data transmission ceases. This.process is repeated completely for every message received. The message per line counter, A28, is programmable via jumpers in A27 to output from to 7 messages per line. When this counter reaches a count of zero, the Line Full signal goes to a logic, presetting the Occupy flip-flop B3, pin 2, and resetting Space flip-flop through gate B22, pin 3. Therefore, a line feed and carriage return is generated after the message instead of three spaces. f an error message is received from the decoder, the Error!BG flip-flop BlO, pin 5, is set and an Error MSG signal is sent to the priority encoder input D2 that generates an EN ERROR signal from the decoder. The ASC character for an equal sign"=" appears on the ASC data buss Bit through Bit 8. The ERROR+ NUUBER signal also goes to a logic zero, enabling the Scan counter. However, data is not loaded into the data register (B2, 3, 4, 6, 7, 8, 9). The ASC "=" character is loaded into the ASC output register and transmitted out. Timing is otherwise the same for a good or error message. Spaces, line feed and carriage returns are inserted where applicable, since the scan and message per line counters are functioning. Track Unoccupy - Formatted System When the track circuit becomes unoccupied, the TRAK input to the ASC nterface goes to a logic O, setting the Unoccupy flip-flop B28, pin. When the Empty line is a logic, indicating that a message is not being outputted, the next Clock pulse sets both the CR flip-flop B25, pin 5, and the EOT flip-flop, B28, pin 5. The CR and EOT signals are both fed to the priority encoder. Since CR is connected to a higher priority input, a line feed and then a carriage return are outputted by the ASC device. After completion of the carriage return character, the EOT signal causes the ASC end of transmission character to appear on the ASC buss. After this character is dumped into and transmitted out of the ASC data register, the next Clock cycle resets the EOT flip-flop. With no further input to the priority 642-B, p. 2-2

19 encoder, Cycle Output and Start go to a logic O. When the Dump pulse occurs, the transmit flip-flop is reset because of a logic O Start signal input to gate A29, pin 4. Since TRAK is a logic, the signal at A3, pin 3 that resets the Transmit flip-flop, also resets the TR.AK flip-flop A3, pin 3. The Key On signal is removed and the data set key output optical isolator turns on, disabling the data set if the constant Key On option is not selected. No further data transmission will occur until the track circuit is reoccupied. WABCO Av' Non-Formatted System f the format jumper in location A27, pins 8 to pin 9, is removed, the carriage return, line feed logic and the space logic are inhibited by resets produced by gates B27, pin 4, and B22, pin 3. Space, carriage returns and line feeds will not be outputted by the ASC nterface. Good and error message data will be outputted, character by character, until the track circuit is unoccupied. An intelligent terminal such as a minicomputer, etc. should be connected as the terminal device to receive the ASC characters and format and output them in the desired fashion. The EOT character is still outputted upon track unoccupancy to indicate the end of data from a particular train. (See Figure 5-7, Timing Chart.) Output Circuitry The ASC nterface couples to data sets or terminals via optical isolators. Data is available in either EA RS232-C or current loop outputs. The data outputs are in the marking state, current loop closed and at EA minus volts whenever data is not being transmitted. The Key On output is at EA plus volts when the track circuit is occupied and at EA minus volts whenever the track circuit is unoccupied. When the constant Key On option is selected, the Key On Output is always EA plus volts. The output connections are listed below. Note power supplies must be supplied externally. Output connections refer to connector J6 on the rear of the decoder drawer. 642-B, p. 2-3

20 WABCC Connector J6 Signal Pin EA +V input EA -V input EA Data Output EA Key Output Current Loop Common (-) Current Loop (+). Requires External Resistor to Limit Current and External Power Supply. 2 Ma. Current Loop. (Built in 5 Ohm Resistor; Requires 2 voe Series Power Supply. ) External Control nput External control inputs and signal outputs are provided on connector AJl to externally control and monitor operation of the ASC nterface. These signals interface with the timin logic through AND/OR select gates A3 and the priority encoder B24. The 8 bit tri-state ASC buss is also available for input/output through connector AJl. f the EXT control input AJl-8 is tied to logic O ( volts), the Z outputs of the AND/OR select gate are fed from the Y inputs rather than the X inputs. EXT data ready replaces cycle output, an EXT clock replaces the transmit clock signal to the clock, and clock 2 generators, and an EXT Key On replaces the Track Circuit Key On inputs. A cycle output signal is available to indicate when data is present for output. A Buss Busy signal indicates when the ASC buss is busy, i.e., when data is being loaded into the ASC output register. An external inhibit (EXT NH} and EA"T Hand EXT L signals are available into the priority encoder B24 to control this device to disable the output of characters to the ASC buss, if required. Presently, these inputs for future application. with K resistors to when they are unused. are unused but they have been provided These inputs have been terminated prevent improper operation of the system 642-B, p. 2-4

21 WABCO 'V'"4""V" 2.4 ASC WRE WRAP PANEL CONNECTONS BJl (Jl-} BJ2 (J2-lll AJ2 (J2-9} AJl (.Jl-8}.. DBl.. Buss Bit DB Buss Bit 2 3. DB24 3. DB Buss Bit 3 4. DB23 4. DB Buss Bit 4 5. DB22 5. DBS Buss Bit 5 6. DB2 6. DB Buss Bit 6 7. DB2 7. DB Buss Bit 7 8. DB9 8. DB8 8. EA -V 8. Buss Bit 8 9. DB DB7.. EA Data.. DB KHz. EA Key. 2. DB5 2. DB DB4 3. DB27 3. EA +V DB3 4. MSTR EXT N 5. DB2 5. TRAK EXT H 6. DBll EXT L 7. DBlO 7. TEST EXT DATA READY 8. DB9 8. GUST EXT CONTROL EMST EXT CLOCK Volts N EXT KEY-ON Volts N Buss Busy COM Cycle Output C OUT DB O Volts DB N+ 26. Note: Refer to the following page. 642-B, p. 2-5

22 WABCC NOTE BJl connects to AJl on AV Decoder BJ2 connects to AJ2 on AV Decoder AJ2 connects to J4 on nterface PCB AJl connects to JS on nterface PCB (only when required) 2.5 ASC OUTPUTS STATUS BTS The last four information bits, DB25 through DB28, are status bits encoded in binary, that indicate the state of the Lead Car ndications DB25, the Cab Signal ndication DB26, and two spare indications DB27 and DB28. Since these bits are binary, rather than BCD encoded, outputs greater than 9 decimal are possible. The table below gives the possible combinations of these bits and their ASC equivalent character. DB28 DB27 DB26 Cab Signal DB25 Lead Car ASC Equivalent (Colon) ; (Semi-Colon) < (Less than) = (Equals) > (Greater than)? (Question Mark) 642-B, p. 2-6

23 WABCO USA STANDARD CODE FOR NFORMATON NTERCHANGE BT NUMBERS... Oo Oo o, o, lo lo, b, b" 6 bs b4 bl bl b, ' ' ' ' ' '! NUL OLE p SOH DC A a a q 2 STX DC2 2 B R b r 3 ETX OC3 #= 3 c s c s 4 EOT OC4 $ 4 T d t 5 ENO NAK % 5 E u e u 6 ACK SYN a: 6 F v f v 7 BEL ETB 7 G w g w 8 BS CAN ( 8 H x h x 9 HT EM ) 9 y i v LF SUB *. J z i z. VT ESC + i K ( k {. 2 FF FS < L ' \ 3 CR GS - = M m } 4 so RS. > N A n,,..., 5 S us. /? - DEL ' p CONTROL FUNCTON DEFNTONS NUL Null, or all zeros OC Device control SOH Start of heading DC2 Device control 2 STX Start of text OCJ Device control 3 ETX End of text OC4 Device control 4 EQT End of transmission NAK Negative acknowledge ENO Enquiry SYN Synchronous idle ACK Acknowledge ETB End of transmission block BEL Bell, or alarm CAN Cancel BS Backspace EM End of medium HT Horizontal tabulation SUB Substitute LF Line feed ESC Escape VT Vertical tabulation FS File parator FF Form feed GS Group separator CR Carriage return RS Record separator so Shift out us Unit separator S Shift in SP Space OLE Data link escape DEL Delete Figure 2-2. USASC Code 642-B, p. 2-7/8

24

25 WABCD SECTON NSTALLATON 3. MOUNTNG The ASC nterface Panel, N is mounted in the left front section of the Decoder Logic Unit, type N , (Refer to Figure - for location). Mounting is accomplished by slipping the panel onto five #4x4 screws and securing with five lock washers and nuts. 3.2 NTERCONNECTONS Electrical connections to the Decoder Logic Unit circuitry are made through two ribbon cables with connectors. A cabling diagram is attached to the cover of the Decoder Logic Unit and is also shown in Figure -. The cabling from the ASC nterface Panel is connected as follows: Connector BJl on the ASC panel connects to AJl on the Decoder Panel. Connector BJ2 on the ASC panel connects to AJ2 on the Decoder Panel. Connector AJ2 on the ASC panel connects to J4 on the Power Distribution & nterface PCB. Connectors AJl on the ASC panel connects to JS on the Power Distribution & nterface PCB. nsure that the connectors are properly aligned before firmly mating the connectors to prevent possible damage due to misalignment. 642-B, p. 3/3-2

26

27 SECTON V TROUBLESHOOTNG 4. BASC TROUBLESHOOTNG The procedures listed in this section and accompanying flow charts outline a check and troubleshooting guide to aid in repairing a defective ASC nterface Panel, N Refer to the detailed circuit operation of the ASC nterface Panel in Section 2.3 of this manual before performing this procedure: 4.. Special Equipment. ASC compatible terminal device, teletype, cathode ray terminal (CRT}, etc. 2. Mating connector for J6 on decoder, see Section 5.4. in system's manual (642). 3. Power supply or supplies, ±2 volts D.C. or as required by terminal device. 4. Complete working AV carborne and wayside system Preliminary Set-Up. Check the defective ASC nterface Panel for shorts in the power supply input wiring between connector pins BJ2-2 (+V) and BJ2-2 (OV). The power busses are connected to the conductive layers on top (OV} and bottom (+V) of the wirewrap panel. Visually inspect the panel for broken or shorted wires, and properly inserted integrated circuits and components. 2. nstall the ASC nterface Panel into the Decoder Logic Unit drawer of a known working AV system. Refer to the Decoder Logic Unit section in the basic manual to verify operation of decoder before connecting cables to ASC panel. (See Figure - for hookup instructions.) 3. Determine the input requirements of the terminal device, whether EA or current loop compatible, bit rate and parity bit requirements. Connect the terminal device to the decoder drawer using the mating connector for J6. See Figures 4- for EA connections. See Figure 4-2 for current loop connections. 642-B, p. 4-

28 WABCC 4. nsert jumpers in location Al7 and A22 to program the correct bit rate and parity bit format into the ASC panel as required by the terminal device. Refer to detailed theory description Section 2.3 for details. Example: For hertz operation to a standard teletype A. Remove Jumper Al7-7 to Al7- B. Add Jumper Al7-8 to Al7-9 c. Remove all jumpers from Location A22. For ODD Parity output: A. Add Jumper Al7-2 to Al7-5 B. Add Jumper Al7-l to Al Program the ASC nterface Panel to output formatted signs, four per line by inserting the following jumpers into Location A27. A. Add Jumper A27-3 to A27-4 B. Add Jumper A27-6 to A27-ll c. Add Jumper A27-8 to A27-9 Remove all other jumpers in Location A Basic Diagnostic Procedure. Energize the terminal device, terminal interface power supplies and decoder drawer. Also insure that the terminal device is operating properly. A. Current loop is closed and either 2 or 6 milliamperes of current are flowing in the current loop. Adjust power supply for proper current leve. B. Check EA circuit for a minus voltage potential (marking condition) at terminal input. f there are any problems, check connections to terminal; refer to Detailed Troubleshooting, Section 4.2.3, No Output At Terminal. 2. Energize the track circuit power supply to activate the decoder. Check that the TRACK and KEY ON LEDs on the Decoder Logic Panel are lit. Check that the KEY ON LED on the ASC panel is lit and the TRANSMT LED blinks on momentarily upon energizing the track circuit power supply. 642-B, p. 4-2

29 NT '\) --'/>--7f 2 RETURN MLLAMPERES \ +-- +v _ 5 AJ2-26 J6-24 OR... _r_c_o_u_t?-->-----> \\h,,.-r_e_t_u_r_n_::;tl R EXT AJ2-24 J6-22..,... TO TERMNAL. ':_-_,... r co_m -----) AJ2-22 Figure 4-2 CURRENT LOOP CONFGURATON J VDC POWER SUPPLY *NOTE: R EXT Selected to meet current loop requirements of terminal. +v EA +V )--, AJ2-3 J6-6 AS J6-3 EA DATA L... AS _..., AJ2-8 J6-l COM TO TERMNAL Figure 4- EA DATA CONFGURATON + 2 VDC POWER SUPPL + 2 VDC POWER SUPPL 642-B, p. 4-3

30 WABCO 642-B, p. 4-4 The terminal device should upspace one line after receiving a Carriage Return (CR) and Line Feed (LF). f any indication is incorrect, refer to the appropriate heading under Detailed Troubleshooting, Section 4.2, for corrective measures. Key On inoperative--see ncorrect Key On, Section Transmit inoperative--see ncorrect Transmit ndication, Section Terminal not responding--see No Output At Terminal, Section f multiple problems exist, check the ASC Panel before the terminal device. 3. Deenergize the track circuit power supply. Check that the KEY ON LED on the ASC Panel goes off. The TRANSMT Light should blink on momentarily. The terminal device should upspace one line (receive CR and LF characters). Troubleshoot per Step 2 if incorrect. 4. Energize the track circuit power supply and observe LEDs as in Step Set the switches on the carborne Programmer to Route 9, car number 23 and the lead car bit switches on the status input test cable to the ON position. 6. Pass the Transponder Coil over the Wayside Coil at a 2 to 4 inch height and remove it. The TRANSMT LED on the ASC Panel should blink on momentarily and the terminal device should record the message; 9[]23[], where[] indicates a space. The GOOD MESSAGE LED on the decoder should be on. f the ERROR MESSAGE LED on the Decoder Logic Panel is on, the terminal should record the message = = [] ====[]=;=is equal sign,[] is space. This is correct ASC interface operation. Troubleshoot basic decoder if errors repeat. f a GOOD MESSAGE is indicated on the Decoder Logic Panel and the terminal receives incorrect data or no data, refer to Detailed Troubleshooting, Section 4.2.4, ncorrect or No Data At Terminal. 7. Pass the Transponder Coil over the Wayside Coil four more times at a two second interval between passes. The TRANSMT light should blink four times; the output device should output a total of four messages on one line and the fifth message on a new line.

31 There should be three spaces between each message. 923 D Q9o23D D Q9Qo23[Jl f the number of messages per line are incorrect, refer to Detailed Troubleshooting--ncorrect format at terminal, Section 4.2.5, Part A. f no spaces between messages, refer to Detailed Troubleshooting--ncorrect format at terminal, Section 4.2.5, Part B. 8. Deenergize the track circuit power supply. The output device will upspace one line. Format the ASC to print only two messages per line. Remove Jumper A27-3 to A27-4 Add Jumper A27-2 to A27-5 Also format the ASC Panel to suppress the space after the sixth digit by removing jumper A27-6 to A27-ll. 9. Energize the track circuit power supply. Pass the Transponder Coil over the Wayside Coil three times at a two second interval. The output device will upspace to a new line and print two messages in one line and the third on a new line without a space after the sixth digit. 9[)n23D D [)H23 f the number of messages per line is incorrect, refer to Detailed Troubleshooting--ncorrect format, Section 4.2.5, Part A. f the space is not suppressed after the. sixth digit, refer to Detailed Troubleshooting--ncorrect format at terminal, Section 4.2.5, Part C.. Deenergize the track circuit power supply. The output device will upspace to a new line. Format the ASC device to suppress all spaces between characters. Add Jumper A27-7 to A27-.. Energize the track circuit power supply. The output device will upspace to a new line. 642-B, p. 4-5

32 WABCD Pass the Transponder Coil over the Wayside Coil three times at a two second interval. The output device will output three messages, two on one line and the third on another line with no spaces between characters f the spaces are not suppressed between the characters, refer to Detailed Troubleshooting--ncorrect format at terminal, Section 4.2.5, Part C. 2. Deenergize the track circuit power supply. The terminal will upspace to a new line. Format one message per line. Remove Jumper A27-2 to A27-5 Add Jumper A27- to A27-6 Also format the ASC device to output only six digits, suppressing the last (status) digit. Remove Jumper A27-7 to A27- Add Jumper A27-5 to A Energize the track circuit power supply. The terminal will upspace one line. Pass the Trans-ponder Coil three times over the Wayside Coil at a two second interval. The terminal should printout the three, six digit messages each on a separate line f the seventh digit is printed, refer to Detailed Troubleshooting--ncorrect or lack of status digit suppression, Section 4.2.5, Part F. 4. Deenergize the track circuit power supply. The terminal will upspace one line. Restore seven digit output with spaces between characters. 642-B, p. 4-6

33 WABCO...,... Remove Jumper A27-5 to A27-2 Add Jumper A27-6 to A27-ll 5. Energize the track circuit power supply. The terminal will upspace one line. Refer to Table 4- and enter each switch setting on the programmer per the table. Pass the Transponder Coil over the Wayside Coil once for each switch setting. Verify the output of the data on the terminal for each message, one per line. The status bits setting will be displayed in ASC format. OlDOOOlDl CJ2 Entry Entry 2 Etc. f any message is incorrect, refer to Detailed Troubleshooting--ncorrect or no data at terminal, Section 4.2.4, Part B. Connect resistors at Pins B5-7 and B5-8 together to simulate an error input. The terminal device should record an error message in the form ==J====J= when the Transponder Coil is passed over the Wayside Coil. f not, refer to Detailed Troubleshooting--ncorrect or no data at terminal, Section Deenergize the track circuit power supply. The terminal device will upspace one line. Change the ASC nterface Panel to the non-formatted mode. Remove Jumper A27-8 to A27-9. Remove temporary jumper from resistors at B5-7 and B5-8. Set the switches on the Programmer to Route 9, car 23 and set the lead car switch, on the satus input test cable, to ON. 7. Energize the track circuit power supply. The terminal device should NOT upspace to a new line. Pass the Transponder Coil over the Wayside Coil at a two second interval repeatedly at least times. 642-B, p. 4-7

34 WABCO ENTRY NO. ROUTE SWTCH SETTNGS CAR NO. SWTCH SETTNGS EXTRA BT SWTCH SETTNGS ASC EQUVALENT OF EXTRA BTS < > ? Table B, p. 4-8

35 WABCO 'V" The output on the terminal device should be one continuous line of data without spaces, carriage return or line feed. The terminal will probably overprint characters at the end of a line. f not, refer to Detailed Troubleshooting--ncorrect format at terminal, Section 4.2.5, Part D. 8. Deenergize the track circuit power supply. The output terminal should not upspace to a new line. 9. Connect an oscilloscope to the output terminals (EA or current loop} that are not being used by the terminal device, per Figure 4- or 4-2. Connect a second oscilloscope probe to the Shift Clock signal at integrated circuit A9-pin 2. Trigger the oscilloscope externally, using the Transmit signal at A8 pin Energize the track circuit power supply. No signals should appear on the oscilloscope. 2. Deenergize the track circuit power supply. Observe the outputting of an EOT character as shown on Timing Chart, Figure 5-7. Data will be the complement of the Data Out signal as shown on the Timing Chart for Al4 pin 2. Observe the level of the bits relative to the Clock signal on A9 pin 2. The bit that occurs on the 9th clock edge is the parity bit. This bit will be the same level as the pulse during the 4th bit when the jumper is installed for even parity (A7-2 to Al7-5}. When odd parity is selected (Al7-l to Al7-6 and Al7-2 to Al7-5}, this 9th bit will be opposite in phase to Bit Repeat Steps 2 and 2 to check both parity options, odd and even. f EOT message is incorrect, refer to Detailed Troubleshooting Section 4.2.5, Part E, ncorrect EOT Message. 23. Connect an oscilloscope probe to the Key Output (J6-4} and to EA (-V) (J6-). 24. Deenergize the track circuit power supply. 25. Place a jumper in constant Key On at Al7 pin 6 to Al 7 pin. 642-B, p. 4-9

36 WABCD The KEY ON LED should be on and the output at J6-4 is positive when the jumper is installed. Remove the jumper Al7 pin 6 to Al7 pin. KEY ON LED should go off and the output at J6-4 should be at -V potential (off). f Key On operation is not correct, refer to Detailed Troubleshooting, Section 4.2., ncorrect Key On Operation. NOTE: f every step in this Basic Diagnostic Procedure (Sec. 4..3) is passed correctly by the ASCir nterface Panel under test, the interface panel is operational. 642-B, p. 4-

37 4.2 DETALED TROUBLESHOOTNG WABCCJ """ Refer to the Basic Troubleshooting Section 4. for a step-bystep check of the ASC device to pinpoint the failure modes which occur or determine that the ASC device is operating correctly. A defective ASC device will usually exhibit one or more of the following malfunctions: A. ncorrect Key On operation. B. ncorrect transmit indication. c. No output at terminal. D. ncorrect or no data at terminal. E. ncorrect format at terminal. Refer to the sections relating to the malfunctions observed and troubleshoot as required until correct indications are observed. When troubleshooting multiple problems, correct all malfunctions relating to the KEY ON and TRANSMT LEDs (Sections 4.2. and 4.2.2) first, if any. After completing the procedure, and no malfunctions are observed, repeat the Basic Diagnostic Procedure (Section 4..3) and verify the ASC device is operational ncorrect Key On Operation One of the following symptoms will most likely be observed when a malfunction occurs in the Key On circuit: A. No Key On output to data set with the Key On LED on. B. KEY ON LED always off. C. KEY ON LED always on with the constant Key On jumper removed. Refer to the corresponding symptom below and troubleshoot as required. A. KEY ON LED lights but there is no Key On output to the data set (i.e. +Vat connector J6 pin 4):. Check that the Decoder drawer is wired correctly for EA Key On output per Figure B, p. 4-

38 WABCD +v 2K AJ2-3 AJ2-ll ). J6-6 >}-EA J6-4 EA +V KEY ON OUTPUT TO TERMNAL AJ2-8 J6-l -v KEY ON Figure OUTPUT 4-3 CONFGURATON VDC 2 VDC POWER SUPPLY POWER SUPPL 642-B, p. 4-2

39 2. Check that the cables from the Power Distribution and nterface PCB to the ASC panel are installed correctly and free from shorts or opens. j 3. f the preceeding are correct, there is either a problem with -the Key On optical isolator AlO er :'ass@ciated components -n schematic Figure s B. KEY ON LED always of:. Check if the TRACK LED on the Decoder Logic Panel lights when the track circuit is occupied (i.e. track circuit power supply on). 2. f the TRACK LED on the Decoder Logic Panel is not lit, check for improper connections to the track circuit input of the decoder drawer and for a shorted TRAK signal at the ASC panel connector BJ2 pin f the TRACK LED on the Decoder Logic Panel is not lit, install a jumper between Al7 pin and Al7 pin 6 to generate a constant Key On signal. f the KEY ON LED lights, check the wiring and operation of the following Cs on the ASC panel on: Schematic (Figure 5-3) Flip Flop A3 pin 3 TRACK FF And/Or select A3 pin 3 ENABLE KEY Schematic (Figure 5-2) nverter B26 pin 5 TRAK Trace circuit inputs to other Cs when necessary. 4. f the KEY ON LED still does not light, check the wiring and operation of the components on: Schematic (Figure 5-3) NOR Gates A2 pin 2 A29 pin 3 nverter Al5 pin LED and Resistor Al5 pin 5 TEST+ MSTR 642-B, p. 4-3

40 WABCD Assure that the Receiver PCB Test Switch is in the Normal mode and the MSTR and TEST signals from the Decoder Logic Panel are a Logic and O respectively; otherwise check for shorted signals. Trace circuit inputs to other!cs when necessary and troubleshoot as required. C. KEY ON LED always on with the constant Key On jumper removed.. f the KEY ON LED does not go out when either the track circuit is unoccupied or if the Receiver PCB Test Switch is placed in the test mode, check the wiring and operation of the following!cs on: Schematic (Figure 5-3) Flip Flop A3 pin 3 TRACK FF A8 pin 5 TRANSMT And/Or Select A3 pin 3 ENABLE KEY NOR Gates A2 pin 2 A29 pin 3 nverter Al5 pin 5 TEST+ MSTR Trace circuit inputs to other!cs when necessary. 642-B, p. 4-4

41 WABCO "v.'4'../ ncorrect Transmit ndication One of the following symptoms will most likely be observed when a malfunction occurs in the Transmit Circuit: A. TRANSMT LED stays off. B. TRANSMT LED comes on and stays on. Refer to the corresponding symptom below and troubleshoot as required. A. TRANSMT LED stays off.. f the terminal is outputting correct numerical or error message data, check the TRANSMT LED and driver Al5 pin 4 (Figure 5-3). 2. f the terminal is not responding or printing garbled data, check the state of the Transmit FF A8 pin 5. When the Transmit FF is set, the TRANSMT LED should light. f not, check LED and driver Al5 pin f the Transmit FF A8 pin 5 stays reset, assure that the Test Switch on the Receiver PCB is in position 2 (Normal) and check the wiring and operation of the Test+ Master reset circuit on: Schematic (Figure 5-3) Flip Flop NOR Gate A8 pin 5 TRANSMT A29 pin 3 TEST+ MSTR NAND Gate A3 pin 3 nverter A9 pin 4 4. f the Test+ Master reset circuit is operational; check the Baud Rate Clock (Al4 pin 4) and Transmit Clock (A2 pin 4) signals as per Timing Chart (Figure 5-4). a. f the Baud Rate Clock signal is incorrect, insure jumpers have been installed for a selected baud rate and check the wiring and operation of the following Cs on: Schematic (Figure 5-3) Counter Al8 NOR Gate A29 pin 2 Flip Flop A24 pin 2, B, p. 4-5

42 WABCD NANO Gate Al4 pin 3 A23 pin 5 b. f the Transmit Clock signal is incorrect, check the wiring and operation of the following Cs on: Schematic (Figure 5-3) NANO Gates A2 pins 3 and 4 nverter Al5 pin 6 Trace circuit inputs to other Cs when necessary. 5. f the Baud Rate Clock and Transmit Clock signals are correct, and the TRANSMT LED still does not light when the track circuit power supply is activated, check that the EXT NHBT signal to priority encoder B24 pin 5 is at +V and insert a jumper wire from +V to the EXT H input at B24 pin 4. (See Schematic, Figure 5-2.) a. f the TRANSMT LED lights, there is a problem with the carriage return and line feed circuit. (See ncorrect Format Section ) b. f the TRANSMT LED stays off, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Priority Encoder B24 pin 4 Cycle Output Schematic (Figure 5-3) And/Or Select A3 pin START nverter Al5 pin 4 Trace circuit inputs to other Cs when necessary. B. TRANSMT LED comes on and stays on.. Check if the Cycle Output signal at the Priority Encoder B24 pin 4 is a logic. f so, check the priority encoder input pins -4 and -3 for a logic. f none of these are pins receiving a logic signal, check the Priority Encoder C B24 on schematic (Figure 5-2). 642-B, p. 4-6

43 WABCO...,.., 2. f either the EXT Hor EXT L signal at B24 pin 4 and 3 are high, check for any incorrect connections to the external inputs at connector AJl pins 5 and 6 and verify that both signals are tied to O volts through resistors at A f the Cycle Output signal is a logic O or, the Start signal at the quad and/or selector A3 pin should be a logic O or respectively. f not, check C A3 and associated circuits on schematic (Figure 5-3). Assure that the EXT CONTROL signal at A3 pin 9 is pulled up to +V potential. 4. f the Start signal remains a logic, check if the TRANSMT LED comes on when the decoder drawer only is first turned on. f so, check the wiring and operation of the Cs listed in Part A (TRANSMT LED stays off), Step 3 and the TRANSMT LED driver Al5 pin f the Start signal is a logic, and the TRANSMT LED comes on and stays on after the track circuit power supply is energized, check the wiring and operation of the following Cs on: Schematic (Figure 5-3) Flip Flop AB pin 5 Transmit Counter A9 Count NAND Gates A2 pins 4 and 3 6. f the Start signal is a logic, indicating that at least one of the inputs to the priority encoder (B24) is a logic, check for the proper occurrence of the following timing signals per Timing Chart (Figure 5-4). Signal Location Baud Rate Clock Al4 pin 4 Transmit Clock A2 pin 4 Clock Al3 pin Clock 2 Al3 pin 5 Clock Enable AB pin Dump Pulse. All pin B, p. 4-7

44 WABCD a. f timing signals are incorrect, check the wiring and operation of the.res listed in Part A (TRANSMT LED stays off), Steps 4a and 4b, and the following!cs on: Schematic (Figure 5-3) Counter Al9 Count Flip-Flop A8 pin Clock Enable Al3 pin Clock Al3 pin 5 Clock 2 Single Shot All pin 6 Dump Pulse NAND Gates A2 pin 3 Al4 pin 4 Trace circuit inputs to other!cs when necessary and troubleshoot as required using Timing Chart (Figure 5-4) whenever possible. b. f Timing Signals are correct, and the CR, Space nput or EOT signals to the priority encoder remain at a logic level, refer to ncorrect Format, Section c. f the Timing signals are correct and either the Good MSG, or Error MSG signal to the priority encoder are a logic, refer to the ncorre_ct or No Data at Terminal, Section , if the terminal is outputting data. f not, refer to No Output at Terminal, Section No Output at Terminal A. Terminal device does not respond to track occupancy during the Basic Diagnostic Procedure Section Check that the baud rate and parity have been correctly selected as per the Preliminary Setup of the Basic Troubleshooting procedure, Section Check that the cable from connector J2-9 on the ASC panel to connector J4 on the Power Distribution and nterface PCB is installed correctly and free of shorts or opens. 642-B, p. 4-8

45 WAECC 3. Program the ASC device for formatted operation by installing a jumper in Location A27 between pins 8 and 9. Energize the track circuit power supply and observe the ASC Data signal at gate Al4 pin 2. Reference the data levels and bit positions to the Shift Clock signal at inverter A9 pin 2 and trigger the oscilloscope on the positive going Trak signal at B3 pin 5. The ASC Data signal displayed on the oscilloscope should correspond to the signal listed on Timing Chart (Figure 5-4). a. f the ASC Data signal is correct, check inverters A9 pin 6, and 2 and look for shorted or open optical isolators AS or AlO on schematic (Figure 5-3). 4. f the ASC Data signal in Step 3 is incorrect, deenergize the track circuit power supply and check for proper occurrence of the following Clock signals per Timing Chart (Figure 5-4). Si9:nal Location Transmit Clock A2 pin 4 Baud Rate Clock Al4 pin 4 Clock Al3 pin Clock 2 A3 pin 5 Clock Enable A8 pin f the clock signals are incorrect, troubleshoot as required per timing chart. Replace all defective wiring and Cs. 5. f the clock signals in Step 4 are correct, energize the track circuit power supply. The CR signal line at priority encoder B24 pin 3 should go to a logic. (See Timing Chart, Figure 5-4.) f not refer to ncorrect Format At Terminal, Section a. f the CR signal is correct, cycle the track circuit power supply off, then on and check for the proper occurrence of the following timing signals: (Refer to Timing Chart, Figure 5-4.) 642-B, p. 4-9

46 WABCD Sig:nal Location Cycle Output B24 pin 4 Transmit A8 pin 5 Dump Pulse All pin 6 Buss Busy A2 pin 2 Shift Clock A9 pin 2 Transmit Clock A2 pin 4 Clock Enable A8 pin Clock Al3 pin Clock 2 Al3 pin 5 Baud Rate Clock Al4 pin 4 These signals are the basic timing signals in the ASC panel's logic and they must be present for proper operation. f-riicorrect, troubleshoot as required per timing chart and replace all defective wiring and res. 6. f all of the basic timing signals in Step 5 are correct and the ASC Data is still incorrect, check the wiring and operation of the following Cs on: Schematic (Figure 5-) Shift Register A6 pin 3 Flip-Flop A7 pin 5 Parity Generator Al2 Schematic (Figure 5-3) A7 pin 2 SERAL ASC DATA NAND Gate Al4 pin 2 ASC Data Also, check the data bus lines (Bits -8) for shorted or open wires and assure that no more than one tri-state gate (Cs Bl6, Bl7, Bll, Bl2 and Bl3) are active on any one data line at the same time. Troubleshoot as required and replace all defective wiring and res. 642-B, p. 4-2

47 WABCO "6,,.,"'V" 7. f the terminal is still not responding, then there is a problem with the carrier detect and line feed generator circuit. Refer to ncorrect Format At Terminal, Section ncorrect or No Data at Terminal One of the following conditions may be observed at the terminal during the ASC troubleshooting, Basic Diagnostic Procedure, Section 4..3: A. Garbled Data B. ncorrect or No Numerical Data. C. ncorrect or no Error Message Data. Refer to the corresponding symptom and troubleshoot as required. A. Garbled Data. f the terminal displays a continuous string of garbled data, check the Good and Error Message strobe input signals, GMST and EMST (BS pins 7 and 8), from the Decoder Logic Panel. These signals should be at a logic level whenever the corresponding LEDs on the decoder (Good or Error Message) are off. f not, assure that the cables from the ASC panel to the decoder panel are installed correctly and free from shorts or opens. Also, check the operation of gates A2 pins and 6 on schematic (Figure 5-2). a. f the GMST and EMST signals are correct, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Flip-Flops BlO pin BlO pin 5 GOOD MSG ERROR MSG NOR Gate B2 pin 4 NO MSG NANO Gate Bl9 pin 2 Single Shot A2 pin 7 Priority Encoder B24 pins and B, p. 4-2

48 WABCC Schematic (Figure 5-) Octal Counter/Decoder Bl5 NOR Gate B2 pin 3 LAST DGT Troubleshoot as required using Timing Charts Figures 5-4 and 5-5, and also Figures 6-22 and 6-23 in AV system manual 642 whenever possible. 2. f the terminal displays a non-continuous garbled message for either Good or Error Message Data, input a message to the decoder and by triggering on the Transmit signal, check the following ASC timing signals per Timing Charts (Figures 5-4 -and 5-5): Signal Location Transmit A8 pin 5 Shift Clock A9 pin 2 Dump Pulse All pin 6 Clock Al3 pin Clock 2 Al3 pin 5 Clock Enable A8 pin l Baud Rate Clock Al4 pin 4 Transmit Clock A2 pin 4 f any signals are incorrect, troubleshoot as required per timing charts and replace all defective Cs and wiring. a. f the timing signals are correct, check for shorts or opens in the ASC data buss (Bits -8) at the output shift register A6 and assure that no more than one tri-state gate (C Bl6 and Bl7) is active on any one data line at the same time. Check the wiring and operation of the following Cs on: Schematic {Figure 5-) Shift Register A6 pin 3 Parity Generator Al2 642-B, p. 4-22

49 WABCO "V"..., Flip Flops A7 pin 5 A7 pin 2 SERAL ASC DATA NAND Gate Bl9 pin 3 nverter Bl8 pin 2 Octal Counter/Decoder Bl5 Schematic (Figure 5-2) Decade Decoder B23 Exclusive OR Gate B2 pin 4 Tri-State nverters Bl6 pins and 3 Bl? pins and 3 NOR Gate B27 pin nverter Bl8 pin 2 Single Shot All pin LOAD MSG Trace circuit inputs to other Cs when necessary. B. ncorrect or No Numerical Data. f the terminal gives no response to Good Message Data, verify the following: a. The ASC device outputs a correct carriage return and in the formatted mode, line feed signal to the terminal. f not see Section and b. The TRANSMT LED is not on steady. f so, see Section f the above conditions are satisfied, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) NAND Gate A2 pin 6 Flip-Flop BlO pin l GOOD MSG 642-B, p. 4-23

50 WABCD Single Shot A2 pin 7 NAND Gate Bl9 pin 2 Priority Encoder B24 NOR Gate B2 pin 4 2. f the terminal displays garbled data for Good Messages only, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Single Shot All pin LOAD MSG Decade Decoder B2.3 pin 4 "l" Output Schematic (Figure 5-} NAND Gate Bl9 pin 3 Tri-State nverter Bl3 3. f the terminal displays a message with only a few characters incorrect or missed, check for shorts or opens in the ASC data buss (Bits -4) at tri-state inverter Bl3 and assure that no more than one tri-state gate (Cs Bl3, Bl6, Bl7, Bll and Bl2) is active on any one data line at the same time. Check the wiring and operation of the following Cs on: Schematic (Figure 5-) Tri-State Latches B2, B3, B4, B6, B7, B8, and B9 Tri-State nverter Bl3 Octal Counter/Decoder Bl5 nverters Bl4 pins 2, 4, 6,, 2, 5 Bl8 pin B, p. 4-24

51 WABCCJ "V'4"'V" C. ncorrect or No Error Message Data. f the terminal does not respond to Error Messages, verify the following: a. The ASC device outputs a correct carriage return and line feed signal to the terminal. f not, see Section and b. The TRANSMT LED is not on steady. f so, see Section f the above conditions are satisfied, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) NAND Gate A2 pin Flip-Flop BlO pin 5 ERROR MSG Single Shot A2 pin 7 NAND Gate Bl9 pin 2 NOR Gate B2 pin 4 Priority Encoder B24 2. f the terminal displays garbled data for error messages only, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Decade Decoder B23 pin 2 "2" Output NOR Gate B22 pin 3 nverter Bl8 pin Tri-State nverter Bll pins and 3 Bl2 pins and B, p. 4-25

52 WABCD ncorrect Format at Terminal One or more of the following symptoms will most likely be observed when a malfunction occurs in the ASC format circuits: A. ncorrect number of signs per line. B. Continuously repeating spaces, lack of spaces, or incorrect space suppression. c. Continuously repeating or lack of carriage return and line feed. D. Formatted characters in non-formatted mode or no format. E. ncorrect EOT Message. F. ncorrect or Lack of Status Digit Suppression. Refer to the corresponding symptom below and troubleshoot as required: A. ncorrect number of signs per line.. Check the wiring and operation of the following res on: Schematic (Figure 5-2) Counter A28 Flip-Flop B3 pin 6 Trace circuit inputs to other Cs when necessary. B. Continuously repeating spaces, lack of spaces or incorrect space suppression.. f the TRANSMT LED is on steady, check the logic level of the Space nput signal at priority encoder B24 pin i. f the signal is a constant logic, it may cause the ASC device to continuously output the ASC character message to generate spaces at the terminal. Check the wiring and operation of the following Cs on: Schematic (Figure 5-2) 642-B, p. 4-26

53 WABCO '-/"MY' Flip-Flop B25 pin B29 pin B29 pin 5 nverter B26 piri Single Shot A2 pin 6 Priority Encoder B24 pin Schematic (Figure 5-) NOR Gates B2 pin 2 SPACE B2 pin 3 Trace circuit inputs to other Cs when necessary. 2. f no spaces are displayed at the terminal or if an incorrect character is printed in its place, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Flip-Flop B25 pin nverter B26 pin Single Shot A2 pin 6 Priority Encoder B24 pin Decade Decoder B23 pin "4" Output Exclusive-OR B2 pin 4 nverter B26 pin 2 Tri-State nverters Bl2 pins 3,5,7 and 9 Trace circuit inputs to other Cs when necessary. 642-B, p. 4-27

54 WABCD 3. When the jumper between A27 pin 6 and A27 pin is removed, the space after the sixth digit of a message should be suppressed. f not, check the wiring and operation of NOR Gate B2 pin 3 on schematic (Figure 5-). a. When a jumper is inserted between A27 pin and A27 pin 7, all spaces should be suppressed between characters. f not check the wiring and operation of NOR Gate B2 pin 2 on schematic (Figure 5-). c. Continuously repeating or lack of carriage return and line feed.. f the TRANSMT LED is on steady, check the logic level of the CR signal at priority encoder B24 pin 3. f the signal is a constant logic, it may cause the ASC device to continuously output the ASC character message to generate either carriage returns or line feeds at the terminal. Check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Flip-Flop B3 pins 2 and 5 B25 pin 5 NAND Gates B27 pins 2 and 3 nverter NOR Gate B26 pin 6 B22 pin 2 CR Priority Encoder B24 pin 3 Counter A28 pin 3 LNE FULL Trace circuit inputs to other Cs when necessary. 2. f no carriage return or line feed are generated at the terminal, check if the CR signal line at priority encoder B24 pin 3 goes to a logic when the track circuit power supply is energized. f not, check the wiring and operation of the Cs listed in Step and the following Cs on: 642-B, p. 4-28

55 Schematic (Figure 5-2) NAND Gate B27 pins 3 and 4 nverter B26 pin 4 a. f the preceeding circuit is operational and no carriage return or line feed is generated, or if an incorrect character is printed, check the wiring and operation of the following res on: Schematic (Figure 5-2) Exclusive OR gates B2 pins 3, 2 and 3 NOR Gate B27 pin 4 nverter Bl8 pin 6 Tri-State Bl6 pins 3' 5' 7 and 9 Bl7 pins 3, 5, 7 and 9 Decade Decoder B23 pin 7 6 Output Trace circuit inputs to other res when necessary. D. Formatted characters in non-formatted mode, or no format.. When a jumper is inserted between A27 pins 8 and 9, the message at the terminal should be in the formatted mode. When the jumper is removed, the message should be non-formatted. f incorrect, check the wiring and operation of the following res on: Schematic (Figure 5-2) NAND Gate B27 pin 4 NOR Gate B22 pin 3 nverter B26 pin 2 Trace circuit input to other res when necessary. 642-B, p. 4-29

56 WABCD E. ncorrect EOT Message.. f the TRANSMT LED is on steady, check the logic level of the EOT signal at priority encoder B24 pin 2. f the signal is a constant logic, it may cause the ASC device to output continuous EOT Messages. Check the wiring and operation of the following Cs on: Schematic (Figure 5-2) Flip-Flop B28 pin B28 pin 5 EOT NANO Gate B27 pin 3 nverter B26 pin 5 Priority Encoder B24 pin 2 Trace circuit inputs to other Cs when necessary. 2. f no EOT message is outputted, check if the EOT signal at priority encoder B24 pin 2 goes to a logic level when the track circuit power supply is deenergized. f not, check the wiring and operation of the Cs listed in Step. a. f the preceding circuit is operational and the EOT message is still incorrect, check the wiring and operation of the following Cs on: Schematic (Figure 5-2) nverter B8 pin 4 NOR Gate B22 pin 4 Decade Decoder B34 pin 6 "5" Output Tri-State nverters B7 pins 3, 5, 7 and 9 Bll pins 3, 5, 7 and B, p. 4-3

57 F. ncorrect or Lack of Status Digit Suppression.. f the status (7th) digit cannot be suppressed by installing a jumper at A27 pin 5 to pin 2, check the wiring and operation of the following rc;s on: Schematic (Figure 5-) NOR Gate B2 pin 3 Counter B5 pins 5 and Resistor A26 pin ( KQ to O volts) Also check jumper wiring A27, pins 5 and 2 2. f the status digit is always suppressed regardless of jumper installation, check the wiring and operation of the res on: Schematic (Figure 5-) Counter B5 pin 5 nverter Bl8 pin 5 Buffer B8 pins 3, 4, 5, 6 Shift Register A6 pins, 3, 4, 5 Also check for short across A27 pins 5 to B, p. 4-3/32

58

59 WABCC... SECTON V DRAWNGS AND PARTS LST This section contains logic diagrams, timing charts, component locations and parts list for the ASC nterface Panel. 642-B, p. 5-/2

60

61 ..!!... i :,: -...,...,.. r J i OD Q:, 4.Lr,r! i 3.!!...,.,., :; :; :; ov ,.,.,.,.,.,.,.,., 85- ;f i ld iiii.jm.bji i o i i 85-4! lei o, i.,.,'f? :,, 2 \._). 4 J 3J 2 DO D DZ 3 D DO D DZ 3 cl4 8 T ;r ST:;E LATC"itl.u. r-l-jcl4 BT :a: srlfe LATCHRl,.!.. Jr,.!>! p.l D DO D OS ov :;., :; u. D DO D 2 3 D DO DZ iei \. J.., "' Lil..,!.. ;J j "" 3 es-s+ - ii. j' r: ' \. )_4.L i D DO 2 o].--lcl 4 Bl T ;i srf;e LATCHRJ,.u_,...!...lcL4 BT ;:r'sr: LATCHnlJ...a,..2-lcL a/: sr:e LATCHRµ.l....-LlcL4 BT 2 srffe LATCHA,.,. l!!)q Q Q Q Q3 OD QO,, l /\ '.r.,r, 2 t:! Q QZ l 5 - Ql 5... "'!... " WABCC SH.!: <i],. iiiiiiiiiiii 'Q ;... Q 44 L...!.!,!!... us... ov--,, ,, ,----,, , 2 QNO 83-3 Bl 3-5 A-U +v ( SH, SH 2 CLOCK Z SH JE"'.::::NO... 2 ERROR+... ERS j Q Q 'A Q5 "'... AZl_- i.-- OVAH- Al7-Z,, 4 Qe Q7 422 OCT'4L CfffR/ COO R. 2 LA.,...s._.o,a. J >T " l '47-! Atl- All-7 DV...,_ AJ- Al 7- Al7-4 All- All- t All- ov OV C--+v ov!z PARTY 8T 7-2 o. 5 4 Q m 3 L! M= DZ 5 AZ D!DO.,. PE +y!_!.j OS,----!!l CLOCK, Pl... ll Ml 5 Pl P3 P4 P5 Pl Pl 4: 8 BT SHFT REG Al Pl qa <<<<<<<,., _, T iot,,r,,t ll' T, i l DUMP PULSE ov ill_ u lo s Q o s Q SH 2,_, r_ SER AL A$CJ M_. s SH OJ!2 S fspn:.e:..._j NOTES: UNLESS OTHERWSE: MRMED ALL RESSTORS ARE OOK. 2. FOR JUMPER DESGNATONS REFER TO TAG DRAWNG C45 n, SH.ts.. UC45Jl&- 8-: ,"J.!' SHFT CLOCK T SH OS SH Q---SE u Dl ASC NlERFAa: PMf:L _Jli STD CRCUT DAGRAl.6 FCR AUTO-VEHCLE lntfcatoo & VEHCLE TO WAYS C<J.U,CATONS SYSTEM WRBC C WESTNllllOUSE AR M( COMPANY =.JC:!.:l;'.JSON ::Q 4.9L! Figure 5-. ASC nterface Panel Logic Diagram 642-B, p. 5-3/4

62 WRBCCJ LNE f'ull SH 3 A26-6 r-t-,----vw-ov ov SH OJ LY -- - t -o. A27-8 AZ&-7 3,... t::tlili A27 ov SM -Al&-, 2 AJ i AJl'-4 ( M,... i"' - M UHU i,:: N --.. l il,7 AJl-6 ( EXT H - A " fl AJt-ia( SU L ov ov rn CR 3 EOT 5 EXT L NPUT "!..!: QC 6 "' 2 QB f i QA 9 qv..!..ljqo.. u.. c... 3 B!! < A - AJ.!!.!.!!. 8 T 5 AJ OV'-"- 824 os!ll 823 U l ov 4 82 SH BJ2- & ( GMST -- Al 6-4 Al&-43-4 Al 6-3 SH 3 SH SH ov SH JJO +v UC45!6-2 ASC NTERFACE PAtEL,..::! STD CRCUT DAGRAMS FOR AUTO-VEHCL CENTFCATOO & VEHCL TO WAYSCE CCM.U CA Tl SYSTEM WRB CCJ WfSTGHOUSE AR BRAK COPMY --=,:ct,'.' CX,?fe f 4.. _q oant D A J::. '2 C (co:,ro 775 JU Figure 5-2. ASC nterface Panel Logic Diagram (Cont'd) 642-B, p. 5-5/6

63 SH [!:> S RiAL ASC DATA N + AJZ-2 WABCO """ A!l-3 SANE PAGE TESTiUST BJl.- ( 53.SKHZ -,..JCL ' U(..A +v -wv Al l3 OV-WJAZ: 4!..!... MR BT RATE 44 Z BT BNARY COUNTER Al 8 Q Q_Z_ Q3 Q4 QS_ Q Q7 Q Qt -- Qll ",zl ::z. :!!. :: <.. r.3!!...!.!....,... OHZ.. -- << Al 7- v+---e 43 A24 umg 43 A24 2 ijl4 A4- C OUT )AJ2-24 COM _} EA +y AJl-22 AJ2-S u ij 4_!..,,... -.,,.,./V\J c.u, "'f" "' )AJt- TRANSMT CLOCK t J.. c.,"_. )AJl- >nclt OUJPUJ 6 jx, z, AJl U< tr SH START -! Al - 7: -::: n&autr u,-.. : m:;;;..:. i j --,r---,......, s.,2 (N 2 tnsmt +v+vw+v ' H 2 r2ps'4pe 452 COUNT,... SH! SH. )'2 DVl5:5 ayst )AJl 3 AJl-2( EXT KEY ON ' - z, 4 ( SH. : SH. A2- At-, AJl-( ERO. - l,,d TRANSMT fc>at.. Of CLOCK Z,.. O SH (, AJt-lS TWO WM!:9 SU Aaow) BJ2... ov +v SJZ-ll ( TEST A - 4 9Jl-4 : iiiii" Al-5 +v SH ::: TEST.fMsTR t:::-... ) 4 A A2t )d-y v DUMP Pyl,.SE 8J2-2 8J2-2 lff :::K!J TESTiMSTft AJl-25 --ov J'RAK +v}to ALL CS DUMP,ULSE ENABLE KEY... +v +v +v, wv- ov -+v Al 7- A.7- UC453 A.25-t 6-3 >'-;_( 7J 25-8 A25-6 AZ5 -+v 2K 4 '3..:. ) Jt! u UA -V ) AJl (TWO Wl"9 S! ABOVE) KE:Y + TRAK PULSE SH. TRAK 2 2 SH.! ASC l_".a PA' L.QJ i STD CRCUT DAGRAM5 FOR AUTO-VEHCLE CENTFCATOO & VEHCLE TO WAYSl!J; CCJ.M.l'CATONS SYSTEM WRBCCJ WESTNSHOUSf AR BRAKE COMPMY =.JCM *',. 'L - "'D :.:"m, 6775.,., OJtAWNO NUM D _...,. M. ' ii;. :::!, A Figure 5-3. ASC nterface Panel Logic Diagram (Cont'd) 642-B, p. 5-7/8

64 WASCO TRANS T CLOC" ' A.2-4 aouo RATE CLOCK AU-4 CLOCK All- CLOCK Z '-' Al 3-5 KEY OR TR.-CK PULSE A2- TRAK ' MEY ON A29-J OCCUPY BSO PN 2: i EMPTY 85-2 CA 2 - CY-TUT J +LF EN CR + LF' + OT TRANSUl Al-S "' i;l OUliP PULS ' , Al - auss auav.l _J Ato-U SHFT CLOCK ' A2 ":-TA i n_s-i m CLOCK ENABLE n At- rlj NOTE: ASC CHAR,\CTER FOR LfNE FEED ASC CHARACTER _Q!! ARR_ETU '"... ;. FOTTED SYSTEM: TR>.CK OCCUP.-.P!i!CY Figure 5-4. uto... :'rh,e....le coocnt ASC NTERFACE TMNG STD CRCUT DAGRAMS FOR AUTO-VEHCLE lll:ntfcaton & VEHCLE TD WAYSl!l: co.m.ncatons SYSTEM WABCO WESTNGHOUSE AR BRAKE COMPANY ,,- UNON SWTCH l SGNAL DYSON "V" SWl$$YALE PCl$J om:[, Pl'mllmM. PA. 52 D 775.,u.!..l!> ASC nterface Timing Chart.. COl'T'D 642-B, p. 5-9/

65 BAUD RATE CLOCK A.4-4 n WABCC TRANSMT CLOCK A2-4 CLOCKS l&i--'--'--.._---"'--i--+-'------'---i AU- S TRAK j,---f ! BJ-5 EMPTY as-2.tjooo MSG 8- LOAD MSG -' : ,...Jf---J r-, Al - NO MSG 82-4 NUMiiffi au-u ERROR + PfUMBERS a2-, SPACE: ' 82- EN SPAC < , CYCLE OUJPU BH-4 TRANSMT Al-5 DUMP PULSE----' ' ; All- BUSS BUSY :----' A2-2 LAST O ( T l'ulse A2-7 SHFT CLOCK------' At-2 FORMATTED SYSTEM SPACES ENABLED ) REAANNG or =a,ts' t ASC NTERFACE TMNG. 't:ii "; :::J,i!ll"" :!:=: _ ldi!3 Figure 5-5. :Ho.i;_::;4,; STD CRCUT DAGRAMS FOR AUTO-VEHCLE HENTFCATON & \oehcle TO WAYSl!l: CO,t.UUCATONS SYSTEM WABCO 4': (';:,""" eoo:i:,n- D 5775 ASCit nterface Timing Chart (Cont'd) 642-B, p. 5-/?

66 WABCO AU-4 TRMalll T CLOCK A2-4 CLOCK 2 f ' l! J : t ; AU-5 l 8 S8 BD- LOAD MN--L---'_.;_.:f-L- All- ERROR MSG NOMSQ 82-4 iiiii iii 8-2 ERROR le NUMbEflS s --- e- EN CR+ LFy}--l! CYCLE OUTPUT TftMSM T---J Al-5 OUtiP PULSE-t-'--'-t---<,"r--'--'-'--j>-_..,.--',,-->- Atl-6 LAST DGT PULSE A!l T E EROR , B - TRAKf-'---''--c+---' ,...,_, NOTE: KEY.,...--;+---i---,...-,---t---,--, M- FORMTT D SYSTEM 2 SGNS PER LNE, aooo, ERROR SCN o::t l:i=,., + o nh lsth l ACEl : AC,SPACEl:tPACE - ENO OF FRST M$ NO OUTPUT = l ACE = = = = = Jr6 ENO OF SECONO MSG ---- c:e - NO OUTPUT -+LNE lcarr. NO OUTPUT FEEDRET EOT TRAK AND KEY OFF ASC NTERFACt: TMNG a STD CRCUT DAGRM6 FOR AUTO-VEHCLE lll:ntfcatcw & VEHCLE TO WAYS! CCM.UllCATONS SYSTEM WABCO WESTNGHOUSE AR BRAKE COMPAY :Na. :,.::i;c '/,-ff"'cc,o..;;o,,o f,;..,f'i''r-;;'!:f..!!!!l!i!!!l!!ab=' ii-"!.:-).;;;. D 4536 co.;:r- DATS SfU OltAWNG NUN - Figure 5-6. ASC nterface Timing Chart (Cont'd) 642-B, p. 5-3/4

67 WRBCC BAUD RATE CLOCK AU-4 TRANSMT CLOC A.2-4 AJ- CLOCK,---L-' j _j _j _j- j[ J J_ J.---_j----[ -_J AU-S CLOCK 2 TRAK, , eso-s UNOCCUPY F/F ' 82- DPTY' r l 85-2 EOT F/F s CYCLE OUTPUT tf 'LSO::-::[NLF..CR:-:-& ""'or Eii"iol , TRANSMT , Al-5 DUMP PULSE ' l All- aus SUSY A2-2 SHFT CLOCK ' At 2 :;la.: : :!!-N ' , EOT.. NOTE: NON-FORMOTTED SYSTEM TRACK UNOCCUPY ASCt t lnterfaoc TMNG,.. Figure 5-7.?J' STD CRCUT DAGRAMS FOR AUTO-VEHCLE OCNTFCATCN & VEHCLE TO WAYSCE C(J,f,UjlCATCNS SYSTEM WABCD WESTNGHOUSE AR BRAKE COMPANY.,:=c:!,!\:'.' 775 D 4536,...".f" - ASC nterface Timing Chart (Cont'd) 642-B, p. 5-5/6

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(REF ONLY) VEW -2 :-23 :.()/4.,... PPLCA' ;;_, O Tb HOLES C DJ E F' A CALLED FoQ. t. TAB i' ''- VEW'' (2).25 bl A.MOL.CS F"OR GNO. (R:EF'.,.. y) F +Sl+l2 2..._4- -=-=4,==l, ---=3=====---= -. - H- - ti F -- t ,. E - H+ - - D H c -:,: Vl.:, + "". "' LL. -4 B WABCO Figure 5-8. ASC nterface Panel Component Location 642-B, p. 5-7/8