Computer Science 126. Prologue: A Simple Machine. General Computer Science Fall Robert Sedgewick
|
|
- Rosa Andrews
- 5 years ago
- Views:
Transcription
1 COMPUTR SCIC S D G W I C K / W A Y Computer Science 26 General Computer Science Prologue: A Simple Machine Fall 24 Robert Sedgewick COMPUTR SCIC S D G W I C K / W A Y Who are you? [data from 2-2] Intended major Prologue: A Simple Machine Brief introduction Secure communication with a one-time pad Linear feedback shift registers Implications Programming experience Class Social Sciences other Science/Math other ngineering Humanities CS none some lots st year Sophomore Junior Senior Over 6% of all Princeton students take COS 26 CS..A.Prologue.Introduction 4
2 The basics What is this course about? A broad introduction to computer science. Lectures. [Sedgewick] Goals RS office hours. Demystify computer systems. mpower you to exploit available technology. Build awareness of substantial intellectual underpinnings. Design and architecture of computers. Theory of computation. Applications in science and engineering. and art, music, finance, and many other fields. M T W T F S Tips on assignments / worked examples Questions on lecture material. Informal and interactive. Science is everything we understand well enough to explain to a computer Friend 6/7 lab. [undergraduate assistants] Don Knuth 6 7 Help with systems/debugging. o help with course material. 8 9 Computers are incredibly fast, accurate, and stupid; humans are incredibly slow, inaccurate, and brilliant; together they are powerful beyond imagination. Piazza. [online discussion] Best chance of quick response to a question. Post to class or private post to staff. Albert instein 5 Grades assignments due See for full current details and office hours. 6 Course website are based on achievement. Due dates SP Opportunities for us to determine your level of achievement: OV OCT 9 programming assignments. 2 written exams (in class, /9 and 2/). 2 programming exams (evenings, /23 and 2/8). Final programming project (due Dean s date ). xtra credit / staff discretion. Adjust borderline cases. DC participation helps frequent absence hurts JA We do not grade on a "curve". everyone needs to meet me! Precepts. [Gabai, Ginsburg and team] Topics Programming in Java. S 9 you are already here Su Mo Tu We Th Fr Sa bookmark this page!
3 Textbook and Booksite Programming assignments are an essential part of the experience in learning CS. Textbook. Full introduction to course material. Developed for this course. For use while learning and studying. Desiderata Address an important scientific or commercial problem. Illustrate the importance of a fundamental CS concept. You solve the problem from scratch on your own computer! Booksite. Summary of content. Code, exercises, examples. Supplementary material. OT the textbook. (also not the course web page). For use while online. -body simulation pluck a guitar string estimate Avogadro's number bookmark this page, too! 9 What's Ahead? Coming events Lecture 2. Basic programming concepts. Precept. Meets today/tomorrow. ot registered? Go to any precept now; officially register ASAP. Change precepts? Use SCOR. Assignment due Monday :59PM Things to do before attempting assignment Read Sections. and.2 in textbook. Read assignment carefully. Install introcs software as per instructions. Do a few exercises. Lots of help available, don't be bashful. see Colleen Kenny-McGinley in CS 2 if the only precept you can attend is closed COMPUTR SCIC S D G W I C K / W A Y. Prologue: A Simple Machine Brief introduction Secure communication with a one-time pad Linear feedback shift registers Implications D OF ADMIISTRATIV STUFF CS..B.Prologue.OneTimePad
4 Sending a secret message with a cryptographic key ncrypt/decrypt methods use yt25a5i/s if I ever send you an encrypted message Alice wants to send a secret message to Bob. Sometime in the past, they exchange a cryptographic key. Alice uses the key to encrypt the message. Bob uses the same key to decrypt the message. Goal. Design a method to encrypt and decrypt data. "OK" S D M O Y v 7 K Y encrypt Alice g X 7 6 W 3 decrypt Hey, Bob. Here's a secret message. Hi Alice. OK, I'm ready. key: S D M O gx76w3v7k yt25a5i/s SDMOY Bob Hey, Bob. Here's a secret message. Hi Alice. OK, I'm ready. sending gx76w3v7k key: yt25a5i/s xample. nigma encryption machine [German code, WWII] SDMOY Broken by Turing bombe (one of the first uses of a computer). Broken code helped win Battle of Atlantic by providing U-boat locations. gx76w3v7k??? encrypted message is "in the clear" (anyone can read it) Critical point: Without the key, ve cannot understand the message. xample 2. One-time pad [details to follow] Q. How does the system work? xample 3. Linear feedback shift register [later this lecture] ve 3 A digital world 4 ncoding text as a sequence of bits Base64 encoding of character strings A bit is a basic unit of information. A simple method for representing text. Two possible values ( or ). asy to represent in the physical world (on or off ). 64 different symbols allowed: A-Z, a-z, -9, +, /. 6 bits to represent each symbol. ASCII and Unicode methods used on your computer are similar. In modern computing and communications systems, we represent everything as a sequence of bits. Text [details to follow in this lecture] umbers Sound [details to follow in this course] Pictures [details to follow in this course] Programs [profound implications, stay tuned]. A B C D F G H I J K L M O P Q R S T U V W X bits symbols 6 64 Base64 Y Z a b c d e f g h i j k l m n o p q r s t u v M O ASCII Unicode 6 65,536+ w x y z / xample: 2 = 69 S D Y Bottom line. If we can send and receive bits, we can send and receive anything. 5 6
5 One-Time Pads ncryption with a one-time pad What is a one-time pad? Preparation A cryptographic key known only to the sender and receiver. Create a "random" sequence of bits (a one-time pad). Good choice: A random sequence of bits (stay tuned). Send one-time pad to intended recipient through a secure channel. Security depends on each sequence being used only once. ncryption ncode text as a sequence of bits. Use the first bits of the pad. important point: need to have as many bits in the pad as there are in the message. Compute a new sequence of bits from the message and the pad. Decode result to get a sequence of characters. Result: A ciphertext (encrypted message). a simple machine ote: Any sequence of bits can be decoded into a sequence of characters. more convenient than bits for initial exchange message one-time pad ciphertext 7 8 A (very) simple machine for encryption Self-assessment on bitwise encryption To compute a cyphertext from a message and a one-time pad ncode message and pad in binary. ach cyphertext bit is the bitwise exclusive or of corresponding bits in message and pad. Q. ncrypt the message A S Y with the pad 2 3. Def. The bitwise exclusive or of two bits is if they differ, if they are the same. message one-time pad cyphertext 9 2
6 Decryption with a one-time pad A (very) simple machine for encryption and decryption To compute a message from a cyphertext and a one-time pad Use binary encoding of cyphertext and pad. ach message bit is the bitwise exclusive or of corresponding bits in cyphertext and pad. if they differ; if they are the same cyphertext one-time pad A. Alice's device uses a "bitwise exclusive or" machine to encrypt the message. Q. What kind of machine does Bob's device use to decrypt the message? message (!) A. The same one (!!) 2 22 Why does it work? Decryption with the wrong pad message one-time pad ve cannot read a message without knowing the pad. My informant tells me that Alice and Bob's one-time pad might be qwdgbduav ciphertext one-time pad ve message Crucial property: Decrypted message is the same as the original message. Let m be a bit of the message and k be the corresponding bit of the one-time pad. To prove: ( m k ) k = m Approach : Truth tables m k m k (m k ) k otation: m k is equivalent to (m, k) Approach 2: Boolean algebra (k k) = m = m (m k) k = m (k k) = m = m 23 ciphertext wrong pad q w D g b D u a v gibberish K n 4 a B h l q w D g b D u a v K n 4 a B h l One-time pad is provably secure [Shannon, 94s] IF each pad is used only once, AD the pad bits are random, TH ve cannot distinguish cyphertext from random bits. foiled again Kn4aBhl??? 24
7 ve's problem with one-time pads Goods and bads of one-time pads ve has a computer. Why not try all possibilities? Problem Goods. Very simple encryption method. Decrypt with the same method. Provably unbreakable if bits are truly random. Widely used in practice. ve 54 bits, so there are 254 possible pad values. Suppose ve could check a million values per second. It would still take 57+ years to check all possibilities. pad value message? AAAAAAAAA gx76w3v7k AAAAAAAAB gx76w3v7l AAAAAAAAC gx76w3v7i a one-time pad cold war hotline qwdgbduav Much worse problem There are also 254 possible messages. tttpwk+ If ve were to check all the pads, she'd see all the messages. o way to distinguish the real one from any other. One-time pad is provably secure. I'd like to send you a secret video ( GB) Kn4aBhl asily breakable if seed is re-used. Truly random bits are very hard to come by. eed separate secure channel to distribute key. Pad must be as long as the message. yt25a5i/s SDMOY ////////+ fo7fpiq ///////// fo7fpiq Where are you going to get 8 billion bits for the key? Bads. WTATTOO o room on my phone for both the video and the key. Alice Bob COMPUTR SCIC Random bits are not so easy to find You might look on the internet. S D G W I C K / W A Y The randomness comes from atmospheric noise Prologue: A Simple Machine Brief introduction Secure communication with a one-time pad Linear feedback shift registers Implications I think I'll call it random.org if you trust the internet. ext: Creating a (long) sequence of "pseudo-random" bits from a (short) key. 27 CS..C.Prologue.LFSR
8 A pseudo-random number generator is a deterministic machine that produces a long sequence of pseudo random bits. A pseudo-random number generator is a deterministic machine that produces a long sequence of pseudo random bits. xamples nigma. Linear feedback shift register (next). Blum-Blum-Shub generator. [ an early application of computing ] [ research still ongoing ] Deterministic: Given the current state of the machine, we know the next bit. An absolute requirement: Alice and Bob need the same sequence. Random: We never know the next bit. Pseudo-random: The sequence of bits appears to be random.??? Anyone who considers arithmetical methods of producing random digits is, of course, in a state of sin. John von eumann Appears to be random?? A profound and elusive concept. x. : o long repeats x. 2: About the same number of s and s x. 3: About the same number of s, s, s, and s. For this lecture: "Has enough properties of a random sequence that ve can't tell the difference" Which of these sequences appear to be random? Linear feedback shift register but # of s and s are about equal but # of s s s and s are about equal key for Alice and Bob Terminology Bit: or. Cell: storage element that holds one bit. Register: sequence of cells. Seed: initial sequence of bits. Feedback: Compute of two bits and put result at right. Shift register: when clock ticks, bits propagate one position to left. ciphertext for SDMOY generated by coin flips An [, 9] LFSR ote: Any one of them could be random! typed arbitrarily (no long seqs of s or s) More terminology Tap: Bit positions used for (one must be leftmost). [, k] LFSR: -bit register with taps at and k. umbered from right, starting at. ot all values of k give desired effect (stay tuned). 3 32
9 Linear feedback shift register simulation History of register contents Time a pseudo-random bit sequence! A random bit sequence? Q. Is this a random sequence? Looks random to me. one-time pad in our example o long repeats. 997 s, 3 s. 256 s, 254 s, 256 s, 257 s A. o. It is the output of an [, 9] LFSR with seed! It is pseudo-random (at least to some observers). 34 Self-assessment on LFSRs ncryption/decryption with an LFSR Q. Give first steps of [5,4] LFSR with initial fill. Preparation Alice creates a book of "random" (short) seeds. Alice sends the book to Bob through a secure channel. ncryption/decryption Alice sends Bob a description of which seed to use. They use the specified seed to initialize an LFSR and produce bits. [and proceed in the same way as for one-time pads] Alice Use the next seed in the book to decode this secret video ( GB) Bob OK (consults book) message seed LFSR ciphertext seed LFSR message 35 36
10 ve's opportunity with LFSR encryption Key properties of LFSRs ve has computers. Why not try all possible seeds? Seeds are short, messages are long. Property. Don t use all s as a seed! Fill of all s will not otherwise occur. All seeds give a tiny fraction of all messages. xtremely likely that all but real seed will produce gibberish. ve Good news (for ve): This approach can work. x: -bit register implies 247 possibilities. xtremely likely that only one of those is not gibberish. After this course, you could write a program to check whether any of the 247 messages have words in the dictionary. Bad news (for ve): It is easy for Alice and Bob to use a much longer LFSR Key properties of LFSRs Key properties of LFSRs Property. Don t use all s as a seed! Fill of all s will not otherwise occur. x. [4,3] LFSR Property. Don t use all s as a seed! Fill of all s will not otherwise occur. x. [4,2] LFSR 2 2 Property 2. Bitstream must eventually cycle. 3 Property 2. Bitstream must eventually cycle. 3 2 nonzero fills in an -bit register. Future output completely determined by current fill nonzero fills in an -bit register. Future output completely determined by current fill Property 3. Cycle length in an -bit register is at most 2. Could be smaller; cycle length depends on tap positions. eed theory of finite groups to know good tap positions
11 Key properties of LFSRs ve's problem with LFSR encryption gx76w3v7k??? Property. Don t use all s as a seed! Fill of all s will not otherwise occur. Property 2. Bitstream must eventually cycle. 2 nonzero fills in an -bit register. Future output completely determined by current fill., 9 63, 62 Without the seed, ve cannot read the message. ve has computers. Why not try all possible seeds? Seeds are short, messages are long. All seeds give a tiny fraction of all messages. xtremely likely that all but real seed will produce gibberish. ve xponential growth dwarfs technological improvements [stay tuned] Property 3. Cycle length in an -bit register is at most 2. Could be smaller; cycle length depends on tap positions. eed theory of finite groups to know good tap positions. Bottom line. [, 9] register generates 247 bits before repeating. [63, 62] register generates bits before repeating. XILIX manual, 99s Definitely preferable: small cost, huge payoff. 4 Bad news (for ve): There are still way too many possibilities. x: 63-bit register implies 2 63 possibilities. If ve could check million seeds per second, it would take her 2923 centuries to try them all! Bad news (for Alice and Bob): LFSR output is not random. OT OUGH COMPUTRS experts have cracked LFSRs 42 Goods and bads of LFSRs COMPUTR SCIC S D G W I C K / W A Y Goods. Very simple encryption method. Decrypt with the same method. Scalable: 2 cells for million bits; 3 cells for billion bits. Widely used in practice. [xample: military cryptosystems.] a commercially available LFSR Prologue: A Simple Machine Bads. asily breakable if seed is re-used. Still need secure key distribution. xperts can crack LFSR encryption. xample. CSS encryption widely used for DVDs. Widely available DeCSS breaks it! /* efdtt.c Author: Charles M. Hannum <root@ihack.net> */ /* Usage is: cat title-key scrambled.vob efdtt >clear.vob */ #define m(i)(x[i]s[i+84])<< unsigned char x[5],y,s[248];main( n){for( read(,x,5 );read(,s,n=248,s,n) )if(s ); write( [3]%8+2] /6%4 ){int [y=s == i=m( ) m() 8,k =m(2),j= m(4) 7 m(3) 9k* 2-k%8 8,a =,c =26;for (s[y] -=6; --c;j *=2)a= a*2i&,i=i /2j& <<24;for(j= 27; ++j<n;c=c> y) c +=y=ii/8i>>4i>>2, i=i>>8y<<7,a=a>>4,y=aa*8a<<6,a=a >>8y<<9,k=s[j],k ="7Wo~'G_\26"[k &7]+2"cr3sfw6v;*k+>/n."[k>>4]*2k*257/ 8,s[j]=k(k&k*2&34)*6c+~y ;}} DeCSS DVD decryption code 43 CS..D.Prologue.Implications Brief introduction Secure communication with a one-time pad Linear feedback shift registers Implications
12 LFSRs and general-purpose computers A Profound Idea component LFSR computer control start, stop, load same clock LFSR computer Important similarities. Both are built from simple components. Both scale to handle huge problems. Both require careful study to use effectively. Critical differences: Operations, input. Programming. We can write a Java program to simulate the operation of any abstract machine. Basis for theoretical understanding of computation. Basis for bootstrapping real machines into existence. Stay tuned (we cover these sorts of issues in this course). same memory 2 bits billions of bits input 2 bits bit sequence computation shift, + * / YOU will be writing code like this within a few weeks. pseudo-random bit any computable bit sequence sequence output but the simplest computers differ only slightly from LFSRs! General purpose computer can simulate any abstract machine. All general purpose computers have equivalent power (! ) [stay tuned]. public class LFSR { public static void main(string[] args) { int[] a = {,,,,,,,,,,, }; for (int t = ; t < 2; t++) { a[] = (a[] a[9]); System.out.print(a[]); for (int i = ; i > ; i--) a[i] = a[i-]; } System.out.println(); } } % java LFSR ote: You will write and apply an LFSR simulator in Assignment COMPUTR SCIC Profound questions S D G W I C K / W A Y Q. What is a random number? LFSRs do not produce random numbers. They are deterministic. von eumann's "state of sin": we know that "deterministic" is incompatible with "random" It is not obvious how to distinguish the bits LFSRs produce from random, BUT experts have figured out how to do so. Q. Are random processes found in nature?. Prologue: A Simple Machine Motion of cosmic rays or subatomic particles? Mutations in DA? Q. Is the natural world a (not-so-simple) deterministic machine?? God does not play dice. Albert instein 47
Encryption. Secure Chat. Encryption Machine
Encryption Introduction to Programming in Java: An Interdisciplinary Approach Robert Sedgewick and Kevin Wayne Copy right 2002 2010 19 Feb 2012 19:24:23 Secure Chat Encryption Machine Alice wants to send
More informationUnderstanding Cryptography A Textbook for Students and Practitioners by Christof Paar and Jan Pelzl. Chapter 2 Stream Ciphers ver.
Understanding Cryptography A Textbook for Students and Practitioners by Christof Paar and Jan Pelzl www.crypto-textbook.com Chapter 2 Stream Ciphers ver. October 29, 2009 These slides were prepared by
More informationUnderstanding Cryptography A Textbook for Students and Practitioners by Christof Paar and Jan Pelzl. Chapter 2 Stream Ciphers ver.
Understanding Cryptography A Textbook for Students and Practitioners by Christof Paar and Jan Pelzl www.crypto-textbook.com Chapter 2 Stream Ciphers ver. October 29, 2009 These slides were prepared by
More informationSequences and Cryptography
Sequences and Cryptography Workshop on Shift Register Sequences Honoring Dr. Solomon W. Golomb Recipient of the 2016 Benjamin Franklin Medal in Electrical Engineering Guang Gong Department of Electrical
More informationAn Introduction to Cryptography
An Introduction to http://www.southernct.edu/~fields/ Terminology is the study of secret writing. This is the only branch of mathematics to be designated by the U.S. government as export-controlled. Cryptographic
More informationLFSR stream cipher RC4. Stream cipher. Stream Cipher
Lecturers: Mark D. Ryan and David Galindo. Cryptography 2016. Slide: 89 Stream Cipher Suppose you want to encrypt a stream of data, such as: the data from a keyboard the data from a sensor Block ciphers
More informationStream Cipher. Block cipher as stream cipher LFSR stream cipher RC4 General remarks. Stream cipher
Lecturers: Mark D. Ryan and David Galindo. Cryptography 2015. Slide: 90 Stream Cipher Suppose you want to encrypt a stream of data, such as: the data from a keyboard the data from a sensor Block ciphers
More informationCOE328 Course Outline. Fall 2007
COE28 Course Outline Fall 2007 1 Objectives This course covers the basics of digital logic circuits and design. Through the basic understanding of Boolean algebra and number systems it introduces the student
More informationExample: compressing black and white images 2 Say we are trying to compress an image of black and white pixels: CSC310 Information Theory.
CSC310 Information Theory Lecture 1: Basics of Information Theory September 11, 2006 Sam Roweis Example: compressing black and white images 2 Say we are trying to compress an image of black and white pixels:
More informationContents Circuits... 1
Contents Circuits... 1 Categories of Circuits... 1 Description of the operations of circuits... 2 Classification of Combinational Logic... 2 1. Adder... 3 2. Decoder:... 3 Memory Address Decoder... 5 Encoder...
More informationHow to Predict the Output of a Hardware Random Number Generator
How to Predict the Output of a Hardware Random Number Generator Markus Dichtl Siemens AG, Corporate Technology Markus.Dichtl@siemens.com Abstract. A hardware random number generator was described at CHES
More informationWG Stream Cipher based Encryption Algorithm
International Journal of Emerging Engineering Research and Technology Volume 3, Issue 11, November 2015, PP 63-70 ISSN 2349-4395 (Print) & ISSN 2349-4409 (Online) WG Stream Cipher based Encryption Algorithm
More informationNorth Shore Community College
North Shore Community College Course Number: IEL217 Section: MAL Course Name: Digital Electronics 1 Semester: Credit: 4 Hours: Three hours of Lecture, Two hours Laboratory per week Thursdays 8:00am (See
More informationV.Sorge/E.Ritter, Handout 5
06-20008 Cryptography The University of Birmingham Autumn Semester 2015 School of Computer Science V.Sorge/E.Ritter, 2015 Handout 5 Summary of this handout: Stream Ciphers RC4 Linear Feedback Shift Registers
More informationA Pseudorandom Binary Generator Based on Chaotic Linear Feedback Shift Register
A Pseudorandom Binary Generator Based on Chaotic Linear Feedback Shift Register Saad Muhi Falih Department of Computer Technical Engineering Islamic University College Al Najaf al Ashraf, Iraq saadmuheyfalh@gmail.com
More informationINTERNATIONAL JOURNAL OF PURE AND APPLIED RESEARCH IN ENGINEERING AND TECHNOLOGY
Tarannum Pathan,, 2013; Volume 1(8):655-662 INTERNATIONAL JOURNAL OF PURE AND APPLIED RESEARCH IN ENGINEERING AND TECHNOLOGY A PATH FOR HORIZING YOUR INNOVATIVE WORK VLSI IMPLEMENTATION OF 8, 16 AND 32
More informationNew Address Shift Linear Feedback Shift Register Generator
New Address Shift Linear Feedback Shift Register Generator Kholood J. Moulood Department of Mathematical, Tikrit University, College of Education for Women, Salahdin. E-mail: khmsc2006@yahoo.com. Abstract
More informationComparative Analysis of Stein s. and Euclid s Algorithm with BIST for GCD Computations. 1. Introduction
IJCSN International Journal of Computer Science and Network, Vol 2, Issue 1, 2013 97 Comparative Analysis of Stein s and Euclid s Algorithm with BIST for GCD Computations 1 Sachin D.Kohale, 2 Ratnaprabha
More informationCombinational vs Sequential
Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs Changing inputs changes outputs No regard for previous inputs
More informationEnigma. Developed and patented (in 1918) by Arthur Scherbius Many variations on basic design Eventually adopted by Germany
Enigma Enigma 1 Enigma Developed and patented (in 1918) by Arthur Scherbius Many variations on basic design Eventually adopted by Germany o For both military and diplomatic use o Many variations used Broken
More informationCPSC 121: Models of Computation. Module 1: Propositional Logic
CPSC 121: Models of Computation Module 1: Propositional Logic Module 1: Propositional Logic By the start of the class, you should be able to: Translate back and forth between simple natural language statements
More informationStream Ciphers. Debdeep Mukhopadhyay
Stream Ciphers Debdeep Mukhopadhyay Assistant Professor Department of Computer Science and Engineering Indian Institute of Technology Kharagpur INDIA -7232 Classifications Objectives Feedback Based Stream
More informationCSE 352 Laboratory Assignment 3
CSE 352 Laboratory Assignment 3 Introduction to Registers The objective of this lab is to introduce you to edge-trigged D-type flip-flops as well as linear feedback shift registers. Chapter 3 of the Harris&Harris
More informationJin-Fu Li Advanced Reliable Systems (ARES) Laboratory. National Central University
Chapter 3 Basics of VLSI Testing (2) Jin-Fu Li Advanced Reliable Systems (ARES) Laboratory Department of Electrical Engineering National Central University Jhongli, Taiwan Outline Testing Process Fault
More informationLogic Design ( Part 3) Sequential Logic- Finite State Machines (Chapter 3)
Logic esign ( Part ) Sequential Logic- Finite State Machines (Chapter ) Based on slides McGraw-Hill Additional material 00/00/006 Lewis/Martin Additional material 008 Roth Additional material 00 Taylor
More informationTrue Random Number Generation with Logic Gates Only
True Random Number Generation with Logic Gates Only Jovan Golić Security Innovation, Telecom Italia Winter School on Information Security, Finse 2008, Norway Jovan Golic, Copyright 2008 1 Digital Random
More information(12) Patent Application Publication (10) Pub. No.: US 2003/ A1
(19) United States US 2003O152221A1 (12) Patent Application Publication (10) Pub. No.: US 2003/0152221A1 Cheng et al. (43) Pub. Date: Aug. 14, 2003 (54) SEQUENCE GENERATOR AND METHOD OF (52) U.S. C.. 380/46;
More information2 nd Int. Conf. CiiT, Molika, Dec CHAITIN ARTICLES
2 nd Int. Conf. CiiT, Molika, 20-23.Dec.2001 93 CHAITIN ARTICLES D. Gligoroski, A. Dimovski Institute of Informatics, Faculty of Natural Sciences and Mathematics, Sts. Cyril and Methodius University, Arhimedova
More informationLFSR Counter Implementation in CMOS VLSI
LFSR Counter Implementation in CMOS VLSI Doshi N. A., Dhobale S. B., and Kakade S. R. Abstract As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size
More informationSequential Logic. Introduction to Computer Yung-Yu Chuang
Sequential Logic Introduction to Computer Yung-Yu Chuang with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA) Review of Combinational
More informationWelch Gong (Wg) 128 Bit Stream Cipher For Encryption and Decryption Algorithm
International Journal of Emerging Engineering Research and Technology Volume 3, Issue 8, August 2015, PP 137-144 ISSN 2349-4395 (Print) & ISSN 2349-4409 (Online) Welch Gong (Wg) 128 Bit Stream Cipher For
More informationSegmented Leap-Ahead LFSR Architecture for Uniform Random Number Generator
, pp.233-242 http://dx.doi.org/10.14257/ijseia.2013.7.5.21 Segmented Leap-Ahead LFSR Architecture for Uniform Random Number Generator Je-Hoon Lee 1 and Seong Kun Kim 2 1 Div. of Electronics, Information
More informationEric Roberts and Jerry Cain Handout #36 CS 106J May 15, The Enigma Machine
Eric Roberts and Jerry Cain Handout #36 CS 106J May 15, 2017 The Enigma Machine In World War II, a team of British mathematicians working at a secret facility called Bletchley Park was able to break the
More informationDIFFERENTIATE SOMETHING AT THE VERY BEGINNING THE COURSE I'LL ADD YOU QUESTIONS USING THEM. BUT PARTICULAR QUESTIONS AS YOU'LL SEE
1 MATH 16A LECTURE. OCTOBER 28, 2008. PROFESSOR: SO LET ME START WITH SOMETHING I'M SURE YOU ALL WANT TO HEAR ABOUT WHICH IS THE MIDTERM. THE NEXT MIDTERM. IT'S COMING UP, NOT THIS WEEK BUT THE NEXT WEEK.
More informationSequential logic circuits
Computer Mathematics Week 10 Sequential logic circuits College of Information Science and Engineering Ritsumeikan University last week combinational digital circuits signals and busses logic gates and,
More informationElectrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York
NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York DEPARTMENT: SUBJECT CODE AND TITLE: COURSE DESCRIPTION: REQUIRED: Electrical and Telecommunications Engineering Technology TCET 3122/TC
More informationAnalysis of Different Pseudo Noise Sequences
Analysis of Different Pseudo Noise Sequences Alka Sawlikar, Manisha Sharma Abstract Pseudo noise (PN) sequences are widely used in digital communications and the theory involved has been treated extensively
More informationMC9211 Computer Organization
MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the
More information8/30/2010. Chapter 1: Data Storage. Bits and Bit Patterns. Boolean Operations. Gates. The Boolean operations AND, OR, and XOR (exclusive or)
Chapter 1: Data Storage Bits and Bit Patterns 1.1 Bits and Their Storage 1.2 Main Memory 1.3 Mass Storage 1.4 Representing Information as Bit Patterns 1.5 The Binary System 1.6 Storing Integers 1.8 Data
More informationCSc 466/566. Computer Security. 4 : Cryptography Introduction
1/51 CSc 466/566 Computer Security 4 : Cryptography Introduction Version: 2012/02/06 16:06:05 Department of Computer Science University of Arizona collberg@gmail.com Copyright c 2012 Christian Collberg
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Registers and Counters CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev
More informationCS408 Cryptography & Internet Security
CS408 Cryptography & Internet Security Lecture 4: Rotor Machines Enigma Reza Curtmola Department of Computer Science / NJIT How to move from pencil and paper to more automatic ways of encrypting and decrypting?
More informationObjectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath
Objectives Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath In the previous chapters we have studied how to develop a specification from a given application, and
More informationThe reduction in the number of flip-flops in a sequential circuit is referred to as the state-reduction problem.
State Reduction The reduction in the number of flip-flops in a sequential circuit is referred to as the state-reduction problem. State-reduction algorithms are concerned with procedures for reducing the
More informationNON-BREAKABLE DATA ENCRYPTION WITH CLASSICAL INFORMATION
Fluctuation and Noise Letters Vol. 4, No. 2 (2004) C1 C5 c World Scientific Publishing Company NON-REKLE DT ENCRYPTION WITH CLSSICL INFORMTION LSZLO. KISH and SWMINTHN SETHURMN Texas &M University, Department
More informationCOMP2611: Computer Organization. Introduction to Digital Logic
1 COMP2611: Computer Organization Sequential Logic Time 2 Till now, we have essentially ignored the issue of time. We assume digital circuits: Perform their computations instantaneously Stateless: once
More informationFault Analysis of Stream Ciphers
Fault Analysis of Stream Ciphers M.Sc. Thesis Ya akov Hoch yaakov.hoch@weizmann.ac.il Advisor: Adi Shamir Weizmann Institute of Science Rehovot 76100, Israel Abstract A fault attack is a powerful cryptanalytic
More informationLogic Devices for Interfacing, The 8085 MPU Lecture 4
Logic Devices for Interfacing, The 8085 MPU Lecture 4 1 Logic Devices for Interfacing Tri-State devices Buffer Bidirectional Buffer Decoder Encoder D Flip Flop :Latch and Clocked 2 Tri-state Logic Outputs
More informationDesign of Fault Coverage Test Pattern Generator Using LFSR
Design of Fault Coverage Test Pattern Generator Using LFSR B.Saritha M.Tech Student, Department of ECE, Dhruva Institue of Engineering & Technology. Abstract: A new fault coverage test pattern generator
More informationAttacking of Stream Cipher Systems Using a Genetic Algorithm
Attacking of Stream Cipher Systems Using a Genetic Algorithm Hameed A. Younis (1) Wasan S. Awad (2) Ali A. Abd (3) (1) Department of Computer Science/ College of Science/ University of Basrah (2) Department
More information(Refer Slide Time: 2:03)
(Refer Slide Time: 2:03) Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture # 22 Application of Shift Registers Today we
More informationCryptography CS 555. Topic 5: Pseudorandomness and Stream Ciphers. CS555 Spring 2012/Topic 5 1
Cryptography CS 555 Topic 5: Pseudorandomness and Stream Ciphers CS555 Spring 2012/Topic 5 1 Outline and Readings Outline Stream ciphers LFSR RC4 Pseudorandomness Readings: Katz and Lindell: 3.3, 3.4.1
More informationComputer Architecture and Organization
A-1 Appendix A - Digital Logic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Appendix A Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational
More informationPrevious Lecture Sequential Circuits. Slide Summary of contents covered in this lecture. (Refer Slide Time: 01:55)
Previous Lecture Sequential Circuits Digital VLSI System Design Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture No 7 Sequential Circuit Design Slide
More informationExploring the Enigma [The MATH Connection]
Exploring the Enigma [The MATH Connection] by Claire Ellis, from Issue 34 of PLUS Magazine As long ago as the Ancient Greeks, warring armies have encrypted their communications in an attempt to keep their
More informationTesting Sequential Circuits
Testing Sequential Circuits 9/25/ Testing Sequential Circuits Test for Functionality Timing (components too slow, too fast, not synchronized) Parts: Combinational logic: faults: stuck /, delay Flip-flops:
More informationUNIT IV. Sequential circuit
UNIT IV Sequential circuit Introduction In the previous session, we said that the output of a combinational circuit depends solely upon the input. The implication is that combinational circuits have no
More informationWINTER 15 EXAMINATION Model Answer
Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate
More informationOptimization of FPGA Architecture for Uniform Random Number Generator Using LUT-SR Family
Optimization of FPGA Architecture for Uniform Random Number Generator Using LUT-SR Family Rita Rawate 1, M. V. Vyawahare 2 1 Nagpur University, Priyadarshini College of Engineering, Nagpur 2 Professor,
More informationCOMP sequential logic 1 Jan. 25, 2016
OMP 273 5 - sequential logic 1 Jan. 25, 2016 Sequential ircuits All of the circuits that I have discussed up to now are combinational digital circuits. For these circuits, each output is a logical combination
More informationAdding Analog and Mixed Signal Concerns to a Digital VLSI Course
Session Number 1532 Adding Analog and Mixed Signal Concerns to a Digital VLSI Course John A. Nestor and David A. Rich Department of Electrical and Computer Engineering Lafayette College Abstract This paper
More informationClock - key to synchronous systems. Lecture 7. Clocking Strategies in VLSI Systems. Latch vs Flip-Flop. Clock for timing synchronization
Clock - key to synchronous systems Lecture 7 Clocking Strategies in VLSI Systems Peter Cheung Department of Electrical & Electronic Engineering Imperial College London Clocks help the design of FSM where
More informationClock - key to synchronous systems. Topic 7. Clocking Strategies in VLSI Systems. Latch vs Flip-Flop. Clock for timing synchronization
Clock - key to synchronous systems Topic 7 Clocking Strategies in VLSI Systems Peter Cheung Department of Electrical & Electronic Engineering Imperial College London Clocks help the design of FSM where
More informationChapter Contents. Appendix A: Digital Logic. Some Definitions
A- Appendix A - Digital Logic A-2 Appendix A - Digital Logic Chapter Contents Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A. Introduction A.2 Combinational
More informationVLSI Test Technology and Reliability (ET4076)
VLSI Test Technology and Reliability (ET476) Lecture 9 (2) Built-In-Self Test (Chapter 5) Said Hamdioui Computer Engineering Lab Delft University of Technology 29-2 Learning aims Describe the concept and
More informationMinnesota State College Southeast
ELEC 2211: Digital Electronics II A. COURSE DESCRIPTION Credits: 4 Lecture Hours/Week: 2 Lab Hours/Week: 4 OJT Hours/Week: *.* Prerequisites: None Corequisites: None MnTC Goals: None Minnesota State College
More informationIndividual Project Report
EN 3542: Digital Systems Design Individual Project Report Pseudo Random Number Generator using Linear Feedback shift registers Index No: Name: 110445D I.W.A.S.U. Premaratne 1. Problem: Random numbers are
More informationVLSI System Testing. BIST Motivation
ECE 538 VLSI System Testing Krish Chakrabarty Built-In Self-Test (BIST): ECE 538 Krish Chakrabarty BIST Motivation Useful for field test and diagnosis (less expensive than a local automatic test equipment)
More informationTime Domain Simulations
Accuracy of the Computational Experiments Called Mike Steinberger Lead Architect Serial Channel Products SiSoft Time Domain Simulations Evaluation vs. Experimentation We re used to thinking of results
More informationChapter 4: How Universal Are Turing Machines? CS105: Great Insights in Computer Science
Chapter 4: How Universal Are Turing Machines? CS105: Great Insights in Computer Science QuickSort quicksort(list): - if len of list
More information6.3 Sequential Circuits (plus a few Combinational)
6.3 Sequential Circuits (plus a few Combinational) Logic Gates: Fundamental Building Blocks Introduction to Computer Science Robert Sedgewick and Kevin Wayne Copyright 2005 http://www.cs.princeton.edu/introcs
More informationChapter 4. Logic Design
Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table
More informationCHAPTER 4: Logic Circuits
CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits
More informationCHAPTER 4: Logic Circuits
CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits
More informationRandomness analysis of A5/1 Stream Cipher for secure mobile communication
Randomness analysis of A5/1 Stream Cipher for secure mobile communication Prof. Darshana Upadhyay 1, Dr. Priyanka Sharma 2, Prof.Sharada Valiveti 3 Department of Computer Science and Engineering Institute
More informationBreaking the Enigma. Dmitri Gabbasov. June 2, 2015
Breaking the Enigma Dmitri Gabbasov June 2, 2015 1 Introduction Enigma was an electro-mechanical machine that was used before and during the World War II by Germany to encrypt and decrypt secret messages.
More informationPseudorandom bit Generators for Secure Broadcasting Systems
+00? IE.Nfejb~lV 4 Pseudorandom bit Generators for Secure Broadcasting Systems Chung-Huang Yang m Computer & Communication Research Laboratories Industrial Technology Research Institute Chutung, Hsinchu
More informationCOMP12111: Fundamentals of Computer Engineering
COMP2: Fundamentals of Computer Engineering Part I Course Overview & Introduction to Logic Paul Nutter Introduction What is this course about? Computer hardware design o not electronics nothing nasty like
More informationData Representation. signals can vary continuously across an infinite range of values e.g., frequencies on an old-fashioned radio with a dial
Data Representation 1 Analog vs. Digital there are two ways data can be stored electronically 1. analog signals represent data in a way that is analogous to real life signals can vary continuously across
More informationARM7 Microcontroller Based Digital PRBS Generator
I J C International Journal of lectrical, lectronics ISSN No. (Online) : 2277-2626 and Computer ngineering 1(2): 55-59(2012) Special dition for Best Papers of Michael Faraday IT India Summit-2012, MFIIS-12
More informationIntroduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics
Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and
More informationData Storage and Manipulation
Data Storage and Manipulation Data Storage Bits and Their Storage: Gates and Flip-Flops, Other Storage Techniques, Hexadecimal notation Main Memory: Memory Organization, Measuring Memory Capacity Mass
More informationChapter 1: Data Storage. Copyright 2015 Pearson Education, Inc.
Chapter 1: Data Storage Chapter 1: Data Storage 1.1 Bits and Their Storage 1.2 Main Memory 1.3 Mass Storage 1.4 Representing Information as Bit Patterns 1.5 The Binary System 1-2 Chapter 1: Data Storage
More informationECE 250 / CPS 250 Computer Architecture. Basics of Logic Design ALU and Storage Elements
ECE 25 / CPS 25 Computer Architecture Basics of Logic esign ALU and Storage Elements Benjamin Lee Slides based on those from Andrew Hilton (uke), Alvy Lebeck (uke) Benjamin Lee (uke), and Amir Roth (Penn)
More informationFigure 9.1: A clock signal.
Chapter 9 Flip-Flops 9.1 The clock Synchronous circuits depend on a special signal called the clock. In practice, the clock is generated by rectifying and amplifying a signal generated by special non-digital
More informationUNIT III. Combinational Circuit- Block Diagram. Sequential Circuit- Block Diagram
UNIT III INTRODUCTION In combinational logic circuits, the outputs at any instant of time depend only on the input signals present at that time. For a change in input, the output occurs immediately. Combinational
More informationSynchronous Sequential Logic
Synchronous Sequential Logic Ranga Rodrigo August 2, 2009 1 Behavioral Modeling Behavioral modeling represents digital circuits at a functional and algorithmic level. It is used mostly to describe sequential
More informationCS 61C: Great Ideas in Computer Architecture
CS 6C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra Instructor: Alan Christopher 7/23/24 Summer 24 -- Lecture #8 Review of Last Lecture OpenMP as simple parallel
More informationOptimization of Multi-Channel BCH Error Decoding for Common Cases. Russell Dill Master's Thesis Defense April 20, 2015
Optimization of Multi-Channel BCH Error Decoding for Common Cases Russell Dill Master's Thesis Defense April 20, 2015 Bose-Chaudhuri-Hocquenghem (BCH) BCH is an Error Correcting Code (ECC) and is used
More informationCourse Administration
EE 224: INTRODUCTION TO DIGITAL CIRCUITS & COMPUTER DESIGN Lecture 5: Sequential Logic - 2 Analysis of Clocked Sequential Systems 4/2/2 Avinash Kodi, kodi@ohio.edu Course Administration 2 Hw 2 due on today
More informationCprE 281: Digital Logic
CprE 281: igital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Registers CprE 281: igital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More informationDesign Project: Designing a Viterbi Decoder (PART I)
Digital Integrated Circuits A Design Perspective 2/e Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolić Chapters 6 and 11 Design Project: Designing a Viterbi Decoder (PART I) 1. Designing a Viterbi
More informationCPS311 Lecture: Sequential Circuits
CPS311 Lecture: Sequential Circuits Last revised August 4, 2015 Objectives: 1. To introduce asynchronous and synchronous flip-flops (latches and pulsetriggered, plus asynchronous preset/clear) 2. To introduce
More information21.1. Unit 21. Hardware Acceleration
21.1 Unit 21 Hardware Acceleration 21.2 Motivation When designing hardware we have nearly unlimited control and parallelism at our disposal We can create structures that may dramatically improve performance
More informationExercise 4. Data Scrambling and Descrambling EXERCISE OBJECTIVE DISCUSSION OUTLINE DISCUSSION. The purpose of data scrambling and descrambling
Exercise 4 Data Scrambling and Descrambling EXERCISE OBJECTIVE When you have completed this exercise, you will be familiar with data scrambling and descrambling using a linear feedback shift register.
More informationChapter 3. Boolean Algebra and Digital Logic
Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how
More informationTEST-3 (DIGITAL ELECTRONICS)-(EECTRONIC)
1 TEST-3 (DIGITAL ELECTRONICS)-(EECTRONIC) Q.1 The flip-flip circuit is. a) Unstable b) multistable c) Monostable d) bitable Q.2 A digital counter consists of a group of a) Flip-flop b) half adders c)
More informationSECURED EEG DISTRIBUTION IN TELEMEDICINE USING ENCRYPTION MECHANISM
SECURED EEG DISTRIBUTION IN TELEMEDICINE USING ENCRYPTION MECHANISM Ankita Varshney 1, Mukul Varshney 2, Jitendra Varshney 3 1 Department of Software Engineering, 3 Department Of Computer Science and Engineering
More informationCHAPTER1: Digital Logic Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits 1 Sequential Circuits Introduction Composed of a combinational circuit to which the memory elements are connected to form a feedback
More information'if it was so, it might be; and if it were so, it would be: but as it isn't, it ain't. That's logic'
Basic Digital Electronics 'Contrariwise,' continued Tweedledee, 'if it was so, it might be; and if it were so, it would be: but as it isn't, it ain't. That's logic' (Carroll: Alice Through the Looking
More information