Integrated circuits/5 ASIC circuits

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1 Integrated circuits/5 ASIC circuits Microelectronics and Technology Márta Rencz Department of Electron Devices Subjects Classification of Integrated Circuits ASIC cathegories 2 Classification of Integrated Circuits COTS (commercial off the shelf) ICs Broad applicability The designer and the user are different fabrication in large numbers ASIC (Application Specific Integrated Circuits ) earlier: custom designed ICs For dedicated purposes usually the user designs (orders) fabrication volume may change within a very broad range 3

2 Production of integrated circuits IC fabrication: Forming the vertical structure IC Design: forming the surface structure separated from the fabrication both in place and time To treat the enormous amount of data: CAD methods Their relationship: design rules 4 Design of Integrated circuits Commercial off the shelf circuits Very complex structures, impossible to redesign them in all details the main functional blocks usually do not change well tested blocks, macro-cells (e.g. a microprocessor) are available in the form of IPs (Intellectual property) to be reused in the form of behavioural level description standard interface-es (Virtual socket-s) assure their connectability To fabricate them all the masks have to be redesigned and fabricated very expensive 5 Design of integrated circuits ASIC circuits The fabrication volume may change within broad limits (1 several millions) in case of small serial number the price is critical the number of individual steps has to be minimised in the design in the fabrication ASIC circuits pre-fabricated or at least partially, pre-designed or at least partially 6

3 ASIC cathegories The distinctions between the various types are weakening, like e.g.at PROMS Custom ASICs (full custom). Their design and fabrication (like in the case of OTS circuits) means the design and fabrication of all the masks Semi-custom ASICs. Partially or entirely pre-fabricated the final step of design and manufacturing is done by software, structured, like the custom circuits, but most of the mask patterns are pre-designed. 7 ASIC cathegories The separation is weakening between them... Predesigned Partially predesigned Partially prefabricated Pre-fabricated 8 The most frequent ones... Gate array except for the metal patterning pre-fabricated Forming the ultimate function means the design and fabrication of the metal interconnects of the pre-fabricated logic elements Standard cell circuits most of the cell mask patterns are predesigned (even for VLSI macro-cells) but the masks have to be designed and fabricated. Cell based ASIC A combination of the standard cell and gate array architectures. programmable logic devices (PLD) entirely pre-fabricated the logical function is realised by the programming of their interconnects, like at the PROM circuits 9

4 Gate array circuits 2 usual forms: Channeled array Sea-of-gates Channels: for the interconnects SOG (Sea of gates) architecture: dense structure The cells in both cases may be of large variety, even VLSI macrocells. 10 Standard cell circuits All the masks have to be fabricated. Design is supported by macro-cell libraries, the task of the designer is the placement and routing The area need of a given task is usu. smaller than in case of the gate arrays, but much more expensive solution 11 Cell based ASIC The megacells (e.g. micro-controllers, memories etc) are usually surrounded by gate array blocks. The embedded cells are predesigned, the task of the ASIC designer is to fit these into the gate array circuit. The substrate may be pre-fabricated, a the user designs only the interconnects and takes care of its realisation 12

5 Mixed-mode and analogue ASIC circuits Contain both digital and analogue circuit details Analogue parts realise complete analogue circuits, e.g.operational amplifiers, comparators, voltage references, data converters, etc. The digital parts may be of standard cell or, array form. 13 Programmed Logic devices (PLDs) Pre-fabricated, Configured by burning out fuses or antifuses, or by programming programmable interconnections The programmable interconnects may be MOS pass transistors or EPROM/EEPROM type transistors. PLA (Programmable logic array) arrangement: adaptation of the PROM-technique for the description of general logic functions base of the operation: each logic function can be given in minterm or sum of products form (OR matrix), and the products may be also produced with the help of NOR gates (AND matrix) 14 PLA arrangement Programmed logic devices (PLDs) 15

Programmed logic devices (PLDs) PAL structure: only the AND array is programmable 16 Logic cells and programmable interconnections in matrix form.

6 Programmed logic devices (PLDs) PAL structure: only the AND array is programmable 16 Logic cells and programmable interconnections in matrix form. Entirely prefabricated examples XILINX FPGA architecture 17 A configurable block of a XILINX FPGA : Look-up-table: SRAM, into which the logic function is written 18

programs exist, that can generate the final,finished circuit from the behavioural

7 Altera FPGA Architecture A large variety exists Advantages: fast bread-board (to be tried) hardware intelligent design programs exist, that can generate the final,finished circuit from the behavioural description cheap many are already reprogrammable Disadvantages: limited complexity limited parameter values (speed, etc.) 20

9 Programmable Logic Devices

9 Programmable Logic Devices Introduction to Programmable Logic Devices A programmable logic device is an IC that is user configurable and is capable of implementing logic functions. It is an LSI chip that contains a 'regular' structure