Computer Systems. Study Support. Ing. David Seidl, Ph.D.

Size: px
Start display at page:

Download "Computer Systems. Study Support. Ing. David Seidl, Ph.D."

Transcription

1 VYSOKÁ ŠKOLA BÁŇSKÁ TECHNICKÁ UNIVERZITA OSTRAVA FAKULTA METALURGIE A MATERIÁLOVÉHO INŽENÝRSTVÍ Computer Systems Study Support Ing. David Seidl, Ph.D. Ostrava

2 2 CONTENT CONTENT... 2 COMPUTER SYSTEMS ARCHITECTURE AND ITS DEVELOPMENT Historical development of computer technology Basic turning points in the development of computing Computer generations st generation nd generation rd generation Harvard concept Use of computers Microcontrollers Microprocessor 8051 (8052) NUMBER SYSTEMS Binary system Decimal - binary conversion Binary arithmetic Hexadecimal system Decimal - hexadecimal conversion Binary coded decimal system (BCD) Representation of numbers on a computer Representation of numbers in fixed-point arithmetic Representation of floating point numbers Numeric Data Types Integer values. (I, INT) Floating Point Number data FP (N) Non-numeric values. (Not a Number (NaN, SNaN, QNaN)) Pointer Data Types Bit Field Data Type SELECTED EXTERNAL AND INTERNAL COMMUNICATION INTERFACE Standard RS-232 C/V.24 and V Internal communication interface I2C Description of a bus DISPLAYS Principles of electro-optical converters Types of Screens Screen Trinitron Delta screen Screen in-line (Croma Clear) Properties and evaluation criteria of screens The shape of the faceplate Pitch of colour dots Anti-glare protection Dynamic focus Image Quality Screen In display Raster-type... 37

3 4.4.2 Vector type Plasma display PDP work cycle LCD Monitors Liquid crystals LCD - Liquid Crystal Display Passive and Active Matrix Comparison with CRT monitors

4 STUDY INSTRUCTIONS For the subject Computer Systems in the second semester of the follow-up masters study branch Automation and Computer Technology in Industrial Technologies, you have obtained study material for part-time study. PREREQUISITES To successfully master the subject, students must be familiar with at least basic programming in C. SUBJECT OBJECTIVE AND LEARNING RESULTS The objective of the subject is to acquaint students with selected elements of computers. A detailed description will mostly be dedicated processors and selected communication interfaces. AFTER STUDYING THROUGH THE SUBJECTS A STUDENT SHOULD BE ABLE TO: Knowledge results: Students will know basic historical development of processors Students will be able to divide processors based on their architecture Students will understand the basic number systems Students will understand some communication interfaces Students will know the basic principles of imaging equipment Skill results: Students will be able to design a suitable processor architecture for a particular purpose Students will understand the technologies used in imaging equipment Students will be able to express numbers in different number systems IN STUDYING EVERY CHAPTER WE RECOMMEND THE FOLLOWING PROCEDURES: I recommend to study each chapter carefully, and if it is a chapter with practical examples, I recommend to apply the procedures from the examples to other input data, thus verifying the correct understanding of the issue. METHOD OF COMMUNICATION WITH TEACHERS: Communication will take place primarily at seminars and lectures. In the event that the student needs more explanation, it will be possible to arrange for a consultation by . CONSULTATION WILL TAKE PLACE WITH A SUBJECT S GUARANTOR OR A LECTURER: at common tutorials, individual consultation after previously agreed via or telephone call. Guarantor of subject: Ing. David Seidl, Ph.D. Lecturer: Ing. David Seidl, Ph.D. Contacts: phone: , david.seidl@vsb.cz 4

5 Time for study 3 hours Objective This chapter describes the basic architecture of processors and their development. The chapter also deals with the description of the processor series: 8051, which became the basis for all subsequent generations of processors. Lecture COMPUTER SYSTEMS ARCHITECTURE AND ITS DEVELOPMENT. 1.1 Historical development of computer technology. The world of computers and the people around them is a world ruled by many business, strategic and purely personal interests. The world is dependent on the degree of human knowledge and the resulting level of science, technology, and various technologies. However, most events of major importance in this world is connected with the ideas that were born in the mind of one man, and soon caused a change of thinking and way of working throughout the collectives to gradually enforce and radically affect the operation of the computer world as such. 1.2 Basic turning points in the development of computing. From time immemorial, people have produced tools that would facilitate the implementation of various numerical calculations. One of the oldest forms was called abacus, later followed by a slide rule, mechanical adders and multipliers and other calculators. They were just passive devices performing mathematical operations at the direct instruction of man, and they were not able to elect continuation themselves. It had to be ensured by man, thus taking care of what is called control. The first way, which we might call automatic control on the basis of pre-prepared program would be various clockworks, which appeared as early as in the 14th century. (Mostly, they had pre-recorded music track they reproduced without direct human involvement.) Another form was represented by various timing devices from ordinary clock to large astronomical clock systems showing the movements of the elements of the space system. In 1724, B. Bouchon came with the idea of using program control for more practical tasks than only for entertainment, and used punched tape to control the weaving loom. In 1804, this control method was perfected by Joseph-Marie Jacquard, who replaced the paper tape with a punched card. (In both cases, weaving colorful patterns was controlled. Systems of looms on this principle were widely used even in the 1960s and 1970s, and they can be seen in some obsolete weaving operations to this day.) It was not computerized control, but some form of program and technological process control. The first attempt at program control of the progressive implementation of numerical calculations was made by Charles Babbage. He tried to build a universal computing machine driven by steam, controlled 5

6 by a program on punched cards, which should be able to decide on the continuation of the course of the calculation based on the results of previous operations. Babbage started to develop the machine in 1833 and continued for over forty years, but never finished; the development of the machine exceeded the technical capabilities of that time. Yet, Babbage had left for his followers the concept of a computing machine controlled by a program enriched with the possibilities of conditional and unconditional jumps, plus a principle of sub-programs. (Lady Augusta Ada, Countess of Lovelace, the daughter of Lord Byron, is regarded as the author of these ideas, as well as the first computer programmer. ADA, one of the programming languages was named after her.) The huge development of computers in the second half of the 20th century was conditioned not only by a huge technology development (resulting from the development of the space program at the time of the then superpower rivalry during space conquest), but also the development of theoretical disciplines for designing, developing, debugging, and other related activities in the creation of program structures. One of the most important ones was mathematical logic. In 1854, George S. Boole came up with such a model of mathematical logic which needed only three basic operators (and, or, not). With their help, he managed to assemble more complex formulations in shapes corresponding to mathematical algebra. His logic is called Boolean algebra. In his time, Boole had no idea that it will be possible to develop the technical elements for which his two-state logic will be most suitable, i.e. such Boolean algebra that contains only two elements. (Boole originally designed his algebra for any number of elements, but at least two.) The first people who first appreciated the importance of Boolean algebra included William S. Jevons, who compiled a mechanical machine performing logical operations in accordance with that algebra. However, unlike the later users, he used four-element Boolean algebra. Only in 1937, Claude Shannon showed the connection between two-element algebra with digital circuits. Logically, it had to be preceded by a few major technical and technological discoveries in the field of electrical engineering and electronics. In 1904, J. A. Fleming built the first diode, and in 1906, Lee de Forest the first triode. However, all tubes are primarily analog components working with voltage and current. Only in 1919, Americans W.H. Eccles and F. W. Jordan came to the idea of combining two triodes against each other in such a manner as to keep each other in an equilibrium state; it emerged that there are two such equilibrium states, and it is possible to pass from one to another. Thus a flip-flop was created enabling to move from one equilibrium state to another at an external stimulus, and remain there until the next external stimulus. These two equilibrium states can represent two discrete values, e.g. two logic states of yes-no (false - true), or two digits 0-1. Such values are used in the binary system. In 1936, an English mathematician Alan Mathinson Turing issued a crucial article On Computable Numbers..., which defines an abstract model of a digital computer and created a foundation for a new scientific discipline, theoretical computer science. The article discussed potential options for computers. Later, Turing wondered whether the machine - the computer is intelligent. He suggested to test the machine by comparing its answers to the same questions that had been answered by man, and if an independent interviewer does not distinguish the answers, the machine can be considered intelligent. The test is called the Turing test. Up to now, no computer has passed this test successfully. In 1937, 21-year-old Claude E. Shannon in his thesis for the first time showed the analogy between combinatorial circuits and Boolean algebra. He showed that the function of the combinational electric circuit can be described by a formula of Boolean algebra, and vice versa, an arbitrary formula of Boolean algebra can be realized by the combinational circuit. He also showed that for the realization of Boolean 6

7 formulations, just one type of component, on which logic elements NAND or NOR are realized, is sufficient. Later, Shannon dealt with the discipline information theory that deals with the quantification and efficiency of transmitted information by media channels. The result was the determination of the effective bandwidth and maximum volume of useful information in compliance with certain quality of the transmitted signal. (The theory was created for telecommunications, but soon transferred to data transmission in computer technology for the transfer of large amounts of shared data.) Computers as we understand it today began to develop during the Second World War. The greatest teams of experts were formed in the US, especially at the University of Pennsylvania, where the computer ENIAC (Electronic Numerical Integrator and Computer) was being prepared. In 1944, this group was joined by an American of Hungarian origin, a mathematician John Von Neumann, whose ideas greatly influenced the work of the group. Even before the completion of the ENIAC, the concept of an improved computer EDVAC (Electronic Discrete Variable Automatic Computer) began to develop. In 1945, Von Neumann formulates fundamental ideas and concepts of how modern computers should be designed and how they should work. This theory is known as the Von Neumann concept or as the Von Neumann architecture. 1.3 Computer generations. Computers are divided into so-called generations, where each generation is characterized by its configuration, the speed of the computer and the basic building element. (Tab) Tab 1: Computer generations Generation Year Configuration Speed (of operation/s) Components Large number of cases Units Relay Tens of cases Tubes Up to 10 cases Thousands Transistors Up to 5 cases Tens of thousands Integrated circuits 3. 1 / case Hundreds of thousands Integrated circuits (LSI) case Tens of millions Integrated circuits (VLSI) st generation The first generation of computers comes with the arrival of the electron, invented by Lee De Forest, which allows the elimination of the slow and unreliable mechanical relays. These computers are built practically by Von Neumann s scheme and they are characterized by discrete mode of operation. During this processing, a respective program and data the computer works with is loaded into computer memory. Then, calculation is started, during which it is no longer possible to interact with the computer. After completion of the calculation, the computer operator has to put the next program and its data to the computer. In the future, discreet mode of operation proves to be unsuitable as a waste of time machine. The reason for this phenomenon is a slow operator who feeds programs and data processed into the computer. At this time, the computer does not work and waits for the operator. 7

8 At this time there are no high-level programming languages, resulting in high demand when creating new programs. Moreover, there are not any operating systems nd generation The second generation of computers started with the transistor, whose discoverer was John Barden, and which, thanks to its properties, allowed to reduce the size of the entire computer, increase its speed and reliability, and reduce energy requirements of a computer. This generation is characterized by a batch mode of operation. In the batch mode, there is a tendency to replace a slow operator by the various programs, and data to be processed are placed in the so-called batch; the entire batch is put into the computer to be processed. After finishing one program, the computer immediately loads another program from the batch and continues to work. In this generation of computers, operating systems are also beginning to develop, as well as the first programming languages such as COBOL and FORTRAN rd generation Computers of the third and higher generations are based on integrated circuits, which on integrate a large number of transistors their chips. For this generation, parallel processing of multiple programs is beginning to develop, which again has the task of increasing the utilization of machine time. It is characteristic that one program either intensively uses CPU (performs a complicated computation), or e.g. uses I/O devices more (introducing data into RAM or performing print of output data). Such programs can work together on the computer, making better use of the capabilities of the computer. With the gradual development of integrated circuits, the degree of integration is increasing (number of members integrated on the integrated circuit chip). According to the number of such integrated devices, it is possible to distinguish the following levels of integration. (Tab 2) Tab 2: Levels of circuit integration Designation English name Czech name Number of logic elements SSI Small Scale Integration Malá integrace 10 MSI Middle Sclae Integration Střední integrace LSI Large Scale Integration Vysoká integrace VLSI Very Large Scale Integration Velmi vysoká integrace and more ICs can be produced using different technologies, each of which has a basic element and provides specific characteristics: TTL (Transistor Transistor Logic): fast but expensive technology. Its basic building element is a bipolar transistor. Its disadvantage is the high power consumption and the consequent heating of such large circuits. 8

9 PMOS (Positive Metal Oxid Semiconductor): technology using unipolar MOS transistor with a positive conduction channel. Because MOS transistors are controlled by an electric field and not the electric current as the TTL technology, it reduces the amount of energy consumption. But it is a slow and now unused technology. NMOS (Negative Metal Oxid Semiconductor): technology, which uses a unipolar MOS transistor with a negative conduction channel a basic element. This technology was used to the beginning of the 1980s. It is a cheaper and more efficient than technology the TTL, and it is faster than PMOS. CMOS (Complementary Metal Oxid Semiconductor): technology, combining elements of PMOS and NMOS transistors in a single design. These devices have low power consumption and the technology is used for the production of large part of today's modern integrated circuits. BiCMOS (Bipolar Positive Metal Oxid Semiconductor): new technology on a single chip combining elements of bipolar technology and CMOS technology. It is mainly used by Intel Company to manufacture microprocessors. The basic structure of the computer. Von Neumann architecture. (Fig) The idea to control the computer by a program came more than a hundred years before Von Neumann from an Englishman Babbage, who recorded his program on a punched tape, or a punched card. This system had many disadvantages. The main disadvantages were difficult realizations of jumps, or returns from sub-programs. It was always necessary to find the right point to continue on the control medium, when errors occurred during the search. Von Neumann suggested that the program should be stored in the memory as a whole, i.e. memory should not have a sequential nature, thus making it accessible as a whole - immediate access storage. Another revolutionary moment was challenging the then established idea that data and program are objects of an entirely different nature, and they should not be in any way be mixed together and stored together in one memory. Von Neumann s most significant idea for the computer architecture was the conclusion that the dates and program are essentially the same thing - a sequence of bits - whose nature is determined only by the way they are interpreted by the programmer - user. Thus, Von Neumann architecture has achieved that the computer has only one working memory - RAM. The shared memory (data and program) means that the memory has only one set of addresses and no problems with orientation arise during translation. The programs are easily transferable from machine to machine even when types of machines differ. Another feature of Von Neumann architecture is the possibility of modifications - instructions are processed as data, allowing for selfdevelopment of programs; however, at some point, this feature can become a disaster for the program in case of the programmer s error. Present-day compilers and so called generate the compiled program as its output data and store it in memory. If the data and program memory are separated and the behavior of the compiler and linker would be the same, the program module would have to be moved between memories. Another Von Neumann s idea is sequential function of the program, i.e. program instructions are executed in sequence, as shown in the record of the program. The task is divided into a sequence of steps, and these are done gradually. For the programmer, this means that the decomposition of the program - the gradual disintegration into steps is clearer and more natural. Sequential function of the program is what most criticized in Von Neumann architecture. It does not allow any substantial acceleration of the calculation. Figure 1 9

10 Figure1: Von Neumann architecture A very important idea by Von Neumann is that the computer should not be tailor-made according to the application, but should be universal. What should be tailor-made are the programs. This converts the complexity from the technical side to the programmer aspect. This drawback of this idea is the efficient utilization of hardware, and vice versa in fast applications, complexity of software control of the hardware. A summary of the properties of von Neumann computer: 1. Computer includes RAM, ALU, controller, I/O devices. 2. Regulations for the solution of the problem is converted into a sequence of instructions. 3. The information and instructions are expressed in binary way. 4. Data and instructions are stored in memory locations designated by addresses. 5. To change the order of execution of instructions, instructions of conditional and unconditional jump are used. 6. Data processing controlled by the program takes place on the computer automatically Harvard concept. Unlike von Neumann concept, Harvard concept presupposes the existence of two separate specialized memories for program and data. These computational machines are usually equipped with limited instruction set, which already prevents confusion between the storage units. Processors are used to control programmable logic, some were used in pocket calculators. 10

11 Harvard computing concepts are used in so-called distributed control systems, which are installed to control the individual nodes, standard communication and transmissions. These means are generally faster in the final operations while controlling. Programmer support e.g. debuggers are very complicated and problematic, in principle, universal computers of von Neumann type, on which the environment is emulated for Harvard means, are used to Figure 2: Harvard means develop programs for these means. Figure More advanced architecture. All uniprocessor computers are basically very slow, this follows from the principle of their operation. In the first stage, the processor reads the instruction, decodes it, reads operands, performs instruction, stores the result and then loads the next instruction. job. A variety of other architectures offer remedy of this shortcoming using other processors for one These are : - overlapping - pipelining processors - parallel systems multiprocessors - processor arrays matrix processors. Overlapping completion of one instruction affects the machine cycle of another instruction. However, this is due to the design and internal layout of the processor; it cannot be substantially influenced by the programmer or b external hardware configuration. 11

12 Pipelining sub-processors can work on two different instruction that do not directly affect each other, they mutually hand over the results after completion. This is the case of so-called queue of instructions that are ready for implementation. The speed is proportional to the number of sub-processors, their specialization, and it is limited by the slowest of them. A multiprocessor is a centrally controlled system with multiple processors with shared memory and a common set of peripherals. Sub-processors are locally concentrated around one bus and solve a common task. The initial ideas about this type of acceleration resulted from consideration of the deployed number of processors: N processors operate N times faster. Decomposing into sub-tasks that can be processed in parallel is not realistic enough to achieve full capacity utilization, algorithms of sequential nature prevail. Therefore, multiprocessor systems with specialized activities occur in computing. When using processors with separate programming, multiple flow of instructions and data is used. Processor arrays, or a matrix processor consists of the same sub-processors connected with each other and with the central controller. Each sub-processors is able to perform operations with data stored in its own memory, data can be moved only between neighboring sub-processors. Therefore, input data only enter edge processors. The central controller is linked to all sub-processors and supplies them with data always intended for elements that require the same instructions or data. Thus compiled processor arrays are mostly single-purpose machines. As in previous cases, their acceleration is proportional to the possibility to decompose the task. Sometimes, increasing the number of processors in the machine does not have the intention of increasing the speed, but increase the system reliability. Processing information is ensured by the arithmetic logic unit (ALU). Data for processing are retrieved from the memory, stored in the working registers or in the latch battery, and when the operation is completed, they possibly move back into the memory. The memory is divided into two parts, the ROM, which usually stores system programs and data used by the system, and RWM memory, where user programs are stored. In RWM memory, after power cut the contents are normally lost. 1.4 Use of computers. The computer can solve problems using the program for which the algorithm (procedure) can be determined. In this case, the whole problem can be broken down into a sequence of sub-steps, sequence of instructions. Natural languages are still inappropriate for communication with computers, programming languages, for example FORTRAN, PASCAL, C, etc., which have firmly defined structure and composition (syntax), make this communication considerably easier. Programming languages are problem-oriented (to technological process control, data processing, composing...), they contain a small number of words and commands. The aim is to facilitate the user to use a computer to solve a certain range of problems. The advantages of using computer technology are the possibilities to repeat operations, processing speed, flexibility - the computer can be programmed to solve a wide range of problems, the accuracy the computer performs calculations with an accuracy determined by the program. The disadvantage is that the computer does not have the intuition, it proceed strictly according to the program. Digital computer is built according to specific requirements. It can be used for bulk data processing - tasks with a large amount of data processed with relatively small mathematical tools, scientific calculation - an extensive set of mathematical instructions over a limited number of data. In these two areas, universal computers are often used. 12

13 A special category of computers is represented by control computers. They are intended to control physical systems, e.g. manufacturing and technological processes. These computers must respond quickly to signals. 1.5 Microcontrollers. Single-chip computers, sometimes referred to as microcontrollers, are microprocessors, designed specifically for monitoring and managing various mechanisms and processes. With integrated timers, they can operate in so-called real time (Real-Time Control Systems or Real Time Execution Systems). The first generation of these microprocessors from Intel Company includes the series is known as MCS These are eight-bit processors are based on microprocessor This series was followed by a series of the second generation marked MCS - 51, again, eight-bit microprocessors with the base member At present, it has the widest range of clones - derivatives. The third generation represents the number of sixteen-bit processors MCS The most important member of this series is Other manufacturers of microcontrollers include major companies Motorola, Siemens, Philips, Atmel, and others. 1.6 Microprocessor 8051 (8052) The original version of the 8051 microprocessor was produced by technology HMOS I, newer versions are produced using HMOS II and CMOS. Features of the processor: - The basic eight-bit ALU unit - Microprocessor timing circuits - 4 I/O eight-bit ports - 32 I/O lines - addressability of 64kB data memory - addressability of 64kB program memory - two sixteen bit counters/timers ( counters/timers) - 5 interrupt sources ( sources) - duplex serial channel - Boolean processor Eight-bit microcomputer 8051 has an equivalent number of transistors placed in DIL case. It is the successor to the development of the microprocessor 8048; in small applications it can replace 8-bit general-purpose microprocessors with the whole group of support circuits. 13

14 Time for study 10 hours Objective The chapter describes the basic number systems, conversions of entries of numbers between the individual systems. Below are the main entries of numbers into memory and expression of numbers with fixed and floating decimal point. Lecture NUMBER SYSTEMS. Most people in real life work with decimal numbers, but in digital electro-technology based on two states of the signal - two stable states of electronic circuits, it is preferable to work with other than the decimal system. The main problems are the transfers of these systems to the decimal system, which enables the most acceptable representation of results. 2.1 Binary system. This system is based on two states, 0 and 1. While, what the decimal system uses ten digits 0-9 on the basis of 10 (we can say states), binary system uses two digits, 0 and 1 on the basis of 2. Binary system uses much simpler rules than the decimal one. This simplicity makes it an almost ideal tool for control and computing technology. Installations using the binary system do not require very high intelligence from a mathematical point of view, and they are easily programmable for computing and decision-making process. This system is very well applicable for two-state electronic circuitry. A decimal number can be thought of as the result of decomposition on multiples of powers of ten: 25 = = 2 (10) + 5 (1) = 2 (10 1 ) + 5 (10 0 ) We can imagine the binary number as a decomposition into a series of powers of two 25 = = 1 (2 4 ) + 1 (2 3 ) +0 (2 2 ) + 0 (2 1 ) + 1 (2 0 ) In the binary system, the decimal number 25 is expressed as a sequence of coefficients with the respective powers 11001th. Increasing the order of the binary number is simple, additional order of a power of base 2 to the left of the last reached semantic order is added. 14

15 2.1.1 Decimal - binary conversion. Method A: Using the conversion table which includes the powers of binary number, the highest value is greater than half the value of the decimal number. (Table 3) Table 3: Converting decimal and binary number format Decimal number Binary equivalent Example 1: decimal value : 157 Bit weight (0 or 1) Binary expression: Example 2: decimal value : 98 Bit weight (0 or 1) Binary expression: Method B: The method of gradual division by two. It is applicable to large decimal numbers, it is not necessary to recalculate binary equivalents. (Table 4) Table 4: Converting decimal numbers to two by gradual division by number two Example 1: decimal value : 351 Divison 2 Divison remainder Binary number 351 : 2 Lowest order 1 Example 2: decimal value : 1268 test Divison 2 Divison remainder Binary number 1*1 = 1*(2 0 ) 1268 : 2 Lowest order 0 test 0*1 = 0*(2 0 ) 175 : 2 1 1*2 = 1*(2 1 ) 634 : 2 0 0*2 = 0*(2 1 ) 87 : 2 1 1*4 = 1*(2 2 ) 317 : 2 1 1*4 = 1*(2 2 ) 43 : 2 1 1*8 = 1*(2 3 ) 158 : 2 0 0*8 = 0*(2 3 ) 21 : 2 1 1*16 = 1*(2 4 ) 79 : 2 1 1*16 = 1*(2 4 ) 10 : 2 0 0*32 = 0*(2 5 ) 39 : 2 1 1*32 = 1*(2 5 ) 5 :2 1 1*64 = 1*(2 6 ) 19 : 2 1 1*64 = 1*(2 6 ) 2 : 2 0 0*128 = 0*(2 7 ) 9 : 2 1 1*128 = 1*(2 7 ) 1 : : 2 0 0*256 = 0*(2 8 ) Highest order 2 : 2 0 0*512 = 0*(2 9 ) 1 : 2 1*256 = 1*(2 8 ) 1 Highest order 1*1024 = 1*(2 10 ) Binary expression Binary expression

16 2.1.2 Binary arithmetic. Binary arithmetic is similar to that in the decimal system, but because only two states are used, it is much simpler. The four basic arithmetic operations are listed in Table 5. Table 5: Binary arithmetic operations addition subtraction multiplication division = = 0 0 x 0 = 0 0 : 0 = = = 1 0 x 1 = 0 0 : 1 = 0 and borrow = = 1 1 x 0 = 0 1 : 0 = infinity = 1 and carry = 0 1 x 1 = 1 1 : 1 = Hexadecimal system. Hexadecimal system is based on 16, with the individual weight coefficients are expressed as numbers 0-9 and the letters of the alphabet A - F. Similar to the octal system, the base is a power of 2 (the fourth) Decimal - hexadecimal conversion Example: the decimal number divison integer remainder test result (back transfer) : 16 = F the lowest order 15 x (16 0 ) = : 16 = x (16 1 ) = : 16 = x (16 2 ) = 0 6 : 16 = the highest order 6 x (16 3 ) = Hexadecimal expression: 602F Hexadecimal - decimal conversion can be illustrated by examination of the previous example. 2.3 Binary coded decimal system (BCD) BCD system is a special case of binary coding of the decimal number. Each decimal digit is represented by a four-bit combination of binary coding. This coding uses only 0-9 states for each decimal digit, the binary code is not fully utilized. Example: The decimal number 579 Decimal representation: BCD representation:

17 It is possible to deduce from the example that the BCD representation arises from a simple transfer of decimal digits to their binary representation. Table 6: Number systems Binary system Octal system Hexadecimal system Decimal system A B C D E F A B C D E F 2.4 Representation of numbers on a computer Representation of numbers in fixed-point arithmetic. Numbers with a fixed point have a specified value range including a fixed position of point contracted for the system. This limits the value range of results, including precision determined by a number of places representing the positions in front of and behind the floating point. The total number of places is called the display window. As mentioned-above, the number of valid places is determined 17

18 contractually, and it is possible to change the size of the display window in arithmetic calculation, i.e. to increase the range and precision (at lower levels of programming, or at the system level). In some arithmetic operations, such as division, fixed-point results lose precision. To simplify the arithmetic subtract operations, negative numbers are represented as binary complement of a binary number, while the highest bit is the sign flag. Table 7: Representation of numbers in a fixed point on a computer (16 ","8 bits) , "," , "," "," , "," , "," , "," , "," , "," , "," , (65535, ) -0, (65535, ) -1, (65535, ) "," "," "," , (32769, ) "," , (32768, ) "," , (32768, ) "," , (32768, ) "," Representation of floating point numbers. In this chapter, we start from the standard IEEE 754 Floating Point Numbers, the standard used in most computers and digital processing and control media. Furthermore, we assume Intel processor architecture called IA-32. The first processor based on this architecture was the processor Intel 386, using 32-bit registers for both operands, and addressing. IA-32 architecture is maintained in Pentium-4 processors. IA-32 architecture defines the manner of data storage in the computer memory assigning to addresses. 18

19 Representation in moving, sometimes floating point is based on the so-called scientific representation of the basic number and the exponential part. E.g., the decimal number is represented as the x 10 2 Formats fixed point have a fixed display window and the problems with precision, floating point, these problems are solved thanks to the. Gliding window with an accuracy corresponding to the range of the recorded numbers. 2.5 Numeric Data Types Integer values. (I, INT) Integer type is an integer value corresponding to the format of fixed point. Its position is on the right behind the least significant bit. Two integer data types are defined: signed and unsigned. Unsigned integer has a value from 0 to the maximum recordable value - all bits set to 1 {0 to 2 b -1, where b is the number of significant bits of the appropriate size}. In signed Integer type, the most significant bit is reserved to the sign, which moves the value range from mid to negative values, while values smaller than 0 are logged in the binary complement {- (2) b-1 to + (2) b-1 1, where b is the number of bits of appropriate format including the signed one}. Value (2) b, only the sign bit with a negative number, is sometimes referred to as indefinite, and it is used in some Figure3: Numeric data types INTEGER operations of the floating point unit (FPU). 19

20 2.5.2 Floating Point Number data FP (N) The floating point number consists of three parts: a sign, exponent and mantissa. In terms of achievable precision, the following are used: Single Precision (SP), Double Precision (DP), Double Extended Precision (DEP) (sometimes also called auxiliary real). Figure 4: Floating Point data type Sign is a one-bit information, 0 indicates a positive number, 1 a negative number. Exponent (exponent). To be able to record a positive or negative value of exponent, so called Bias is used. Bias is added to the current value of exponent. For easy precision, the bias value is 127, i.e. exponent 0 in exponent field is represented by the value 127, exponent 200 is represented by the value of = 73. The relevant values of the exponents 127 (all bits in exponent field = 0) and +128 (all bits = 1) are reserved for special numbers. For double precision, bias value is The base value of the exponent (2) is also the default value, therefore it does not have to be recorded. Mantissa, sometimes also called semantic digits, is the fractional part with the default set leading digit. In the general numeric system, it is the first non-zero semantic number. This means that exponent is adjusted so that the first digit from the left of the mantissa was zero. In the binary system, the value of the digit is 1 - mantissa stars with unit. This modified form of the number in floating point is called a normalized form. If the value of exponent part reaches 0- the lowest achievable value- further achievable reduction of exponent (2-126 ) is not achievable, and the number represented by mantissa is smaller it starts at zero this is called denormalized form. The default value of 1 for the most significant bit of mantissa is not recorded, the method can be derived from TAB for single and double precision (SP and DP). For double extended precision, this bit is given explicitly in the bit position 63, 1 for standardized form - 0 for denormalized form. The highest bit of fractional part of the mantissa is bit 62. bits The number of recorded bits for each format of floating point can be derived from the number of Table bit simple precision s = 4 B, 64-bit double precision = 8 B, 80-bit double extended precision = 10 B. Note. The double extended precision is used mainly for coprocessors and calculating units in floating point unit (FPU). For coprocessors and FPU, it is used almost exclusively internally. 20

21 Tab 8: length, precision and range of types of floating point Simple precision SP Double precision DP Double extended precision DEP length bit precision bit/dec. numbers denormalized form normalized min max min max Approximate decimal range denorm.- norm. denormal min normal max / ( )x ( )x ,4x ,4x / ( )x ( )x ,9x ,8x / ( )x ( )x ,6x ,2x Tab 9: Coding of floating point numbers and non-numeric data FPN and NaN values sign biased exponent Integer 1/ mantissa Fraction positive normal denormal zero (0) negative - zero denormal normal

22 NaN SNaN X X XX 2/ QNaN X X XX QNaN FP Not defined Single Precision width [bit] Double Precision Double Extended Precision / Integer bit with SP and FP the default value that is not displayed. 2/ Fractional portion for SnaN must be non-zero value of the most significant bit Non-numeric values. (Not a Number (NaN, SNaN, QNaN)) In addition to numerical values, values of non-numerical importance representing the results of some operations are recorded on computers. There are two categories of NaN values: SnaN - Signalling NaN, the highest bit of fractional part is set to 0. It is used to evaluate the exceptions of signals used in operations. It indicates uninitialized variables used in transmissions, or even the fact that coprocessor register was not filled with the correct value. Coprocessor usually automatically generates error status (signal *ERROR). QnaN - Quiet NaN - the highest bit of fractional part is set to 1. It is used to describe the operations, whose arithmetic results are not defined, e.g. the square root of a negative number. Abbreviated QNaN denote undefined operations, SnaN erroneous operation. Table 10: Special operation 1.operand operation 2. operand result n / Infinity 0 Infinity x Infinity Infinity nonzero / 0 Infinity Infinity + Infinity Infinity 0 / 0 NaN Infinity - Infinity NaN Infinity / Infinity NaN Infinity x 0 NaN 22

23 2.5.4 Pointer Data Types Pointer is an address - the location of an items of the particular type in the memory. Two types of pointers are defined: 32-bit Near Pointer and 48-bit Far Pointer. Near Pointer is used as an offset in the segment model; to determine the address within the segment in which it is applied, it is also called the effective address. Far Pointer - the logical address - consists of a 16-bit segment selector and a 32-bit Offset. Far Pointer is used in the segmented memory model, to specify the place when the segment is expressed explicitly Bit Field Data Type Bit Field Data Type is a sequence of bits that can begin at any bit position of any bit in memory, and it can contain up to 32 bits. Figure 5: Bit field String data types. Strings are continuous sequences of bits, bytes, words, or double words. Bit string can begin at any bit position of any byte, and can contain up to bits. Byte string contains bytes, words, or double words and may range from bytes (4 GB). Packed SIMD data types. Pozn. Packed = condensed form Packed types are used by the IA-32 architecture in SIMD operations in 64-bit and 128-bit format. These data types consist of basic data types (packed bytes, words, double words, and quadruple words) and numerical interpretation of basic types for use in packed integer operations and packed floating point calculations. BCD and packed BCD integers Note Packed decimal = decimal number in a condensed form (1 number = 4 bits) 23

24 Binary coded integers (BCD integers) are 4-bit unsigned integers with valid values from 0 to 9. IA-32 architecture defines operations on BCD integers located in one or more general-purpose registers, or in one or more floating-point unit (FPU) registers. When used in general-purpose registers, the value unpacked BCD integer is located in the lower half-byte (bits 0-3), upper half-byte (bits 4-7) may have any value in the addition and subtraction, but it must be filled with zeros in multiplication and division. Packed BCD form contains a semantic digit in every half-byte, while the number in the upper half-byte is more significant than that in the lower half-byte. In the operations on BCD integers in 80-bit data registers FPU (such as Intel x87), the reference is similar. Registers are 10-byte, 18 BCD digits can be recorded in the lower 9 bytes, the lowest semantic numbers is placed in the lower half of the lowest byte (LSB), the highest semantic number in the upper halfbyte of byte 9. In the highest 10th byte, the top bit contains a sign (0 - positive, 1 - negative), the remaining bits 0-6 have no meaning. Negative numbers are not stored as double complement, they differ only in sign Figure 6: BCD data types from the positive figures. Values range from to Table 11: Coding of packed decimal integers highest byte value 7. bit- Sign bit number 17 number 16 number 15 number 14 number 00 positive largest smallest zero negative zero smallest largest packed BCD integer infinity byte 9. bytes Note: Packed BCD integer infinity in hexadecimal expression: 24

25 25 FFFFC H.

26 Time for study 2 hours Objective The chapter describes the standard RS232 interface as one of the most common external interfaces and it also describes I2C interface as one of the most common internal auxiliary communication interfaces. Lecture SELECTED EXTERNAL AND INTERNAL COMMUNICATION INTERFACE 3.1 Standard RS-232 C/V.24 and V.28. The simplest hardware means for communication between computers or a computer or a device with bidirectional communication is interface called RS-232-C according to the US standard. The European equivalent of the serial interface with the designation V.24 operated with electrical parameters according to the recommendation V.28. Although the interface is standardized by standardization authorities (CCITT, EIA, DIN) the connection between the two devices is not problem-free. If we combine the two spots with two-point data link, and if the transmission between them is serial, i.e. if the individual information elements (bits) of the information unit (byte) are transferred gradually, we talk about serial data circuit (serial data transfer). The data line is composed of data transfer terminal equipment (DTTE). Stations A and B can exchange data via a data circuit. Data circuit consists of a transmission circuit with two data transfer ending devices (DTED). CCITT Standard refers to the DTE (Data Terminal Equipment) and DCE (Data Communication Equipment). In terms of computer applications DTTE = DTE = computer and DTED = DCE = modem (MOdulator - DEModulator). The modem converts the output signal of DTTE to alternating analog signal (two different frequencies representing two signal values), and then sends it the transmission medium (e.g. telephone network). At a small distance - a short circuit between DTTE (to 15m), it is possible to omit the data circuit and connect both devices directly - null modem. Data are transferred serially and asynchronously - arrhythmically via this interface. Transmission within one sign runs synchronously, i.e. with a constant length of the individual bits of the sign, but characters are transmitted asynchronously. To ensure synchronization, each transferred sign is supplemented with so called starting element start bit, which initiates the transmission of each character. The start bit is followed by the message bits - the transmitted character - and at the end there is a closure element stop bit(s) (1, 1 1/2, 2) signalling the end of the message. Additionally, so called parity bit can be inserted between the transmitted sign and the closure element to protect the transmitted information. The quiescent level of the transmission line is usually at a logical level 1. The starting element, a start bit is derived from the decrease to the logic level 0 for a period corresponding to the transmission of one bit. In conjunction with the standardized RS-232 C interface, it is to be noted that the signal levels do not match the habits of computer technology. The logic level 1 is characterized by voltage of -5 to -15V and the logic level 0 by voltage of +5V to +15V (forbidden zone V). Mechanical design of interface uses the connector CANNON with 25 contacts, in the modification CANNON with 9 contacts. The terminal equipment DTTE has the connector with pins (MALE), the ending device DTED has the connector with terminals (FEMALE). The distribution of signals on the connector with pins is shown in Table

27 Table 12: Distribution of signals, RS-232C on the connector and variants Terminal name Connector CANNON Variant Direction DCE DTE CCITTV.24 PCRS-232 C 9 pins 25 pins small medium large (DTED DTTE) 101 FG 1 * * * 102 SG 5 7 * * * 103 TxD 3 2 * * * < 104 RxD 2 3 * * * > 105 RTS 7 4 * * < 106 CTS 8 5 * * > 107 DSR 6 6 * * > CDTL 20 * > DTR 4 20 * * < 109 DCD 1 8 * * > 110 SQD 21 * > 111 DSRS 23 * < 112 DSRS 23 * > 113 TC 24 * < 114 TC 15 * > 115 RC 17 * > 118 STD 14 * < 119 SRD 16 * > 120 SRTS 19 * < 121 SCTS 13 * > 122 SDCD 12 * > 125 RI 9 * * > Further explanation of some signals: DCD - peripherals tells the relevant DTTE that the level is within the allowable voltage range. DTR, DSR - equipment, DTTE or DTED is activated (connected to power supply), and initialization sequence has run on it. Until DTR signal is active (on L level - theoretical grounding of this line), transmission does not occur regardless of the status of the other links. RTS - a request is sent from DTTE to transmit data CTS - peripherals reports that it is ready to receive data (response to RTS signal). The data transfer can occur only if both signals (CTS and RTS) are active. RI - DTED announces the connected DTTE arrival of call from the opposite DTED. 27

28 In practice, not all signals of RS 232C interface are usually used - devices are not equipped with all signals. A distinction is made between small, medium and large variation of interface circuits. All can provide bidirectional, as well as unidirectional AC, or only unidirectional transmission. They differ in the number of signals used. 3.2 Internal communication interface I2C Description of a bus I2C bus was designed by Philips Semiconductors Company for one-chip microcontrollers to communicate with other digital circuits. I2C is a bi-directional two-wire bus. It is sometimes incorrectly referred to as a serial line. The abbreviation I2C indicates Inter Integrated Circuit Bus. Basic characteristics of the bus consists of two lines. SDA is used for bidirectional data transfer and SCL line is used as a clock signal. Both lines operate at logic voltage levels, in accordance with TTL technology. In the resting state, the Figure 7: Start and stop sequence of bus I2C two lines are in the log level 1. This state is maintained by two lifting (pull-up) resistors. The outputs of digital circuits are designed as an open-type output collector. This ensures bidirectional character of the line. The bus can be connected to multiple devices. Usually, one device called the Master controls the sending and receiving of messages. Other devices, called the Slave, when prompted by the superordinate circuit receive or transmit data. There may be multiple devices of the Master type on the bus, but such connection is no longer a simple system suitable for teaching. Synchronization is performed by a clock signal SCL. One bit is always transmitted in a single clock cycle. Figure xxx shows the transmission of the values 0 and 1. It is clear from the figure that the data signals always change only when the SCL signal is on the level of log. 0. If there is a change of SDA signal when the SCL signal is at the level of log. 1, it is the case of control signals. Given the number of wires of I2C bus, only two control signals can be defined, the control signals START (S) and STOP (P). The progress of these signals can be seen in Figure 7. 28

29 Figure 8: Waveforms on the bus I2C The verbal description is as follows: from the idle state, when signal SDA and SCL are in the log. 1, we have to go into the communication mode by signal START. By this we mean the transition of SDA signal from log. 1 to log. 0 at a constant value of SCL signal in log. 1. Only then, the transition of SCL signal from log. 1 to log. 0. has to follow. To end the communication, we have to put both SDA and SCL lines to idle status. We will do this using STOP signal, which first represents setting SCL to log. 1 and then setting SDA to log. 1. Communication by bytes When transmitting data signals between START and STOP, the amount of data transferred is not limited. However, data are not transmitted bit by bit, but through bytes. Figure 8 shows not only transfer of a single byte, but also other important part of the transmission of information. That is the confirmation. Each circuit must confirm that it received a byte by ACK bit, which is log. 0 of SDA line in the next clock cycle after transmitting the byte. Confirmation may also be NACK, i.e. negated ACK, which is the value of log. 1 of SDA line (master indicates that it terminates data transfer). In Figure xxx, note behaviour of the transmitter (Master) in the ninth clock cycle, when ACK signal from the receiver (Slave) is expected. The transmitter sets SDA to log. 1 to prevent its output from affecting the SDA line (see information above about open collector output). The Master must set SDA to a standstill on log. 1 before receiving each bit from the slave circuit. I2C bus can be connected to multiple circuits simultaneously, therefore, each circuit must have its unique address, so that it can be addressed. Each address has eight bits, which are further divided into a part that will be determined by the user, and the part determined by the manufacturer of the circuit. 29

30 Time for study 8 hours Objective The chapter describes the display elements, which are now used for computers. The introduction describes now already historical CRT technology, as well as the technology of plasma and LCD displays. Lecture DISPLAYS A display is a computer output device used for displaying text and graphical data. It consists of the electrooptical converter which converts the electrical signals generated by display controller (sometimes also image adapter) to visible light. The display usually is characterized by higher resolution finer graphics than television standard (for analogue television broadcasting with 625 lines) and higher requirements with respect to linearity deflection. It does not include high-frequency or demodulation circuitry and audio circuitry. The parts of the computer involved in the output image data are referred to as the imaging subsystem. This subsystem includes programs mediating link between hardware and application programs, so called drivers of image adapters. Over the time, several standards of software interface between the application and the graphics subsystem have stabilized. Electrooptical converter with the necessary electronic circuits (except the controller) is integrated into a single unit of the screen. Optical output of the screen in the conventional form is designed as a tube screen; at first, in portable versions of computers, flat plasma, electroluminescent, and LCD converters occurred. Especially the latest model became independent from laptops and is used as a standalone monitor with traditional PC systems. For producing visible character or graphic image data, two basic principles are used: the raster, as in most printers, less frequently vector, as in recorders. The most important parameters of imaging subsystems include: resolution indicates the maximum number of picture elements (pixels) that can be displayed individually on the screen faceplate. This parameter depends on the capabilities of the video adapter, as well as on the screen used. Determining this parameter in the development of technical means is based on statistical data of the physiology of the human eye and the size of the screen. For PCs, a resolution of 640 x 480 (VGA) or 800 x 600 (Super VGA) is still used. The new graphics cards tend to have a 1024 x 768 resolution (8514/A, Super VGA), 1280 x 1024 (TIGA), and more. frequency of the vertical sweep it indicates how many times per second the information on the screen faceplate is updated. We must realize that the image is static, so the frame frequency of 25 frames used in television (24 frames in the film) is totally inadequate, insufficient frequency of 50 Hz is also used in older screens. Again, it depends on the ability of the human eye, which is capable of perceiving more details in the static image. Too low frequency causes flickering, especially in the case of dark text on a light background. Currently, in the so-called ergonomic displays, the frequency of 72Hz is considered the minimum. On the other hand, higher frequency imposes higher demands on hardware adapters graphics mode method of forming an image on the screen faceplate by displaying individual image elements. When restoring the image, they are read from the image memory, and the 30

31 individual bits carry information about the luminance of each colour component. The opposite graphic mode is a character mode, where ASCII codes and attributes of whole characters displayed are encoded in the image memory. The most widespread electro-optical converters are still screens. They use a combination of thermal emissions on heated cathode and conversion of electrons to photons to the luminescent layer of the faceplate, luminophore, in the vacuum space. The intensity of the light emitted after electron incidence decreases depending on the type of luminophore; it is referred to as the afterglow. One course of the beam across the faceplate creates only temporarily visible trace. To permanently visible image, it is necessary to renew this track. Fast enough periodic refresh eliminates fluctuations in the intensity of light blinking image. If luminophores with long afterglow -Long inertia were used, streaks the remains of the previous image would remain on the screen. It is necessary to choose a compromise between the types of luminophores corresponding to physiological perception of man. In 1897, a German physicist Ferdinand Braun, a Nobel Prize winner, discovered cathode ray tubes, which are the basis of the screen. Computer screens use exclusively electromagnetic beam deflection, electrostatic focus, and deflection angle of 110. In the next part, we will deal only with colour screens, although monochrome screens make up a significant share of the market. Colour screens are relatively complex devices with high demands o precise production. Three electron guns, each representing one primary colour (red R, green - G, blue - B) form a summary image on a common screen faceplate. The faceplate is composed of small, in a particular sample repeating spots or bars. They are divided into conventional (hereafter called Delta, according to the Greek letter illustrated by triangle with corresponding structural geometries of deployment electron guns) and the Trinitron. Another division is according to the type of the screen faceplate into the screen with flat or cylindrical surface. - as mentioned above, a triangular layout of electron guns is used - guns and colour active dots on the the screen faceplate. Beams from electron guns penetrate the perforated invar mask positioned in front of the faceplate, wherein the path of the individual beams should intersect in the plane of the mask. After passing the mask, they illuminate the luminophore section of the same colour. If it does not happen, the deflected beam is thrown onto the faceplate so that it lights up the surrounding dots, in addition to its own luminophore dot, thus causing a colour error. The distance between the individual dots of the mask of the delta screens (dot-pitch) ranges from 0.28 to 0.31 mm. The mask consists of a metal foil (0.15 mm thick), with circular holes (400 to 600 thousand) located at a certain distance in front of the faceplate. Colour surfaces of the luminophore are arranged so that each colour is located at the apex of an equilateral triangle. The mask is inserted into the screen during production of the glass flask, the holes are formed by etching. The mask also serves as a template for the photochemical deposition of luminophore. size of the screen - is expressed in inches (2.54 cm) as the screen diagonal length. Diagonal screens evolved from 10" in the oldest systems over 12", 14", 15" for standard use, to 17", 19", 21"and more for use in graphics applications such as CAD. Reduced sizes also work in graphics applications, but the picture is very cramped. Special sizes for displaying two A4 formats is used for DTP (Desk Top Publishing) e.g. for journalism. 4.1 Principles of electro-optical converters. 31

32 4.2 Types of Screens Figure9: The principle of Delta screen Figure 10: The pronciple of TRINITRON screen Screen Trinitron - Sony invention, electron guns - guns are juxtaposed in a horizontal plane (therefore the name in line), green in the middle, and two extreme, blue and red, they are slightly angled towards the centre (1.5 ) so that electron paths passed through the centre of the joint focussing electrostatic lens (the space between the electrodes). Beams then pass through the mask with vertical slotted holes. Because the mask slots are virtually non-deformable, there is no image distortion, ensuring its high quality. Slotted perforation dramatically reduces the total area of the dark (unlighted) locations on the faceplate and significantly increases the achievable brightness and contrast of the Trinitron screen. 32

33 4.2.2 Delta screen Screen in-line (Croma Clear) In 1997, technological innovation from NEC Company appeared on the market, when a screen called CromaClear was introduced. It is basically a combination of better qualities of Trinitron and Delta earlier technologies. The geometry of the electron guns is in line, but the mask is perforated as in DELTA Figure 11: In line display, CROMA CLEAR screen, only openings are not circular, but rectangular in alternating strips. 4.3 Properties and evaluation criteria of screens The shape of the faceplate. The type of screen is important in terms of the shape of the faceplate. The cylindrical screen is susceptible to distortion, which is caused by problems of gripping the perforated mask in a curved shape, on the other hand, focusing the focus of the electron beam is simpler. Flat screen has significantly better (lower) capability for reflecting incident stray light and a larger active area of the image. Smaller mask deformation ensures less distortion, however, the focus of the electron beam is more complex (unequal length of paths of electrons hitting the faceplate) resulting in higher price of the screen Pitch of colour dots The parameters of the screen also include Dot Pitch, spacing between individual colour dots. The smaller the pitch, the sharper the image, which also can be traced from smaller distances without the distraction of discomfort due to seeing the details of the geometry of the screen. The question is how much more the pitch can decrease; for example, in 1995, the normal pitch for the better screens was reported to be 0.28 mm, in 1997 it was only 0.26 mm. At present, so-called screens with superfine grid with pixel pitch of 0.24 mm or less are offered. 33

34 4.3.3 Anti-glare protection Reflection of light incident on the screen faceplate results in a reduction of the contrast and increased eye fatigue. For older screens, it is advisable to use filters reducing the amount of reflected stray light. It is necessary to regularly remove dust deposited due to static electricity from the filter and screen. Good results were achieved by polarizing filters. Currently, anti-reflective coating directly on the screen are they used; the filter manufacturers promise also reducing harmful emissions and influence of magnetic and electrical fields Dynamic focus Sharpness of the image on the screen depends on the quality of the screen. Dynamic focus improves sharpness by adjusting the difference in length between the dots in the centre and in the corners of the screen. This ensures that the electronic beam is properly sharpened in the corners of the screen as Figure 12: Dynamic focus well. The result is sharpening an image over the entire surface. Legend: Image with dynamic focus, Image without dynamic focus Image Quality Computer technology users require the best possible image on the screen in front of which they spend several hours a day. To obtain optimum quality and adjusting of the screen to the video card and the application used, the screen should be equipped with adjustment elements (analog or digital- on screen), which would be possible to use to optimize all parameters. Description of the image quality is divided into the following sections: Convergence the precise adjustment of the incidence of an electron beam of each colour to corresponding colour pixels. Convergence defects occur mainly in the corners of the screen, where they cause chromatic (colour) deviations. For example, a white diagonal line through the screens in the corners of the screen acquires a tinge of colour. For repair and adjustment of convergence, screens have adjusters 34 Figure 13: Convergence setting

35 of horizontal and vertical convergence, horizontal centring and adjusting the width of the image. Geometry - Setting geometry includes preventing - pincushion - concave or convex distorted vertical lines, - trapezoid - trapezoidal distortion, - orthogonality - bevelling - a rectangular image becomes a rhomboid image, - tilt - tilting the entire image from the surrounding vertical and horizontal lines, - degaussing - setting the purity of colour whose distortion occurs due to magnetic fields. In modern screens, demagnetization takes place every time they are turned on; moreover, they are equipped with a control element Degaussing. Resolution / pixel size - is the number of elements of the image (pixels) that can be displayed on the screen. The ratio of the horizontal to the vertical resolution is always the same, 4:3. The following table lists the maximum resolution recommended for different screen sizes. For ergonomic reasons, the recommended maximum spacing between modes (dot-pitch) is 0.28 mm. The higher resolution we want to achieve, the smaller the pixel size should be. Quality professional monitors should reach at least such values of the resolution as given in Table. Table 13: Resolution / pixel size Diagonal [ ] Maximum resolution Dot pitch [mm] x x x x x Horizontal / vertical frequency Horizontal frequency (line frequency), the number of elementary tracks of the electron beam within one second in khz. Vertical frequency (image frequency) is the amount of image changes in one second (refresh) in Hz. To eliminate flicker, vertical frequency should not achieve values below 75 Hz. 35

36 Figure 14: Relationship between horizontal and vertical frequency Plug & Play this technology is related to technologies in the production of computer components (motherboards, interface cards) and operating systems such as Windows 95 and higher. The operating system is able to correctly identify the connected component and assign the appropriate drivers to it, so that the user does not have to install them (set addresses, interruption etc.). For screens, the following standards are used: DDC 1 (Display Data Channel) It is the least restrictive one-way data transmission standard. The screen continuously transmits information via video cable to the PC (video cards and software) through unidirectional data channel. This information includes the type of monitor, the achievable resolution, and corresponding frequencies. All these parameters can be adjusted to obtain the highest achievable resolution with a maximum vertical frequency. DDC 2B - one-way data transmission. Data recorded in the DDC 1 are transmitted from the monitor only on request from the PC (graphics card and software). DDC 1/2B the screen supports both standards (DDC 1 and DDC 2B) If the PC does not support DDC 2B, the monitor operates in mode DDC 1. DDC 2AB it has a two-way communication. This standard supports DDC 1/2B, plus parameters such as brightness, contrast, tilt steering (tilt), etc. can be set in it. Graphics cards, screens, and application software (e.g. DOS or Microsoft applications) try to meet that standard. As with the DDC 1/2B the video data channel is used for transmitting data. 36

37 Table 14: Comparison of the quality parameters of screens by type Screen type Delta Trinitron CromaClear Sharpness ** *** *** Convergence ** *** ** Contrast * ** ** Colour purity ** *** *** Image stability *** * ** Raster moire * ** ** Image clarity *** * *** 4.4 Screen In display Raster-type The raster type is based on the analogy with television viewing. The main difference is that the TV image is formed from two interlaced fields (first half of the frame is composed of odd lines, the second one of even lines of the image), the image on the monitor screen is non-interlaced. 37

38 Figure 15: Rater-type monitor timing Beam of electrons emitted by jets is first directed to the upper left corner of the screen faceplate by means of scan circuitry. Then, due to the line scanning circuit, it moves horizontally from left to right, and due to frame decomposition circuit, it moves vertically from top to bottom over the screen faceplate. The beam is modulated according to the data signal, the more or less phosphorescent is luminophore at the spot of incidence of the beam. Suitable luminophore phosphorescence inertia and inertia of the human eye enables the user to perceive the image as comprehensive. At the end of each line, blanking pulse is inserted which overlaps so called flyback of the beam (at the end of the active part of the screen within the line to the beginning of the next line). At the end of the image, i.e. at the end of the vertical movement, longer blanking pulse follows to return the beam to its starting position in the upper left corner. The rate of decomposition is decisive for the resolution and image stability (to prevent the image from flickering). On the screens where the picture is without interlacing (compared to television), at frame rate of 50 Hz, it is possible to ensure resolution of up to about 830 x 312 pixels. For higher resolution, it is necessary to increase the frequencies of both decompositions. Currently, the recommended frequency of the vertical decomposition is above 72 Hz. 38

39 Figure 16: Rastr-type display Vector type This type of monitor is more similar to an oscilloscope. However, electromagnetic deflection is preferred against electrostatic. Two sets of deflection coils are strung on the screen neck. The basic requirement is that the system worked quickly, which is determined by the amount of information displayed without blinking. This is achieved using large currents in the deflection coils. Therefore, an important part are amplifiers transferring small voltage signals to high currents. Voltage for deflection amplifiers are derived from the computer data by the controller. The data represent coordinates of important points of drawn objects (vertices, endpoints of vectors, control points of curves). The image controller generates (interpolates) continuous values of these points, from which deflection currents are derived. Interpolators are either analog or digital. Vector displays achieve higher resolution than the raster ones. The speed of drawing vectors is substantially higher (100 to 3000 m/s). Vector displays are not suitable for marking surfaces (hatching, colouring), trace on the screen faceplate is volatile. For these reasons, they are rarely used. 4.5 Plasma display Plasma - it is a quasi-neutral set of particles with free electric charge carriers, which behave collectively. It means that the substance contains at least a small amount of electrically charged particles which are in the whole volume electrically neutral and are able to react to electric and magnetic fields as a whole. Since the 1960s, panels that would allow large-screen projections with respect to the lack of space have been intensively developed, the first usable specimens left production lines in the 1990s. Currently, dozens of different types of models are available. 39

40 Figure 17: Plasma display The plasma display is a display unit operating on the principle of electric discharge in a gas at reduced pressure (about kpa). Between the front glass panel and rear panel, the individual image cells are placed. The plates are spaced by a few thousandths of a millimetre. In front of each cell, there is a magnesium oxide layer separating the cell from two strip electrodes (image and auxiliary electrodes) oriented perpendicular to each other. These are separated from the front glass plate by a dielectric. Tree cells equipped with RGB luminophores (red, green, and blue) form a single pixel. Cells are separated from the rear plate with a glass layer. For each image cell, one data electrode is required. They are perpendicular to the image electrodes PDP work cycle The individual cells are driven with alternating voltage. Between the image and auxiliary electrode, voltage (about 200 V) is applied. This causes an initial ionization. In a given cell, after supplying voltage between the data and image electrode, the discharge is lit up. Steady discharge occurs after applying alternating voltage (about 50 V). The gas in the cell is excited and UV radiation arises during deexcitation, which emits light with a given wavelength when incident on the luminophore. For another cycle, it is needed to bring low voltage between the image and auxiliary electrode; it neutralises the charge in the cell, and the cycle can begin anew. Each cell thus behaves like a bistable, the image is stable and completely free from flicker. 40

41 Table 15: Advantages and disadvantages of plasma displays Advantages of PDP large diagonal (until 300 cm) the display is relatively thin (about 80 mm) good colour purity high speed response of pixels wide viewing angle (> 160 ) Disadvantages of PDP worse brightness and contrast problems with miniaturization high power (400 W) heating low life (about 50% compared to conventional CRTs) high price (due to great waste in production) very low sensitivity to ambient heat 4.6 LCD Monitors Liquid crystals Liquid crystals are anisotropic liquids, i.e. substances with different properties in different directions. This property is caused by the molecules that spontaneously arrange themselves directionally in a range of temperatures above the melting point. They do not have a spherical shape. They keep their arrangement even though the fluid normally flows and takes the shape of the container. Liquid crystal phase exists only in a certain temperature range between the solid phase and isotropic liquid-mesomorphic phase. Currently, more than 10,000 of these substances are known. For liquid crystals, we distinguish between two basic types: with a nematic and smectic arrangement. In the nematic phase, the molecules are free and can move in all directions, or there is no positional arrangement. Yet, on average, they stick to one direction. If the molecules that form nematic liquid crystal are chiral, this phase is called chiral nematic (cholesteric). In this state, the molecules tend to be mutually slightly turned. This means that in each layer of material, their direction is slightly different and they form a spiral. Chiral nematic structure is the most commonly used in displays. These displays, which are used e.g. in watches, are called Twisted Nematic LCD. In the smectic state, there is positional arrangement within one dimension, which means that the molecules are arranged in layers. Certain smectic phases have positional arrangement in more than one dimension. Similar to chiral nematic phase, there is a chiral smectic phase. In the same manner as in the cholesteric phase, even here the direction of the molecules rotates across the layers, this means that in each layer, the molecule is slightly turned. 41

42 Figure 18: Liquid crystal phases LCD - Liquid Crystal Display LCD - Liquid Crystal Display are flat panel displays based on the exploitation of changes in the optical properties of liquid crystals in response to changes in electric fields that act on them. It is the most common method of applying liquid crystal display technology. For the construction of the LCD panels, nematic liquid crystals are used, or only the properties of the nematic phase are utilized. Crystals are based on hexyl-cyanide-biphenyl whose molecules have an elongate (rod-like) shape. The first layer a glass plate is covered by a thin layer of metal oxide which acts as an electrode. This film is arranged in columns and rows (passive matrix display) or individual images (active matrix display). Figure 19: The principle of LCD displey (Left side - the light passes through, right side - the light does not pass through the side) 42

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari

Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari Sequential Circuits The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory

More information

Chapter 4. Logic Design

Chapter 4. Logic Design Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table

More information

Chapter 9 MSI Logic Circuits

Chapter 9 MSI Logic Circuits Chapter 9 MSI Logic Circuits Chapter 9 Objectives Selected areas covered in this chapter: Analyzing/using decoders & encoders in circuits. Advantages and disadvantages of LEDs and LCDs. Observation/analysis

More information

Contents Circuits... 1

Contents Circuits... 1 Contents Circuits... 1 Categories of Circuits... 1 Description of the operations of circuits... 2 Classification of Combinational Logic... 2 1. Adder... 3 2. Decoder:... 3 Memory Address Decoder... 5 Encoder...

More information

UNIT 1: DIGITAL LOGICAL CIRCUITS What is Digital Computer? OR Explain the block diagram of digital computers.

UNIT 1: DIGITAL LOGICAL CIRCUITS What is Digital Computer? OR Explain the block diagram of digital computers. UNIT 1: DIGITAL LOGICAL CIRCUITS What is Digital Computer? OR Explain the block diagram of digital computers. Digital computer is a digital system that performs various computational tasks. The word DIGITAL

More information

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it,

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, Solution to Digital Logic -2067 Solution to digital logic 2067 1.)What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, A Magnitude comparator is a combinational

More information

Chapter 3. Boolean Algebra and Digital Logic

Chapter 3. Boolean Algebra and Digital Logic Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how

More information

TYPICAL QUESTIONS & ANSWERS

TYPICAL QUESTIONS & ANSWERS DIGITALS ELECTRONICS TYPICAL QUESTIONS & ANSWERS OBJECTIVE TYPE QUESTIONS Each Question carries 2 marks. Choose correct or the best alternative in the following: Q.1 The NAND gate output will be low if

More information

MODULE 3. Combinational & Sequential logic

MODULE 3. Combinational & Sequential logic MODULE 3 Combinational & Sequential logic Combinational Logic Introduction Logic circuit may be classified into two categories. Combinational logic circuits 2. Sequential logic circuits A combinational

More information

Logic Design Viva Question Bank Compiled By Channveer Patil

Logic Design Viva Question Bank Compiled By Channveer Patil Logic Design Viva Question Bank Compiled By Channveer Patil Title of the Practical: Verify the truth table of logic gates AND, OR, NOT, NAND and NOR gates/ Design Basic Gates Using NAND/NOR gates. Q.1

More information

IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology.

IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology. IC Layout Design of Decoders Using DSCH and Microwind Shaik Fazia Kausar MTech, Dr.K.V.Subba Reddy Institute of Technology. T.Vijay Kumar, M.Tech Associate Professor, Dr.K.V.Subba Reddy Institute of Technology.

More information

Digital Logic Design: An Overview & Number Systems

Digital Logic Design: An Overview & Number Systems Digital Logic Design: An Overview & Number Systems Analogue versus Digital Most of the quantities in nature that can be measured are continuous. Examples include Intensity of light during the day: The

More information

WINTER 15 EXAMINATION Model Answer

WINTER 15 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

Microprocessor Design

Microprocessor Design Microprocessor Design Principles and Practices With VHDL Enoch O. Hwang Brooks / Cole 2004 To my wife and children Windy, Jonathan and Michelle Contents 1. Designing a Microprocessor... 2 1.1 Overview

More information

Logic Devices for Interfacing, The 8085 MPU Lecture 4

Logic Devices for Interfacing, The 8085 MPU Lecture 4 Logic Devices for Interfacing, The 8085 MPU Lecture 4 1 Logic Devices for Interfacing Tri-State devices Buffer Bidirectional Buffer Decoder Encoder D Flip Flop :Latch and Clocked 2 Tri-state Logic Outputs

More information

Introduction to Digital Electronics

Introduction to Digital Electronics Introduction to Digital Electronics by Agner Fog, 2018-10-15. Contents 1. Number systems... 3 1.1. Decimal, binary, and hexadecimal numbers... 3 1.2. Conversion from another number system to decimal...

More information

Helping Material of CS302

Helping Material of CS302 ABEL : Advanced Boolean Expression Language; a software compiler language for SPLD programming; a type of hardware description language (HDL) Adder : A digital circuit which forms the sum and carry of

More information

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam

CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam MIDTERM EXAMINATION Spring 2012 Question No: 1 ( Marks: 1 ) - Please choose one A SOP expression is equal to 1

More information

WELCOME. ECE 2030: Introduction to Computer Engineering* Richard M. Dansereau Copyright by R.M. Dansereau,

WELCOME. ECE 2030: Introduction to Computer Engineering* Richard M. Dansereau Copyright by R.M. Dansereau, CHAPTER I- CHAPTER I WELCOME TO ECE 23: Introduction to Computer Engineering* Richard M. Dansereau rdanse@pobox.com Copyright by R.M. Dansereau, 2-2 * ELEMENTS OF NOTES AFTER W. KINSNER, UNIVERSITY OF

More information

Data Sheet. Electronic displays

Data Sheet. Electronic displays Data Pack F Issued November 0 029629 Data Sheet Electronic displays Three types of display are available; each has differences as far as the display appearance, operation and electrical characteristics

More information

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics

Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Introduction to Digital Logic Missouri S&T University CPE 2210 Exam 3 Logistics Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and

More information

MODULAR DIGITAL ELECTRONICS TRAINING SYSTEM

MODULAR DIGITAL ELECTRONICS TRAINING SYSTEM MODULAR DIGITAL ELECTRONICS TRAINING SYSTEM MDETS UCTECH's Modular Digital Electronics Training System is a modular course covering the fundamentals, concepts, theory and applications of digital electronics.

More information

ELEN Electronique numérique

ELEN Electronique numérique ELEN0040 - Electronique numérique Patricia ROUSSEAUX Année académique 2014-2015 CHAPITRE 5 Sequential circuits design - Timing issues ELEN0040 5-228 1 Sequential circuits design 1.1 General procedure 1.2

More information

DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES

DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES DIGITAL CIRCUIT LOGIC UNIT 9: MULTIPLEXERS, DECODERS, AND PROGRAMMABLE LOGIC DEVICES 1 Learning Objectives 1. Explain the function of a multiplexer. Implement a multiplexer using gates. 2. Explain the

More information

TV Character Generator

TV Character Generator TV Character Generator TV CHARACTER GENERATOR There are many ways to show the results of a microcontroller process in a visual manner, ranging from very simple and cheap, such as lighting an LED, to much

More information

CS302 - Digital Logic & Design

CS302 - Digital Logic & Design AN OVERVIEW & NUMBER SYSTEMS Lesson No. 01 Analogue versus Digital Most of the quantities in nature that can be measured are continuous. Examples include Intensity of light during the da y: The intensity

More information

EEE130 Digital Electronics I Lecture #1_2. Dr. Shahrel A. Suandi

EEE130 Digital Electronics I Lecture #1_2. Dr. Shahrel A. Suandi EEE130 Digital Electronics I Lecture #1_2 Dr. Shahrel A. Suandi 1-4 Overview of Basic Logic Functions Digital systems are generally built from combinations of NOT, AND and OR logic elements The combinations

More information

North Shore Community College

North Shore Community College North Shore Community College Course Number: IEL217 Section: MAL Course Name: Digital Electronics 1 Semester: Credit: 4 Hours: Three hours of Lecture, Two hours Laboratory per week Thursdays 8:00am (See

More information

Synchronous Sequential Logic

Synchronous Sequential Logic Synchronous Sequential Logic Ranga Rodrigo August 2, 2009 1 Behavioral Modeling Behavioral modeling represents digital circuits at a functional and algorithmic level. It is used mostly to describe sequential

More information

TEST-3 (DIGITAL ELECTRONICS)-(EECTRONIC)

TEST-3 (DIGITAL ELECTRONICS)-(EECTRONIC) 1 TEST-3 (DIGITAL ELECTRONICS)-(EECTRONIC) Q.1 The flip-flip circuit is. a) Unstable b) multistable c) Monostable d) bitable Q.2 A digital counter consists of a group of a) Flip-flop b) half adders c)

More information

CS302 Glossary. address : The location of a given storage cell or group of cells in a memory; a unique memory location containing one byte.

CS302 Glossary. address : The location of a given storage cell or group of cells in a memory; a unique memory location containing one byte. CS302 Glossary ABEL Advanced Boolean Expression Language; a software compiler language for SPLD programming; a type of hardware description language (HDL) Adder A digital circuit which forms the sum and

More information

Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology

Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology Tribhuvan University Institute of Science and Technology Bachelor of Science in Computer Science and Information Technology Course Title: Digital Logic Full Marks: 60 + 0 + 0 Course No.: CSC Pass Marks:

More information

International Research Journal of Engineering and Technology (IRJET) e-issn: Volume: 03 Issue: 07 July p-issn:

International Research Journal of Engineering and Technology (IRJET) e-issn: Volume: 03 Issue: 07 July p-issn: IC Layout Design of Decoder Using Electrical VLSI System Design 1.UPENDRA CHARY CHOKKELLA Assistant Professor Electronics & Communication Department, Guru Nanak Institute Of Technology-Ibrahimpatnam (TS)-India

More information

Minnesota State College Southeast

Minnesota State College Southeast ELEC 2211: Digital Electronics II A. COURSE DESCRIPTION Credits: 4 Lecture Hours/Week: 2 Lab Hours/Week: 4 OJT Hours/Week: *.* Prerequisites: None Corequisites: None MnTC Goals: None Minnesota State College

More information

VLSI Design: 3) Explain the various MOSFET Capacitances & their significance. 4) Draw a CMOS Inverter. Explain its transfer characteristics

VLSI Design: 3) Explain the various MOSFET Capacitances & their significance. 4) Draw a CMOS Inverter. Explain its transfer characteristics 1) Explain why & how a MOSFET works VLSI Design: 2) Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes (a) with increasing Vgs (b) with increasing transistor width (c) considering Channel

More information

MC9211 Computer Organization

MC9211 Computer Organization MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the

More information

QUICK GUIDE COMPUTER LOGICAL ORGANIZATION - OVERVIEW

QUICK GUIDE COMPUTER LOGICAL ORGANIZATION - OVERVIEW QUICK GUIDE http://www.tutorialspoint.com/computer_logical_organization/computer_logical_organization_quick_guide.htm COMPUTER LOGICAL ORGANIZATION - OVERVIEW Copyright tutorialspoint.com In the modern

More information

Optimization of Multi-Channel BCH Error Decoding for Common Cases. Russell Dill Master's Thesis Defense April 20, 2015

Optimization of Multi-Channel BCH Error Decoding for Common Cases. Russell Dill Master's Thesis Defense April 20, 2015 Optimization of Multi-Channel BCH Error Decoding for Common Cases Russell Dill Master's Thesis Defense April 20, 2015 Bose-Chaudhuri-Hocquenghem (BCH) BCH is an Error Correcting Code (ECC) and is used

More information

Decade Counters Mod-5 counter: Decade Counter:

Decade Counters Mod-5 counter: Decade Counter: Decade Counters We can design a decade counter using cascade of mod-5 and mod-2 counters. Mod-2 counter is just a single flip-flop with the two stable states as 0 and 1. Mod-5 counter: A typical mod-5

More information

Computer Architecture and Organization

Computer Architecture and Organization A-1 Appendix A - Digital Logic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Appendix A Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

UNIT V 8051 Microcontroller based Systems Design

UNIT V 8051 Microcontroller based Systems Design UNIT V 8051 Microcontroller based Systems Design INTERFACING TO ALPHANUMERIC DISPLAYS Many microprocessor-controlled instruments and machines need to display letters of the alphabet and numbers. Light

More information

Training Note TR-06RD. Schedules. Schedule types

Training Note TR-06RD. Schedules. Schedule types Schedules General operation of the DT80 data loggers centres on scheduling. Schedules determine when various processes are to occur, and can be triggered by the real time clock, by digital or counter events,

More information

Digital Integrated Circuits EECS 312

Digital Integrated Circuits EECS 312 14 12 10 8 6 Fujitsu VP2000 IBM 3090S Pulsar 4 IBM 3090 IBM RY6 CDC Cyber 205 IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced IBM 360 IBM 3033 Vacuum Pentium II(DSIP) 0 1950 1960 1970 1980

More information

Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : Multiplexers

Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : Multiplexers Music Electronics Finally DeMorgan's Theorem establishes two very important simplifications 3 : ( A B )' = A' + B' ( A + B )' = A' B' Multiplexers A digital multiplexer is a switching element, like a mechanical

More information

LUT Optimization for Memory Based Computation using Modified OMS Technique

LUT Optimization for Memory Based Computation using Modified OMS Technique LUT Optimization for Memory Based Computation using Modified OMS Technique Indrajit Shankar Acharya & Ruhan Bevi Dept. of ECE, SRM University, Chennai, India E-mail : indrajitac123@gmail.com, ruhanmady@yahoo.co.in

More information

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) LATCHES and FLIP-FLOPS In the same way that logic gates are the building blocks of combinatorial circuits, latches

More information

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic

TIME SCHEDULE. MODULE TOPICS PERIODS 1 Number system & Boolean algebra 17 Test I 1 2 Logic families &Combinational logic COURSE TITLE : DIGITAL INSTRUMENTS PRINCIPLE COURSE CODE : 3075 COURSE CATEGORY : B PERIODS/WEEK : 4 PERIODS/SEMESTER : 72 CREDITS : 4 TIME SCHEDULE MODULE TOPICS PERIODS 1 Number system & Boolean algebra

More information

Digital Systems Principles and Applications. Chapter 1 Objectives

Digital Systems Principles and Applications. Chapter 1 Objectives Digital Systems Principles and Applications TWELFTH EDITION CHAPTER 1 Introductory Concepts Modified -J. Bernardini Chapter 1 Objectives Distinguish between analog and digital representations. Describe

More information

Slide Set 9. for ENCM 501 in Winter Steve Norman, PhD, PEng

Slide Set 9. for ENCM 501 in Winter Steve Norman, PhD, PEng Slide Set 9 for ENCM 501 in Winter 2018 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary March 2018 ENCM 501 Winter 2018 Slide Set 9 slide

More information

DIGITAL FUNDAMENTALS

DIGITAL FUNDAMENTALS DIGITAL FUNDAMENTALS A SYSTEMS APPROACH THOMAS L. FLOYD PEARSON Boston Columbus Indianapolis New York San Francisco Upper Saddle River Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal

More information

Theory Lecture Day Topic Practical Day. Week. number systems and their inter-conversion Decimal, Binary. 3rd. 1st. 1st

Theory Lecture Day Topic Practical Day. Week. number systems and their inter-conversion Decimal, Binary. 3rd. 1st. 1st Lesson Plan Name of the Faculty : Priyanka Nain Discipline: Electronics & Communication Engg. Semester:5th Subject:DEMP Lesson Plan Duration: 15 Weeks Work Load(Lecture/Practical) per week (In Hours):

More information

Digital Integrated Circuits EECS 312. Review. Remember the ENIAC? IC ENIAC. Trend for one company. First microprocessor

Digital Integrated Circuits EECS 312. Review. Remember the ENIAC? IC ENIAC. Trend for one company. First microprocessor 14 12 10 8 6 IBM ES9000 Bipolar Fujitsu VP2000 IBM 3090S Pulsar 4 IBM 3090 IBM RY6 CDC Cyber 205 IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced IBM 360 IBM 3033 Vacuum Pentium II(DSIP)

More information

Combinational vs Sequential

Combinational vs Sequential Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs Changing inputs changes outputs No regard for previous inputs

More information

Computer Systems Architecture

Computer Systems Architecture Computer Systems Architecture Fundamentals Of Digital Logic 1 Our Goal Understand Fundamentals and basics Concepts How computers work at the lowest level Avoid whenever possible Complexity Implementation

More information

DIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute

DIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute DIGITL TECHNICS Dr. álint Pődör Óbuda University, Microelectronics and Technology Institute 10. LECTURE (LOGIC CIRCUITS, PRT 2): MOS DIGITL CIRCUITS II 2016/2017 10. LECTURE: MOS DIGITL CIRCUITS II 1.

More information

HS Digital Electronics Pre-Engineering

HS Digital Electronics Pre-Engineering Course This course covers fundamentals of analog and digital electronics. Students learn about the different number systems used in the design of digital circuitry. They design circuits to solve open-ended

More information

Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED)

Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED) Chapter 2 Overview of All Pixel Circuits for Active Matrix Organic Light Emitting Diode (AMOLED) ---------------------------------------------------------------------------------------------------------------

More information

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit)

Laboratory 1 - Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit) Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6. - Introductory Digital Systems Laboratory (Spring 006) Laboratory - Introduction to Digital Electronics

More information

ALONG with the progressive device scaling, semiconductor

ALONG with the progressive device scaling, semiconductor IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 57, NO. 4, APRIL 2010 285 LUT Optimization for Memory-Based Computation Pramod Kumar Meher, Senior Member, IEEE Abstract Recently, we

More information

[2 credit course- 3 hours per week]

[2 credit course- 3 hours per week] Syllabus of Applied Electronics for F Y B Sc Semester- 1 (With effect from June 2012) PAPER I: Components and Devices [2 credit course- 3 hours per week] Unit- I : CIRCUIT THEORY [10 Hrs] Introduction;

More information

AC103/AT103 ANALOG & DIGITAL ELECTRONICS JUN 2015

AC103/AT103 ANALOG & DIGITAL ELECTRONICS JUN 2015 Q.2 a. Draw and explain the V-I characteristics (forward and reverse biasing) of a pn junction. (8) Please refer Page No 14-17 I.J.Nagrath Electronic Devices and Circuits 5th Edition. b. Draw and explain

More information

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS

DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS One common requirement in digital circuits is counting, both forward and backward. Digital clocks and

More information

Semester III. Subject Name: Digital Electronics. Subject Code: 09CT0301. Diploma Branches in which this subject is offered: Computer Engineering

Semester III. Subject Name: Digital Electronics. Subject Code: 09CT0301. Diploma Branches in which this subject is offered: Computer Engineering Semester III Subject Name: Digital Electronics Subject Code: 09CT0301 Diploma Branches in which this subject is offered: Objective: The subject aims to prepare the students, To understand the basic of

More information

82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Y Y Y Y Y 82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Compatible with all Intel and Most Other Microprocessors High Speed Zero Wait State Operation with 8 MHz 8086 88 and 80186 188 24 Programmable I

More information

Lecture 2: Digi Logic & Bus

Lecture 2: Digi Logic & Bus Lecture 2 http://www.du.edu/~etuttle/electron/elect36.htm Flip-Flop (kiikku) Sequential Circuits, Bus Online Ch 20.1-3 [Sta10] Ch 3 [Sta10] Circuits with memory What moves on Bus? Flip-Flop S-R Latch PCI-bus

More information

Digital Principles and Design

Digital Principles and Design Digital Principles and Design Donald D. Givone University at Buffalo The State University of New York Grauu Boston Burr Ridge, IL Dubuque, IA Madison, Wl New York San Francisco St. Louis Bangkok Bogota

More information

Analogue Versus Digital [5 M]

Analogue Versus Digital [5 M] Q.1 a. Analogue Versus Digital [5 M] There are two basic ways of representing the numerical values of the various physical quantities with which we constantly deal in our day-to-day lives. One of the ways,

More information

An Efficient IC Layout Design of Decoders and Its Applications

An Efficient IC Layout Design of Decoders and Its Applications An Efficient IC Layout Design of Decoders and Its Applications Dr.Arvind Kundu HOD, SCIENT Institute of Technology. T.Uday Bhaskar, M.Tech Assistant Professor, SCIENT Institute of Technology. B.Suresh

More information

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of

The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of 1 The basic logic gates are the inverter (or NOT gate), the AND gate, the OR gate and the exclusive-or gate (XOR). If you put an inverter in front of the AND gate, you get the NAND gate etc. 2 One of the

More information

CCE RR REVISED & UN-REVISED KARNATAKA SECONDARY EDUCATION EXAMINATION BOARD, MALLESWARAM, BANGALORE G È.G È.G È..

CCE RR REVISED & UN-REVISED KARNATAKA SECONDARY EDUCATION EXAMINATION BOARD, MALLESWARAM, BANGALORE G È.G È.G È.. CCE RR REVISED & UN-REVISED O %lo ÆË v ÃO y Æ fio» flms ÿ,» fl Ê«fiÀ M, ÊMV fl 560 003 KARNATAKA SECONDARY EDUCATION EXAMINATION BOARD, MALLESWARAM, BANGALORE 560 003 G È.G È.G È.. Æ fioê, d È 2018 S.

More information

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS)

DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) DIGITAL SYSTEM DESIGN UNIT I (2 MARKS) 1. Convert Binary number (111101100) 2 to Octal equivalent. 2. Convert Binary (1101100010011011) 2 to Hexadecimal equivalent. 3. Simplify the following Boolean function

More information

Chapter 5 Flip-Flops and Related Devices

Chapter 5 Flip-Flops and Related Devices Chapter 5 Flip-Flops and Related Devices Chapter 5 Objectives Selected areas covered in this chapter: Constructing/analyzing operation of latch flip-flops made from NAND or NOR gates. Differences of synchronous/asynchronous

More information

B.Sc. (Computer Science) Part-I Examination, 2010 Computer Programming Fundamental

B.Sc. (Computer Science) Part-I Examination, 2010 Computer Programming Fundamental 1 B.Sc. (Computer Science) Part-I Examination, 2010 Computer Programming Fundamental Time allowed : Three Hours Max. Marks : 50 Part-A (Compulsory) Answer all ten questions (20 words each). Part-B (Compulsory)

More information

IMS B007 A transputer based graphics board

IMS B007 A transputer based graphics board IMS B007 A transputer based graphics board INMOS Technical Note 12 Ray McConnell April 1987 72-TCH-012-01 You may not: 1. Modify the Materials or use them for any commercial purpose, or any public display,

More information

Sharif University of Technology. SoC: Introduction

Sharif University of Technology. SoC: Introduction SoC Design Lecture 1: Introduction Shaahin Hessabi Department of Computer Engineering System-on-Chip System: a set of related parts that act as a whole to achieve a given goal. A system is a set of interacting

More information

Module -5 Sequential Logic Design

Module -5 Sequential Logic Design Module -5 Sequential Logic Design 5.1. Motivation: In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on

More information

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING Lab Manual for Computer Organization Lab

More information

PURBANCHAL UNIVERSITY

PURBANCHAL UNIVERSITY [c] Implement a full adder circuit with a decoder and two OR gates. [4] III SEMESTER FINAL EXAMINATION-2006 Q. [4] [a] What is flip flop? Explain flip flop operating characteristics. [6] [b] Design and

More information

CS 61C: Great Ideas in Computer Architecture

CS 61C: Great Ideas in Computer Architecture CS 6C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra Instructor: Alan Christopher 7/23/24 Summer 24 -- Lecture #8 Review of Last Lecture OpenMP as simple parallel

More information

WINTER 14 EXAMINATION

WINTER 14 EXAMINATION Subject Code: 17320 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2)

More information

1 Hour Sample Test Papers: Sample Test Paper 1. Roll No.

1 Hour Sample Test Papers: Sample Test Paper 1. Roll No. 6.1.2 Sample Test Papers: Sample Test Paper 1 Roll No. Institute Name: Course Code: EJ/EN/ET/EX/EV/IC/IE/IS/MU/DE/ED/ET/IU Subject: Principles of Digital Techniques Marks: 25 1 Hour 1. All questions are

More information

Page No.1. CS302 Digital Logic & Design_ Muhammad Ishfaq

Page No.1. CS302 Digital Logic & Design_ Muhammad Ishfaq Page No.1 File Version Update: (Dated: 17-May-2011) This version of file contains: Content of the Course (Done) FAQ updated version.(these must be read once because some very basic definition and question

More information

COE328 Course Outline. Fall 2007

COE328 Course Outline. Fall 2007 COE28 Course Outline Fall 2007 1 Objectives This course covers the basics of digital logic circuits and design. Through the basic understanding of Boolean algebra and number systems it introduces the student

More information

4.S-[F] SU-02 June All Syllabus Science Faculty B.Sc. II Yr. Instrumentation Practice [Sem.III & IV] S.Lot

4.S-[F] SU-02 June All Syllabus Science Faculty B.Sc. II Yr. Instrumentation Practice [Sem.III & IV] S.Lot [Sem.III & IV] S.Lot. - 1 - [Sem.III & IV] S.Lot. - 2 - [Sem.III & IV] S.Lot. - 3 - Syllabus B.Sc. ( Instrumentation Practice ) Second Year ( Third and Forth Semester ) ( Effective from June 2014 ) [Sem.III

More information

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath

Objectives. Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath Objectives Combinational logics Sequential logics Finite state machine Arithmetic circuits Datapath In the previous chapters we have studied how to develop a specification from a given application, and

More information

CS6201 UNIT I PART-A. Develop or build the following Boolean function with NAND gate F(x,y,z)=(1,2,3,5,7).

CS6201 UNIT I PART-A. Develop or build the following Boolean function with NAND gate F(x,y,z)=(1,2,3,5,7). VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur-603203 DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING Academic Year: 2015-16 BANK - EVEN SEMESTER UNIT I PART-A 1 Find the octal equivalent of hexadecimal

More information

Towards More Efficient DSP Implementations: An Analysis into the Sources of Error in DSP Design

Towards More Efficient DSP Implementations: An Analysis into the Sources of Error in DSP Design Towards More Efficient DSP Implementations: An Analysis into the Sources of Error in DSP Design Tinotenda Zwavashe 1, Rudo Duri 2, Mainford Mutandavari 3 M Tech Student, Department of ECE, Jawaharlal Nehru

More information

Lesson No Lesson No

Lesson No Lesson No Table of Contents Lesson No. 01 1 An Overview & Number Systems 1 Programmable Logic Devices (PLDs) 8 Fractions in Binary Number System 13 Binary Number System 12 Caveman number system 11 Decimal Number

More information

Semester 6 DIGITAL ELECTRONICS- core subject -10 Credit-4

Semester 6 DIGITAL ELECTRONICS- core subject -10 Credit-4 Semester 6 DIGITAL ELECTRONICS- core subject -10 Credit-4 Unit I Number system, Binary, decimal, octal, hexadecimal-conversion from one another-binary addition, subtraction, multiplication, division-binary

More information

PLTW Engineering Digital Electronics Course Outline

PLTW Engineering Digital Electronics Course Outline Open doors to understanding electronics and foundations in circuit design. Digital electronics is the foundation of all modern electronic devices such as cellular phones, MP3 players, laptop computers,

More information

CHAPTER 4: Logic Circuits

CHAPTER 4: Logic Circuits CHAPTER 4: Logic Circuits II. Sequential Circuits Combinational circuits o The outputs depend only on the current input values o It uses only logic gates, decoders, multiplexers, ALUs Sequential circuits

More information

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York

Electrical and Telecommunications Engineering Technology_TCET3122/TC520. NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York NEW YORK CITY COLLEGE OF TECHNOLOGY The City University of New York DEPARTMENT: SUBJECT CODE AND TITLE: COURSE DESCRIPTION: REQUIRED: Electrical and Telecommunications Engineering Technology TCET 3122/TC

More information

Implementation of Memory Based Multiplication Using Micro wind Software

Implementation of Memory Based Multiplication Using Micro wind Software Implementation of Memory Based Multiplication Using Micro wind Software U.Palani 1, M.Sujith 2,P.Pugazhendiran 3 1 IFET College of Engineering, Department of Information Technology, Villupuram 2,3 IFET

More information

Principles of Computer Architecture. Appendix A: Digital Logic

Principles of Computer Architecture. Appendix A: Digital Logic A-1 Appendix A - Digital Logic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic A-2 Appendix A - Digital Logic Chapter Contents A.1 Introduction A.2 Combinational

More information

EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP. Due İLKER KALYONCU, 10043

EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP. Due İLKER KALYONCU, 10043 EL302 DIGITAL INTEGRATED CIRCUITS LAB #3 CMOS EDGE TRIGGERED D FLIP-FLOP Due 16.05. İLKER KALYONCU, 10043 1. INTRODUCTION: In this project we are going to design a CMOS positive edge triggered master-slave

More information

System Quality Indicators

System Quality Indicators Chapter 2 System Quality Indicators The integration of systems on a chip, has led to a revolution in the electronic industry. Large, complex system functions can be integrated in a single IC, paving the

More information

IT T35 Digital system desigm y - ii /s - iii

IT T35 Digital system desigm y - ii /s - iii UNIT - III Sequential Logic I Sequential circuits: latches flip flops analysis of clocked sequential circuits state reduction and assignments Registers and Counters: Registers shift registers ripple counters

More information

Digital Circuits. Electrical & Computer Engineering Department (ECED) Course Notes ECED2200. ECED2200 Digital Circuits Notes 2012 Dalhousie University

Digital Circuits. Electrical & Computer Engineering Department (ECED) Course Notes ECED2200. ECED2200 Digital Circuits Notes 2012 Dalhousie University 1 Digital Circuits Electrical & Computer Engineering Department (ECED) Course Notes ECED2200 2 Table of Contents Digital Circuits... 7 Logic Gates... 8 AND Gate... 8 OR Gate... 9 NOT Gate... 10 NOR Gate...

More information

Digital Electronics Course Outline

Digital Electronics Course Outline Digital Electronics Course Outline PLTW Engineering Digital Electronics Open doors to understanding electronics and foundations in circuit design. Digital electronics is the foundation of all modern electronic

More information

VU Mobile Powered by S NO Group

VU Mobile Powered by S NO Group Question No: 1 ( Marks: 1 ) - Please choose one A 8-bit serial in / parallel out shift register contains the value 8, clock signal(s) will be required to shift the value completely out of the register.

More information