Characterization of transmission line based on advanced SOLTcalibration: Review

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1 IOSR Journal of Eletronis and Communiation Engineering (IOSR-JECE) e-issn: ,p- ISSN: Volume 9, Issue 4, Ver. II (Jul - Aug. 2014), PP Charaterization of transmission line based on advaned SOLTalibration: Review 1 Abhishek Agrawal, 2 Alpana Pandey, 3 Vikas Dhanda 1 Department of Eletronis and CommuniationM.A.N.I.T. Bhopal 2 Department of Eletronis and CommuniationM.A.N.I.T. Bhopal 3 Design Engineer STMiroeletronis Pvt. Ltd. Abstrat: Validation of analog IP s at high frequeny is performed on a test board. For proper validation of IP s, it is very neessary to haraterize the transmission line in suh a manner that how muh amount of signal is reeived at the destination & how muh amount of losses introdue the transmission line. This paper proposed, Fixture free haraterization of transmission line mounted on test board, based on advaned SOLT alibration performed on test dummy struture (ISS).Extration of RLGC parameters, attenuation onstant and phase onstant of transmission line in very simple manner. Advaned probes tehnology minimizes insertion and return losses at high frequeny whih introdue by the adopters. Fixture free haraterization minimizes phase delays produed by the adopters. Keywords: thetransmission line, SOLT Calibration, Test dummy struture (ISS), ACP GS probes I. Introdution Fixture at RF frequeny introdues insertion & return loss. As frequeny inreases attenuation losses are also inreases whih ontribute inauray in the measurement of S parameter [1]. Earlier there are different methods disovered for haraterization of DUT. In order to meet these high speed requirements the design engineer must onsider and minimize all the fators that impat the integrity of the digital signals in order to ensure the orret system funtioning [7]. Adapting a oaxial test able to a Mirostrip devie requires an adequate test fixture and a suitable de-embedding tehnique for removing the effets of the test fixture from the devie under test (DUT). This further evaluates the de-embedding problem and the phase errors introdued when using test fixtures [7]. At RF improved auray & redued attenuation losses ahieved by fixture free measurement of DUT & well alibrates probes using SOLT alibration performed on wafer ISS (Short, open, load, thru). II. Methods used FOR DUT haraterization A. Port Extension Method It is used to remove the effets of the test fixture. It shifts the referene plane till the ends of the fixture but it is less aurate in pratial environments. As the number of the fixtures inreases inauray in measurement is also inreased. Advanement of port extension is the adopter removal method. B. Adopter Removal Method Aording to [1], there are generally two types of approahes to remove the effets of test fixtures. The first approah uses speialized alibration standards that are inserted at the end of the test fixture, and performing a alibration proess to move the referene plane to the end of the test fixture. The auray of the measurement relies highly on the auray of the physial alibration standards. It is not pratial to build an aurate broadband SOLT (short-open-load-thru) right after the test fixture; hene the traditional SOLT alibration proess is generally not appliable for test fixture de-embedding. Alternatively, the TRL (thrureflet-line) and LRM (line-reflet-math) method is a more suitable approah. The seond approah makes diret S parametermeasurementsof the DUT with test fixture, meanwhile aquires the S parameter of the test fixture through either diret measurement or simulation. The S parameter of the DUT without test fixture an be mathematially alulated from above two S parameter data. Aording to [2], the seond approah with S parameter de-embedding yields the best results to the ideal DUT response. It is gaining popularity due to its straightforwardness in measurement, and easiness of data post proessing. 73 Page

Figure 1: Signal flow hart of the S parameters of test fixtures and DUT When [T L ] & [T R ] are known then de-embedding result is: [T De-embedded ] = [T R -1 ] [T DUT ] [T L -1 ] = [T R -1 ] [T R

with the help of this method we removes the effet of SMA but solders effet is still present. This solder ause impedane mismath at the board end & reates in-auray at higher frequeny.

2 Figure 1: Signal flow hart of the S parameters of test fixtures and DUT When [T L ] & [T R ] are known then de-embedding result is: [T De-embedded ] = [T R -1 ] [T DUT ] [T L -1 ] = [T R -1 ] [T R ][T DUT ] [T L ] [T L -1 ] = [T DUT ] In pratial environment Fixture like SMA is onneted to the transmission line (DUT) on test board using solders.with the help of this method we removes the effet of SMA but solders effet is still present. This solder ause impedane mismath at the board end & reates in-auray at higher frequeny. Due to impedane mismath at the board end S parameter of de-embedded fixture is slightly different. This amplifies the error by an amount of S22.S11 S21.S21. III. De-embedding Tehnique For Phase Delay Assoiated by Connetors Aording to [7] due to fixture, phase delay is introdued into the measurement. The fixture S- parameter model an be simplified assuming a Mirostrip with mathed harateristi impedane of 50ῼ thus the refletion oeffiients (S11and S22) at M1 and M2 are redued to zero. S21and S12of the Mirostrip an be defined in terms of quasi-tem wave equations with omplex propagation onstant and length L. Figure 2: Test fixture S = S11e γl1 γ l1+l2 S22e γ l1+l2 S12e γl2 S21e However, when building an atual test fixture, any hange lin the onnetor geometry or Mirostripwill introdue error into the final DUT S-parameters. Suppose we onentrate speifially on the effet of a length deviation in the Mirostrip. In matrix form the S-parameter error introdued by hanging the Mirostrip lengths is given by S = S11e γ(2. l1) S21e γ(2. l1+l2) S22e The phase error (in radians) for eah S-parameter of Mirostrip is: S12e γ(2. l1+l2) γ (2. l2) φf = 4πf l1 εeff 2πf l1 + l2 εeff 2πf l1 + l2 εeff 4πf l2 εeff IV. New De-Embedding Method Based On Solt Calibration On Impedane Substrate Struture Aording to [5], all losses due to impedane mismathing or due to fixtures are removed using fixture free measurement of DUT, based on advaned SOLT alibration performed on the ISS & advaned ACP GSG 74 Page

probes. By using mehanial alibration it is impossible to shift the referene plane till the ends of fixture. This alibration shifts the referene plane till the ends of probes tip. It uses 2 ISS.

3 probes. By using mehanial alibration it is impossible to shift the referene plane till the ends of fixture. This alibration shifts the referene plane till the ends of probes tip. It uses 2 ISS. One ISS have open, short & load struture whereasauray in measurement of S parameter is depends on this alibration. This de-embedding method overomes the drawbak of the other Known solutions. Propagation onstant & harateristi impedane of transmission line an be defined by eq. (1) & (3) γ = R + jωl G + jωc (1) γ = α + jβ(2) Zo = R+jωL G+jωC (3) By solving these three equations we got G = α (4) Zo C = β ωzo (5) R = Zo 2 G(6) L = Zo 2 C(7) R is loop resistane per unit length, represents the lossy behavior of ondutor. G is shunt ondutane per unit length, represents lossy behavior of dieletri. L is the loop indutane per unit length,whih store magneti energy. C is shunt apaitane per unit length, represents the eletri energy. V. Measurement Setup On the basis of previous work a measurement is performed on5m long single ended transmission line an be used for validation of this method. Transmission line is mounted on PCB & use FR4 dieletri material whose permittivity is 4.8.First step is performing 2 port measurement of transmission line of test board for extration of other parameters. This measurement performed using 4 ports Agilent PNA X N5244A Network Analyzer having a broad frequeny range of 10 MHz to 43.5 GHz. BTS 2000 used to holding the probes. High bandwidth oaxial able (40GHz) is onneted to one end of PNA ports & another side of oaxial able is onneted to DUT via ACP probe. Single ended transmission line an be onsidered as a DUT. Transmission line has a ground pad beside the signal pad. For single ended transmission line haraterization 2 ACP GS probes of 1000 µm pith are used. Before landing the ACP probes on the pads, it is well alibrated. It is also must to hek probe alignment, probe planarization to ahieve perfet ontat. Measurement performed after suessfully landing of probes on signal & ground pads. With the help of this measured result RLGC parameter is alulated. Measured result is ompared with simulated results & other known solution (Port Extension). Figure 3: Measurement Setup VI. Results S parameter data is measured using VNA. With the help of eq. (4) (5) (6) (7) RLGC parameter extrated & it is shown in figure 4 below. Fig.2 shows the S11, S21, S12, S22 measured by thefixture free haraterization method. In fig.3, Insertion loss is ompared with Port extension method.-3db is ahieved at 9 GHz. It shows that transmission line is apable of transmit information orretly till 9 GHz after that loss our. Measurement with Port Extension method introdues phase delay, it ours due to inaurate haraterization of fixture & its effets seen in RLGC parameter at high frequeny. 75 Page

4 Figure 4: S Parameter using fixture free haraterization method (A) (B) Figure 5: (A-B) Insertion Losses in Phase (C) 76 Page

5 (D) Figure 6: (E-F) Attenuation & Phase Constant (E) (F) (G) 77 Page

6 (H) Figure 7: (E-H) RLGC Parameter VII. Conlusion This paper shows a simple method for extration of RLGC parameter of transmission line. Attenuation onstant and phase onstant is alulated using measured S parameter data. This method avoids omplex alulation as used in other papers. This method is suessfully appliable for lossy and lossless transmission line over a broad range of frequeny. Fixture free measurement minimizes insertion & return loss.measurement setup is desribed & results are mentioned. Referenes [1]. Xiaoning Ye De-embedding Errors due to Inaurate Test Fixture haraterization IEEE Eletromagneti Compatibility Magazine-Volume 1-Quarter 4, [2]. In-fixture measurements using vetor network analyzers, Agilent Appliation Note AN [3]. Kazuki MAEDA, Kengo IOKIBE, Yoshitaka TOYOTA, Ryuji KOGA De-embedding of Board Parasiti with T-parameters for S-parameters of Integrated Ciruits on PCB-Examinations in One-port Measurements-. [4]. Hongya Xu, Erih Kasper A De-embedding Proedure for One-port Ative mm-wave Devies IEEE [5]. Supreetha Rao Aroor, Rashaunda M. Henderson Loss Performane of Planar Interonnets on FR-4 up to 67 GHz IEEE Transations on Components, Pakaging and Manufaturing Tehnology. Volume 3, No. 12, Deember [6]. Di Hu, Jaemin Shin, Timothy Mihalka Fixture-free Measurement Tehnique for PDN disrete Components IEEE Eletroni Components & Tehnology Conferene [7]. Doug Campbell, Aldo Morales, Sedig Agili An Improved Phase De-Embedding Tehnique for High Speed Connetors IEEE [8]. Reydezel Torres-Torres, Svetlana C Extration of the Model Parameters for the Attenuation in Printed Transmission Lines IEEE Mirowave and Wireless Components Letters, Vol.20, No. 12, Deember [9]. Zhaoqing Chen, Sungjun Chun Per-Unit-Length RLGC Extration Using a Lumped Port De-Embedding Method for Appliation on Periodially Loaded Transmission Lines IEEE Eletroni Components & Tehnology Conferene [10]. Guang Chen, Lin Zhu, Kathleen L. Melde Extration of Frequeny Dependent RLGC Parameters of the Pakaging Interonnets on Low-Loss Substrates from Frequeny Domain Measurements IEEE [11]. Chuan-Lun Hsu, Gustavo Ardila, Philippe Beneh Parameters Extration of Submiron Thin Film Mirostrip Lines at Broadband mm-wave Frequeny IEEE Mirowave Integrated Ciruits Conferene Page

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