I B.SC (INFORMATION TECHNOLOGY) [ ] Semester II CORE : DIGITAL COMPUTER FUNDAMENTALS - 212B Multiple Choice Questions.

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1 Dr.G.R.Damodaran College of Science (Autonomous, affiliated to the Bharathiar University, recognized by the UGC)Re-accredited at the 'A' Grade Level by the NAAC and ISO 9001:2008 Certified CRISL rated 'A' (TN) for MBA and MIB Programmes 1. MSI stands for. A. Medium Scale Integrated Circuits. B. More Scale Integrated Circuits. C. Mean Scale Integrated Circuits. D. MySQL Interface 2. MICR stands for. A. Magnetic Ink Character Reader. B. Magnetic Storage Unit. C. MICRO. D. Magnetic Disk. 3. ASCII stands for. A. American Stable Code for International Interchange. B. American Standard Case for Institutional Interchange C. American Standard Code for Information Interchange D. American Standard Code for Interchange Information 4. Which of the following binary numbers is equivalent to decimal 13? A B C D I B.SC (INFORMATION TECHNOLOGY) [ ] Semester II CORE : DIGITAL COMPUTER FUNDAMENTALS - 212B Multiple Choice Questions. 5. The number FF in Hexadecimal system is equivalent to in decimal system.

2 A B C D What is the octal equivalent of the binary number ? A B C D The binary code of decimal number( ) is. A B C D Excess-3 code is known as. A. weighted code. B. cyclic redundancy code. C. self-complementing code. D. algebraic code. 9. Indicate which of the following three binary additions are correct? I = II = III = 1111 A. I and II. B. II and III. C. III only. D. II only. 10. Convert the hexadecimal number 324 into binary? A B C D What is the output state of an OR gate if the inputs are 0 and 1? A. 0.

3 B. 1. C. not defined. D What is the output state of an AND gate if the inputs are 0 and 1? A. 0. B. 1. C. not defined. D A NOT gate has. A. two inputs and one output. B. one input and one output. C. one input and two outputs. D. two inputs and two outputs. 14. An OR gate has. A. two inputs and one output. B. one input and one output. C. one input and two outputs. D. one input and three outputs. 15. The output of a logic gate can be one of two. A. inputs. B. gates. C. states. D. outputs. 16. The output of a gate is only 1 when all of its inputs are 1. A. NOR. B. XOR. C. AND. D. NOT. 17. A NAND gate is equivalent to an AND gate plus a gate put together. A. NOR. B. NOT.

4 C. XOR. D. XNOR. 18. A NAND gate is called a universal logic element because. A. it is used by everybody. B. any logic function can be realized by NAND gates alone. C. all the minimization techniques are applicable for optimum NAND gate realization. D. many digital computers use NAND gates. 19. Which of the following gate is a two-level logic gate? A. OR gate. B. NAND gate. C. EXCLUSIVE OR gate. D. NOT gate. 20. An AND gate will function as OR if. A. all the inputs to the gates are 1. B. all the inputs are 0. C. either of the inputs is 1. D. all the inputs and outputs are complemented. 21. Which logic gate has the output is complement of its input? A. OR. B. AND. C. NOT. D. X-OR. 22. By adding inverters to the inputs and output of a AND gate we can obtain. A. OR. B. AND. C. NOT. D. X-OR. 23. Which logic gate has output high if and only if all inputs are low? A. NOR. B. NAND. C. X-NOR.

5 D. AND. 24. Boolean Algebra obeys. A. commutative law. B. associative law. C. distributive law. D. commutative, associative, distributive law. 25. A+(B.C) =? A. A.B+C. B. A.B+A.C. C. A. D. (A+B).(A+C). 26. A.0 =? A. 1. B. A. C. 0. D. A or A + A.B =? A. B. B. A.B. C. A. D. A or B. 28. Demorgan's first theorem is. A. A.A'=0. B. A"=A. C. (A+B)'=A'.B. D. (AB)'=A'+B'. 29. Demorgan's second law is. A. A.A'= 0. B. A"= A. C. (A+B)'=A'.B' D. (AB)'=A'+B'.

6 30. In which function each term known as min term. A. SOP. B. POS. C. Hybrid. D. both SOP and POS. 31. In which function each term known as max term. A. SOP. B. POS. C. Hybrid. D. both SOP and Hybrid. 32. A Karnaugh map with 4 variables has. A. 2 cells. B. 4 cells. C. 8 cells. D. 16 cells. 33. Which of these are universal gates? A. only NOR. B. only NAND. C. both NOR and NAND. D. NOT,AND,OR. 34. How many cells are there in an n-variable K-map? A. 2n. B. 2n+a. C. 2n-a. D. n How many cells does a 5-variable K-map contains? A. 2. B. 4. C. 32. D. 8.

7 36. The don't care combinations are represented by. A. d. B. dc. C. do. D. o. 37. Each maxterm can be obtained by the operation of all the variables of the function. A. AND. B. OR. C. NAND. D. NOR. 38. Each minterm can be obtained by the operation of all the variables of the function. A. AND. B. OR. C. NAND. D. NOR. 39. Which expression is basically an OR operation of AND operated variables? A. Product of Sums. B. Product of Products. C. Sum of Sums. D. Sum of Products. 40. Which expression is basically an AND operation of OR operated variables? A. Product of Sums. B. Product of Products. C. Sum of Sums. D. Sum of Products. 41. A.1 =? A. 1. B. A. C. 0. D. A or a.

8 42. A.A =? A. 1. B. A. C. 0. D. A or A+A =? A. 1. B. A. C. 0. D. A or A+0 =? A. 1. B. A. C. 0. D. A or A+1 =? A. 1. B. A. C. 0. D. A or Which is the commutative property? A. A+B=B+A. B. A+1=1+A. C. B+1=1+B. D. A+B+C=C+B+A. 47. Which is the associative property? A. A+BC=(A+B)(A+C). B. A+(B+C)=(A+B)+C. C. A+AB=A. D. A(A+B)=A 48. Which is the distributive property?

9 A. A+BC=(A+B)(A+C). B. A+(B+C)=(A+B)+C. C. A+AB=A. D. A(A+B)=A. 49. What is the output state of an NOR gate if the inputs are 0 and 0? A. 0. B. 1. C. 3. D What is the output state of an EX-OR gate if the inputs are 1 and 1? A. 0. B. 1. C. 3. D What is the output state of an EX-NOR gate if the inputs are 0 and 0? A. 0. B. 1. C. 3. D By adding inverter to the EX-OR gate we can obtain. A. OR. B. AND. C. EX-NOT. D. EX-NOR. 53. NAND gate is equivalent to. A. Bubbled OR gate. B. Bubbled AND gate. C. Bubbled NOT gate. D. Bubbled NOR gate. 54. NOR gate is equivalent to. A. Bubbled OR gate.

10 B. Bubbled AND gate. C. Bubbled NOT gate. D. Bubbled NOR gate. 55. A NOT gate also called as. A. convertor. B. subtractor. C. invertor. D. selector. 56. A group of 4 cells in K-map is called. A. octet. B. pair. C. triple. D. quad. 57. A group of 8 cells in K-map is called. A. octet. B. pair. C. triple. D. quad. 58. In a maxterm a variable appears. A. 1 in uncomplemented and 0 in complemented. B. 0 in uncomplemented and 2 in complemented. C. 2 in uncomplemented and 1 in complemented. D. 0 in uncomplemented and 1 in complemented. 59. In a minterm a variable appears. A. 1 in uncomplemented and 0 in complemented B. 0 in uncomplemented and 2 in complemented C. 2 in uncomplemented and 1 in complemented D. 0 in uncomplemented and 1 in complemented 60. Which is the Absorption law? A. A.(A+B)=A B. A+BC=(A+B)(A+C)

11 C. A.(B.C)=(A.B).C D. A+(B+C)=(A+B)+C 61. Half adder circuit is. A. Half of an AND gate. B. A circuit to add two bits together. C. Half of a NAND gate. D. Half of a NOR gate. 62. Parallel adder is. A. sequential circuits. B. combinational circuits. C. either sequential or combinational circuits. D. linear circuits. 63. A half adder has. A. 2 inputs and 2 outputs. B. 2 inputs and 3 outputs. C. 3 inputs and 3 outputs. D. 3 inputs and 4 outputs. 64. The circuit that is used for parallel to serial conversion is. A. decoder. B. encoder. C. multiplexer. D. demultiplexer. 65. The 'sum' output in a half-adder can be realized by using a single two-input gate which should be a. A. exclusive -OR gate. B. NOR gate. C. AND gate. D. OR gate. 66. Which device has many inputs and one output? A. Flip flop. B. Multiplexer. C. Demultiplexer.

12 D. Counter. 67. The other name of multiplexer. A. data distributor. B. data multiplier. C. data converter. D. data selector. 68. The other name of demultiplexer. A. data distributor. B. data multiplier. C. data converter. D. data selector. 69. What does the term 'multiplex' mean? A. one into many. B. many into one. C. one into three. D. many into two. 70. How many inputs and outputs are used to construct a full adder? A. 3 inputs and 2 outputs. B. 2 inputs and 1 output. C. 1 input and 1 output. D. 1 input and 2 outputs. 71. How many inputs and outputs are used to construct a full subtractor? A. 2 inputs and 2 outputs. B. 2 inputs and 1 output. C. 1 input and 1 output. D. 3 inputs and 2 outputs. 72. Which combinational circuit that performs subtraction involving three bits? A. Single subtractor. B. Half subtractor. C. Full subtractor. D. Multi subtractor.

13 73. The serial adder requires circuitry than a parallel adder. A. larger. B. simpler. C. unique. D. single. 74. A demultiplexer is a logic circuit that receives information on a single input and transmits the same information over one of several output lines. A. 2n. B. n. C. 2n-1. D. 2n A is similar to demultiplexer but without any data input. A. encoder. B. multiplexer. C. decoder. D. demultiplexer. 76. A 3-to-8 decoder is also called. A. binary-to-octal decoder. B. decimal-to-octal decoder. C. octal-to-binary decoder. D. octal-to-decimal decoder. 77. An encoder is a digital circuit that performs the operation of a decoder. A. inverse. B. reverse. C. forward. D. backward. 78. Full adder is constructed by using. A. Two Half Adder& one OR gate B. two OR gate &one HA C. One HA & two OR gate D. One OR gate & one HA

14 79. The output of halfadder is in the form of. A. sum. B. carry. C. sum and carry. D. none of these. 80. The function of encoder is to produce. A. octal codes. B. binary codes. C. hexa decimal codes. D. all of the above. 81. The circuit that is used for parallel to serial conversion is. A. decoder. B. encoder. C. multiplexer. D. demultiplexer. 82. are used for converting one type of number system into the other form. A. Decoder. B. Encoder. C. Multiplexer. D. Demultiplexer. 83. A flip flop is a. A. combinational circuit. B. memory element. C. arithmetic element. D. memory or arithmetic. 84. The basic storage element in a digital system is. A. flip flop. B. counter. C. multiplexer. D. encoder.

15 85. A counter is a. A. sequential circuit B. combinational circuit C. both combinational and sequential circuit D. random circuit. 86. What is the other name of T flip flop? A. Trigger. B. Toggle. C. Both 1 and 2. D. Translator. 87. Which of the following statements are correct? A. A flip-flop is used to store 1-bit of information. B. Race-around condition occurs in a J-K flip-flop when both the inputs are 1. C. Master-slave configuration is used in flip-flops to store 2-bits of information. D. A transparent latch consists of a D-type flip-flop. 88. A register is a group of suitable for storing binary information. A. counters. B. adders. C. flip flops. D. subtractors. 89. An n-bit register has a group of flip flops and is capable of storing any binary information containing n bits. A. n-1. B. n(n-1). C. n. D. n A group of flipflops sensitive to pulse duration is called. A. registers. B. latch. C. multiplexer. D. demultiplexer.

16 91. Which register is capable of shifting binary information either to the left or right? A. General register. B. Latch. C. Shift register. D. Parallel register. 92. How many methods of data shifting exist? A. Eight methods. B. Three methods. C. Six methods. D. Two methods. 93. Which shifting operation is used to shift the data simultaneously during a single clock pulse? A. Serial. B. Parallel. C. Serial & Parallel. D. Random. 94. The method shifts one bit at a time for each clock pulse. A. parallel shifting. B. random shifting. C. serial shifting. D. collective. 95. Data shifting from low to high order bits done by register. A. shift left. B. shift right. C. shift in. D. shift out. 96. Data shifting from high to low order bits done by register. A. shift left. B. shift right. C. shift in. D. shift out. 97. What is the other name of Asynchronous Counter?

17 A. parallel counter. B. ripple counter. C. circle counter. D. shift counter. 98. What is the other name of Synchronous Counter? A. parallel counter. B. ripple counter. C. circle counter. D. shift counter. 99. Which flip flop is triggered by the output from the previous flipflop? A. Synchronous counter. B. Circle counter. C. Asynchronous counter. D. Shift Counter A J-K flip-flop has two control inputs. What happens to the Q output on the active edge of the clock if both control inputs are 1? A. The Q output is set to a. B. The Q output toggles to the other state. C. The Q output is reset to 0. D. The Q output remains unchanged In a computer is capable to store single binary bit. A. capacitor. B. flip flop. C. register. D. inductor A set of flip flops integrated together is called. A. counter B. adder C. register D. accumulator 103. A register which is organized to allow moving left or right operations is called a. A. counter

18 B. loader C. adder D. shift register 104. Which of the following is Universal flip-flop? A. JK flip-flop B. RS flip-flop C. Master slave flip-flop D. D flip-flop S-R type flip-flop can be converted into D type flip-flop if S is connected to R through. A. EX-OR gate B. inverters C. AND gate D. Full Adder 106. A D flip-flop can be made from a. A. JK flip-flop and an inverter B. RS flip-flop C. RS flip-flop and an inverter D. JK flip-flop and an inverter, RS flip-flop Which of the following flip-flops does not have race around difficulty? A. JK flip-flops B. Master slave JK flip-flop C. S-R flip-flop converted to J-K flip-flop D. D flip-flops 108. The output Qn+1 of a J-K flip-flop is set when a clock pulse is applied. The inputs J and K are respectively. A. 0 and 1. B. 0 and 0. C. 1 and 0. D. 1 and Which of the following is correct? i. A flip-flop is used to store 1-bit of information ii. Race around condition occurs in JK flip flop when both the inputs are 1 iii. Master slave flip flop is used to store 2 bits of information iv. A transparent latch consists of a D- flip flop A. i,ii,iii.

19 B. i,iii,iv. C. i,ii,iv. D. ii,iii.iv A is a bistable electronic circuit that has two stable states. A. multivibrator. B. flip-flop. C. decoder. D. encoder An n-bit binary counter repeats the counting sequence for every clock pulses. A. 2n. B. n2. C. 2n-1. D. n Which counter requires less hardware? A. Parallel. B. Synchoronous. C. Delay. D. Ripple What is the function of SHIFT/LOAD in parallel-in-serial-out shift register? A. Allows data to enter into the register in parallel. B. Allows clock signal to enter into the register in serial. C. Allows data to enter into the register in serial. D. Allows clock signal to enter into the register in parallel In which register there is no interconnection between successive flipflops and no serial shifting is required? A. SISO. B. PISO. C. SIPO. D. PIPO Which shifting method is faster? A. Serial. B. Parallel.

20 C. Sequential. D. Random How many clock pulses does a 4 bit register require to shift a bit from input to Output? A. 3. B. 1. C. 4. D An n-bit register consists of flip flops and the required gates to control the shift operation. A. n-1. B. n. C. n-2. D. n What is the other name of D flipflop? A. Data. B. Deselector. C. Delay. D. Delimiter The logic circuit whose outputs at any instant of time depend not only on the present inputs but also on the past outputs are called. A. combinational circuit. B. sequential circuit. C. logic circuit. D. random circuit A J-K flip-flop has two control inputs. What happens to the Q output when the control inputs are 0 and 1? A. The Q output is set to 1. B. The Q output toggles to the other state. C. The Q output is reset to 0. D. The Q output remains unchanged The latch with the additional control input called. A. register. B. counter. C. adder.

21 D. flip flop The basic shift register operations are. A. serial in serial out. B. serial in parallel out. C. parallel in serial out. D. all of above The simplest register is. A. buffer register. B. shift register. C. controlled buffer register. D. bidirectional register In a ripple counter using edge-triggered J-K flip-flops, the pulse input is applied to the. A. clock input of all flip-flops. B. clock input of one flip-flops. C. J and K inputs of one flip-flop. D. J and K inputs of all flip-flops An SR flip flop is also called a. A. monostable multivibrator. B. bistable multivibrator. C. tri stable multivibrator. D. all of the above A flip flop is a. A. storage device. B. hub. C. bistable device. D. chip What happens in Master Slave JK flip flop when the clock is high? A. Master active and slave inactive. B. Both master and slave active. C. Master inactive and slave active. D. Master active and slave inactive.

22 128. In synchronous counter all flip flops are. A. clocked simultaneously. B. not clocked simultaneously. C. initially clocked. D. all of the above In asynchronous counter all flip flops are. A. not clocked simultaneously. B. initially clocked. C. finally clocked. D. clocked simultaneously How many AND gates does the SR flip flop require at its inputs? A. 1. B. 4. C. 2. D Which of the following are the cheapest memory devices in terms of Cost / Bit? A. Semiconductor Memories. B. Magnetic Disks. C. Magnetic Tapes. D. Compact Disks Which of the following have the fastest access time? A. Semiconductor Memories. B. Magnetic Disks. C. Magnetic Tapes. D. Compact Disks is a semi conductor memory. A. Dynamic. B. Static. C. Bubble. D. Dynamic & Static.

23 134. Which of the following is a read only memory storage device? A. Floppy disk. B. Hard disk. C. CDROM. D. Pen drive DMA stands for. A. Direct Memory Access. B. Distinct Memory Access. C. Direct Module Access. D. Direct Memory Allocation EPROM is erased by. A. red light. B. sodium light. C. ultra violet rays. D. infra-red rays Which of the following does not represent an I/O device? A. Speaker which beeps. B. Joy-stick. C. Plotter. D. ALU The time taken for information to be read from disk once the read-write head is positioned on the track is called. A. turnaround time. B. data transfer time. C. seek time. D. latency time Which of the following is associated with Optics? A. Winchester disk. B. RAM. C. CD-ROM. D. CPU.

24 140. Which one of the following is fastest read/writable memory? A. PROM. B. EEPROM. C. Flash. D. Optic recognizer A dot matrix printer. (i) prints an entire line at time (ii) is a non-impact printer (iii) allows multiple copies to be taken at a time (iv) prints one character at a time A. i and ii. B. i and iii. C. iii and iv. D. ii and iii A laser printer is. (i) prints an entire line at a time (ii) a non-impact printer (iii) allows multiple copies to be taken at a time (iv) prints one character at a time A. i and ii. B. i and iii C. iii and iv D. ii and iii 143. What is the keyboard's official name? A. "poiut". B. "asdfg". C. "qwerty". D. "alphanumeric" Which of the following printers is characterized by melting waxâ based ink onto ordinary paper? A. Dot-matrix. B. Inkjet. C. Laser. D. Thermal The fastest and quietest type of printer is. A. dot-matrix printer. B. inkjet printer. C. laser printer. D. plotter.

25 146. The larger the number of pixels of a computer monitor, the higher its. A. resolution. B. refresh rate. C. dot pitch. D. data transfer rate Which of the following is an input device? A. Scanner. B. Speaker. C. CD. D. Printer All of the following are examples of input devices EXCEPT. A. Scanner. B. Mouse. C. Keyboard. D. Printer Best Quality graphics is produced by. A. dotmatrix. B. laser. C. plotter. D. inkjet EEPROM stand for. A. Electrically Erasable Programmable Read Only Memory. B. Easily Erasable Programmable Read Only Memory. C. Electronic Erasable Programmable Read Only Memory. D. None of the above. Staff Name Santhiya N.

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it,

Solution to Digital Logic )What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, Solution to Digital Logic -2067 Solution to digital logic 2067 1.)What is the magnitude comparator? Design a logic circuit for 4 bit magnitude comparator and explain it, A Magnitude comparator is a combinational