Low Temperature/Low Load Damage Free Flip Chip Technology for NEMS/MEMS, IC and IoT Applications. CONNECTEC JAPAN Corporation CEO Katsunori, Hirata

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1 Low Temperature/Low Load Damage Free Flip Chip Technology for NEMS/MEMS, IC and IoT Applications CONNECTEC JAPAN Corporation CEO Katsunori, Hirata

2 CONNECTEC JAPAN Corporation

3 Company Profile Company Name CONNECTEC JAPAN Corporation Establishment November 02, 2009 Capital 500,266,700 Yen Location Head Office/R&D:Niigata, Japan Tel / Fax : Head Office/R&D Clean Room(350m 2 )

4 Company Location CONNECTEC KOREA Sales Office in Seoul CONNECTEC USA Sales Office in San Jose ( ~) CONNECTEC CHINA Sales Office in Suzhou CONNECTEC TAIWAN CONNECTEC JAPAN HQ, R&D and Factory in Niigata New R&D center in Tsukuba ( ~) R&D, & Sales Office in Hsinch [ ITRI Open Laboratory ] ( ~) Headquarter Tsukuba R&D Center

5 The IoT World Every thing is connected to the Internet Sensors, Wearables, Continuous Monitor, Cloud, Big data etc.

6 MONSTER PAC Technology

7 Our Business Model OSRDA : Outsourced Semiconductor R&D Assembly MONSTER PAC Technology w/ Damage Free & Bump On Material Entrusted Prototyping and Mass Production

8 Flip Chip Technology Comparison Conventional FCBGA MONSTERPAC Bump Material Solder ( C4 ) Cu/Sn Ag Paste Bump Process Plating Bump on Wafer Printing Soft Bump on Substrate Bonding Temp Bonding Load 2.4gf/Bump 0.12gf/Bump MEMS/Sensor Packaging Bonding Structure Not Suitable Die Substrate Suitable Die Substrate Die Die Die Under Fill Substrate Solder Cu Line Under Fill Cu Pillar Sn Cu Line Substrate NCP Ag Cu Line Substrate

9 MONSTER PAC Fabrication Process

10 Fundamental Process of MONSTERPAC 1. Bump On Substrate Printed Soft Bump Squeegee Conductive Pattern Metal Mask Silver Paste Substrate Substrate Substrate Bump on Substrate Technology expand substrate selection; Film, Glass, Ceramic, Organic, etc.

11 Fundamental Process of MONSTERPAC 2. Damage Free Bonding Chip Soft Bump NCP Die 170degC 0.12gf/bump NCP Substrate Die Substrate Substrate Substrate Low Temperature ( 170 deg C ) Low Pressure ( 0.12gf/bump ) bonding for Stress Sensitive MEMS / Sensor

12 MONSTER PAC Bonding Mechanism Substrate Bump Printing Bump Formation Wiring Pattern Squeegee Metal Mask Conductive Paste Sub. Sub. Sub. Sub. Dispenser Flip Chip Bonding( 170 ) Cure( 170 ) NCP Sub. Chip Sub. Chip Liqui d Chip Sub. Liqui d 硬化収縮力 Status NCP NCP Viscosity Paste Liquid Liquid NCP will be discharged Harden Temperature Rigid Hardening shrinkage of NCP guarantees electrical characteristics

13 LSIs are no longer Rigid

14 Low-k Device Trend Design Rule 90nm 65nm 28nm 10nm Expand Dielectric Constant Dielectric Layer Non Low-k Rigid Strong Low-k Porous Fragile ELK ULK More Porous and Fragile

15 Damage Free Bonding for Low-k Device Solder / Cu Pillar Bump Low-k Dielectric with damaged layer Expand MONSTER PAC Low-k Dielectric w/o Damaged Layer IC Chip IC Chip Conductive Paste Cu Under fill Solder NCP Wiring on Substrate Wiring on Substrate Substrate Substrate

16 MEMS Package Specialty

17 Big Issues for MEMS Packaging Conventional Wire Bond Package need Large Area Market Needs Smaller Sized Flip Chip Bump Flip Chip In addition, MEMS / NEMS needs low thermal / mechanical stress assembly

18 Plating Issues for MEMS Wafer Bump Plating Plating Bump Photo Resist MEMS Wafer Photo Resist Resist Stripping Seed Etching MEMS structure Broken by Resist Stripping MEMS MEMS Wafer Wafer Bump Height Variability

19 MONSTER PAC Chemical Free Advantage

20 MONSTER PAC realizes MEMS Flip Chip MEMS Die No Wafer Bump MEMS FCB by MONSTER PAC MEMS Chip Silver Paste Substrate Bump on Substrate Flip Chip Substrate Wiring NCP Bump on Substrate of MONSTER PAC realize MEMS Flip Chip

21 The IoT World Every thing is connected to the Internet Sensors, Wearables, Continuous Monitor, Cloud, Big data etc.

22 5G Service Start in 2020 Power 1/n 1 10ms Speed >10Gbps 5G 300Mbps LTE Advanced km/h Mobility 800km/h Communication Capacity 5G x 1000 Latency 1ms 1000 pcs No. of Connection 10000pcs Capacity >1000/km 2 LTE x 1 LTE Advanced x

23 Circuit Scale Increase Issue LTE 5G

24 Issues for Packaging 1. MEMS Chip Assembly 2. Damage Free for Low-k Device 3. Miniaturization and High Density

25 Band Width Evolution Band Width 5G mmwave (~60GHz) Wide Band / Short Distance + LTE Advanced (~2.5GHz) LTE Enhanced(~3.5GHz) Narrow Band / Long Distance

26 How Big is Current mm Wave Module?

27 mm Wave Rader for Automobile 5G terminals need the same module

28 MEMS/NEMS Adoption in ww Wave LTE( < 5GHz) mmwave(30ghz < ) Monolithic MEMS/NEMS Solid = Rigid Movable = Fragile Ex.:CMOS Antenna Switch Conventional Process Adoptable High Temp.(260 ) Heavy Load(2.4gf/Bump) Ex.:MEMS Antenna Switch Only Monster PAC Can deal with Low Temp.(170 ) Low Load(0.12gf/Bump)

29 An Image for 5G Circuit Scale

30 LCD Touch Panel LCD Touch Panel Dup Filter RF-SW Dup Filter RF-SW Dup Filter RF-SW Dup Filter RF-SW Dup Filter RF-SW Base Band Circuit Scale Increase 5G Circuit Scale New RAT RX(f1) TX(f1) A/D D/A LTE RX(f1) A/D LTE LTE Circuit Scale RX(f1) A/D TX(f1) D/A BT/ WiFi GPS TX(f1) RX(f1) TX(f1) RX(f1) D/A A/D D/A A/D BT/ WiFi GPS RX(f1) TX(f1) RX(f1) A/D D/A A/D New RAT Baseband Processer LTE Baseband Processer IR LTE Baseband Processer Camera Gyro Accel eration ROM Battery Charger Battery RAM PM IC LCD Driver Touch Panel CTRL Audio Codec Mic Speaker Camera Gyro Accel eration Pressure ROM ROM Battery Charger RAM RAM PM IC LCD Driver Touch Panel CTRL Audio Codec Mic Mic Speaker Battery

31 Chip Scaling is Good Enough But

32 Chip Assembly Issues Pad Pitch Limits Chip Size Shrinkage 24nm Process 12nm Process 40μm Bump Pitch Chip Substrate 40μm Wiring Pitch

33 Constrains of Pad Pitch Substrate Wiring Pitch Limit High-Temp. Bonding Pith Limit

34 Substrate Wiring Pitch Limit Ceramic Organic Process Screen Printing Lithography Routing Pitch 80um 30um Bump Pitch 60um on die 40um on die

35 Min. Bonding Pitch (μm) Bonding Temperature and Min. Pitch 10um Narrow Pitch Possible 40 MonsterPAC Variation in Expansion Low Expansion Variation Tg Solder/Cu-Pillar Bump Bonding 10 Substrate CTE 12ppm/ Substrate CTE 30ppm/ Bonding Temperature ( )

36 Conventional Bonding Method Less than 40um Pitch Impossible

37 Realize 10um Pitch Bonding by MonsterPAC

38 Bump/Wire Formation on Substrate Master Mold Fabrication Replica Mold Fabrication Ink Ink Jet Head Bump/Wire Direct Writing Master Mold Laser Hardening Replica Mold Master Mold Replica Mold Low Temperature Hardening PI Master Mold Si, Glass Replica Mold Master Mold

39 Bump/Wire Formation on Substrate Bump & Wire Co-Formation (Intaglio Printing) squeegee Conductive Paste Replica Mold Replica Mold Substrate Wire 10μm Pitch Bump on Wire Substrate Bump Substrate

40 MONSTERPAC-10um Existing method Ceramic Organic MONSTER PAC-10um Process Screen Printing Lithography Gravure printing Bump on Line Routing Pitch 80um 40um 10um Bump Pitch 80um on die 40um on die 10μm on line Bump Aspect Ratio A B A:B = >1.0 Bonding Temp

41 World-First MONSTER PAC 10μm Bonding 24nm Process チップ 40μm Bump Pitch Chip 基板 40μm 配線ピッチ Substrate 40μm Wire Pitch 75% Shrink 12nm Process Chip Substrate 130 Low Temp. Bonding 10μm Pitch Bump & Wire Co-Formation

42 Change in Market Trend

43 Present Low Mix, High Volume

44 Future High Mix, Low Volume Total Market will still Expanding

45 Factories for Low Mix, High Volume

46 Conventional Semiconductor Factory Huge Factory Large Equipment

47 Why So Huge? 1. Wafer Process 2. Big Equipment 3. Long Process Step

48 Equipment in Conventional Factory Conventional FCBGA Fabrication Large Clean Room UBM Sputter Resist Coat Resist Expose Resist Develop Resist Ashing Bump Plating Resist Strip UBM Etch Back Grind Wafer Dicing Flux Coat Flip Chip Bonding Solder Reflow Flux Cleaning Plasma Cleaning Under fill Dispense Under fill Cure

49 Desk Top Flip Chip Bonder Conv. Flip Chip Bonder Machine Price : 1 Weight : 3.0t Bonding Load : 490N Bonding Temp. : 260 Size [WxDxH] : 3.0x1.8x1.9m Power Supply : 220V 1/10 Less than 100kg 20N 170deg 0.7x0.8x0.8m 100V-120V

50 The World s First Desk Top Factory Bump Printer NCP Dispenser Flip Chip Bonder Conventional Factory Investment :1 Footprint :1 Power Supply :200V Clean Room :Need Chemical/Gas :Need 1/40 1/30 100V No Need No Need Desk Top Factory Realize High Mix, Low Volume Production

51

52 CONNECTEC JAPAN s Challenge Issue of 5G in 2020 No Solutions for Conv. Method 1Fragile Device (Low-k/MEMS) 2Circuit Scale Increase (LTE+mm Wave) 3Many Variety, Variable-Production MONSTER PAC Realizing Industry 4.0 1Bump on Materials Damage Free Bonding 210μm Bump & Wire Co-Formation 3Desk Top Factory

53 Developing Schedule Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q SEMICON JAPAN SEMICON CHINA OSRDA DTF FCB 10um Bump & Line Machine Developing Set Up Mass Production Line Printer Dispenser Machine Assemble for Mass Production Mass Production High mix Low Volume Primitive Developing Mass Production developing

54 MONSTER PAC OSRDA Service Flow info@connectec-japan.com Client Requirement Order Approval Evaluation Acceptance CONNECTEC JAPAN Proposals Design Prototyping Production Quotation : Within 3 days Prototyping : From 2 to 6 weeks Any substrates available

55 MonsterPAC can deal with packaging issues in the IoT era with Bump on Substrate Low Temp. / Low Load, Damage Free Flip Chip Technology

56 Too Little Time to Explain All. Please visit our booth for more Good Solutions! Connectec Japan Booth : 5455, 5453

57 Appendix

58 Business Domain 1. OSRDA entrusted prototyping and production 2. Technology development for 10μm bonding pitch Desk top factory

59 MONSTER PAC Line up type C type P type F type S Ceramic Base Organic Base Film Base Mold & Cavity Soft Bump NCP NCP Chip Chip Soft Bump Soft Bump Au STB & Solder NCP Chip Chip Ceramic Substrate type CoC Chip on Chip Organic Substrate Film Substrate Core Technology Bump on Material Damage Free Bonding Ceramic Substrate type PoP PKG on PKG NCP Top Chip Bottom Chip Soft Bump Realizing IoT & Wearable User Centric Design FBGA Memory Chip Solder Ball Soft Bump

60 Prototyping Examples by OSRDA

61 Flip Chip Bonding for MEMS Bonding Non Broken Bonding on Film Conventional MONSTERPAC Wire Bonding Damage Free Bonding Bending Wire Open Film MEMS No Open Bending Bending Probe Head Assembly Human Body Pressure Wire Open Human Body Pressure No Open

62 CPU Module for Wearable High Density Module for Wearable Use Conventional SMT assembly Flash CPU MONSTERPAC Rigid & FPC Module 12mm CPU 9mm DRAM 12mm 18mm Size 50% down Weight 90% down Rigid Substrate DRAM + Flash Weight:18g FPC FPC Weight:2g

63 DRAM CoC DDR3 DRAM on CPU High Yield Chip On Chip Conventional MONSTERPAC DRAM Soldering Solder melts DRAM Soldering (260 deg C) (260 deg C) w/o Solder CPU 21mmx17mm 2000 Pad CPU Organic Package 40mmx40mm CPU Soldering Curve (260 deg C) DRAM falls CPU Low Temp Bond Rigid Solder Remain flat DRAM Under fill Dispensing Void free NCP (170 deg C) Voids in under fill NCP Dispensing

64 Narrow Gap Bonding 30um Gap Assembly for Large Sensor Conventional ACF Bonding Total 100kgf MONSTERPAC Damage Free Bonding Total 1kgf, um gap FPC 30um gap Solder Bonding 270 FPC Deformed 12mm 1,700bump 4dies

65 Narrow Gap Bonding Smaller Chip Area to Improve Yields Act as a Super Large Area Sensor Die 1 Die 2 Die 3 Die 4 12mm 1,700bump 4dies 24mm chip Defects or Failure chips 12mm chip Die FPC 30um Gap Chip Yields 50% = 20 good chips Total 40 chips Chip Yields90% = 168 good chips Total 188 chips FPC ACF Bonding High Pressure (>>100kgf) 30um gap NG Conventional Die FPC >300um ACF Die Gold Plated Ball FPC Soldering High Temp. (260 deg C ) Flex sub deformed Damage Free Bonding FP C MONSTERPAC Low Pressure (1kgf) Low Temp. (170 deg C) 30um gap OK Die NCP FPC 30um Die Conductive Paste