Overcoming Challenges in 3D NAND Volume Manufacturing
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1 Overcoming Challenges in 3D NAND Volume Manufacturing Thorsten Lill Vice President, Etch Emerging Technologies and Systems Flash Memory Summit 2017, Santa Clara 2017 Lam Research Corp. Flash Memory Summit 1
2 Topics Introduction Video showing 3D NAND manufacturing process Etch and deposition process challenges and solutions for 3D NAND Process control on-tool solutions Summary 2017 Lam Research Corp. Flash Memory Summit 2
3 Deposition and Etch Processes Define 3D NAND Memory Array 2017 Lam Research Corp. Flash Memory Summit 3
4 Deposition and Etch Processes Define 3D NAND Memory Array 2017 Lam Research Corp. Flash Memory Summit 4
5 Deposition and Etch Processes Define 3D NAND Memory Array Single Memory Cell Bitline: Metal fill Contact: Metal fill Stack: Alternating film deposition Slit: High aspect ratio etch Channel: High aspect ratio etch Wordline: Metal fill Stair: Staircase etch 2017 Lam Research Corp. Flash Memory Summit 5
6 Deposition and Etch Processes Define 3D NAND Memory Array Single Memory Cell Bitline: Metal fill SABRE copper plating VECTOR Strata deposition Stack: Alternating film deposition Flex HAR etch Slit: High aspect ratio etch Flex HAR etch Channel: High aspect ratio etch Wordline: Metal fill ALTUS CVD/ALD deposition Contact: Metal fill Stair: Staircase etch ALTUS CVD/ALD deposition Kiyo conductor etch 2017 Lam Research Corp. Flash Memory Summit 6
7 3D NAND Etch Process Challenges: Lam Etch Solutions Etch Challenges Within-Die Lam Solutions #1 in deposition and etch markets served Multi Level Contact: High aspect ratio etch Flex dielectric etch Across Wafer Stair: Staircase etch Kiyo conductor etch Wafer Edge Slit: High aspect ratio etch Flex dielectric etch Channel: High aspect ratio etch Flex dielectric etch 2017 Lam Research Corp. Flash Memory Summit 7
8 3D NAND Etch Process Challenges: Etching High Aspect Ratios Etch Challenges Within-Die Aspect Ratio = 9:1 Aspect Ratio = >40:1 Across Wafer Wafer Edge The Burj Khalifa, tallest structure in the world Channel hole etched for 90+ layer 3D NAND 2017 Lam Research Corp. Flash Memory Summit 8
9 3D NAND Etch Process Challenges: Etching High Aspect Ratios Etch Challenges Within-Die CD variation at top vs. bottom Bowing Flex channel hole etch Atomic-scale process control is required in addition to micron-scale etched depths Across Wafer Wafer Edge Incomplete etch Twisting Etched profile control precision: Angstroms Etch depth capability: Microns 2017 Lam Research Corp. Flash Memory Summit 9
10 3D NAND Etch Process Challenges: Uniform Etch Across the Wafer Etch Challenges Within-Die Across Wafer Channel holes etched Kiyo patterning etch Mask open patterning fidelity > 1 trillion per wafer improves channel uniformity Manufacturing sequence: A 1. Post litho A B 2. Hardmask etch A CD A CD B CD variation Pre-etch CD variation ~2 nm After etch with Kiyo <0.5 nm Wafer Edge B 3. Channel hole etch A CD A = CD B CD uniformity improved B CD A = CD B Uniform CD transferred Distribution of CDs after etch 5 Å, 3σ 2017 Lam Research Corp. Flash Memory Summit 10
11 3D NAND Etch Process Challenges: Extreme Edge Control of Yield Etch Challenges Within-Die Strange things happen at the edge of the wafer Finite wafer size creates gradients in fluxes of ions and neutrals Beyond wafer Across Wafer Ion Flux Wafer Edge Relative Values Neutral Flux Wafer Outer 8 mm of wafer: ~10% of die Wafer Cross-Section (mm) 2017 Lam Research Corp. Flash Memory Summit 11
12 3D NAND Etch Process Challenges: Extreme Edge Control of Yield Etch Challenges Within-Die Strange things happen at the edge of the wafer [CD bias, nm] Finite wafer size creates gradients in fluxes of ions and neutrals Beyond wafer Across Wafer Ion Flux Wafer Edge Wafer Relative Values Neutral Flux Wafer Example: Non-uniform CDs at wafer edge Wafer Cross-Section (mm) 2017 Lam Research Corp. Flash Memory Summit 12
13 3D NAND Etch Process Challenges: Extreme Edge Control of Yield Etch Challenges Within-Die Edge yield can now be optimized during etch: Corvus edge yield control [Etch Rate, norm.] 0 Across Wafer 5 0 Setting A Edge Fast Setting B Flat Wafer Edge 5 Wafer Wafer Cross-Section (mm) Setting C Edge Slow 2017 Lam Research Corp. Flash Memory Summit 13
14 3D NAND Etch Process Challenges and Lam Etch Solutions Within-Die Across Wafer Wafer Edge Flex high aspect ratio etch >40:1 etch capability Kiyo patterning capability 5 Å, 3σ uniformity of CDs Corvus edge yield solution available on Lam etch modules 2017 Lam Research Corp. Flash Memory Summit 14
15 3D NAND Etch Process Challenges: Lam Deposition Solutions Deposition Challenges ONON Stack Dep Lam Solutions #1 in deposition and etch markets served Bitline: Copper metal fill SABRE electroplating Hardmask Dep Contact: Tungsten metal fill ALTUS CVD/ALD deposition Wordline Fill wide-16x9w-v2 Stack: Alternating film deposition VECTOR Strata PECVD deposition Word Line: Tungsten metal fill ALTUS CVD/ALD deposition 2017 Lam Research Corp. Flash Memory Summit 15
16 3D NAND ONON Stack Deposition Challenge: Uniform, Low Stress Stack Deposition Deposition Challenges ONON Stack Dep Layers deposited > 200 pairs per stack Single Memory Cell VECTOR Strata ONON Stack Deposition Excellent film thickness control enables narrower threshold voltage distributions Uniform ON thickness in >200 pair stack Hardmask Dep VECTOR Strata N layer thickness < 0.5nm variation N layer thickness defines the device gate length Litho-defined gate CD variation wide-16x9w-v2 Wordline Fill Consistent, uniform film deposition is critical for patterning accuracy and electrical performance 2017 Lam Research Corp. Flash Memory Summit 16
17 3D NAND Hardmask Deposition Challenge: Mask Selectivity Deposition Challenges ONON Stack Dep Etch rate slows down with increasing mask + ONON thickness VECTOR AHM Hardmask Deposition New highly selective hardmask material enables thinner mask Hardmask Dep Wordline Fill Mask thickness For a given etch process, etch rate slows due to increased aspect ratio Stack thickness Low selectivity mask materials High selectivity mask materials Required Mask thickness Current Mask Material 75% thinner mask with new material New Mask Material Thinner hardmask enables etch of thicker ONON stack 2017 Lam Research Corp. Flash Memory Summit 17
18 .3µm 3D NAND Wordline Fill Challenge: Moving Reactants In and By-Products Out Uniform void-free fill difficult in deep 3D structures ONON Stack Dep Hardware design changes address these difficulties Reactant Saturation on Wafer 1.3µm Slit Slit Deposition Challenges 2ms Channel Hole diameter (100nm) Hardmask Dep 20ms Channe l Hole Channel Hole spacing (25nm) W 6.1 µm Top View Reactant pre-charge volumes increase dose Uniform W deposition top to bottom layer Reduced cycle times By-Products Removal Wordline Fill 3 wide-16x9w-v Combine lower temp nucleation (station 1) and high temp bulk fill (stations 2-4) Reduced F in the film Lower Rs Quad-station module (QSM) enables faster temperature transitions Higher productivity 2017 Lam Research Corp. Flash Memory Summit 18
19 Lam Process Control On-Tool Solutions Achieve Faster Learning Rate, Reduce Total Cost of Process Control Improved Productivity In situ, real-time sensors for endpoint control Big data analytics for fault detection, drift control and fast matching Every Wafer Process Control Feedforward and feedback control with integrated metrology Customizable APC algorithms Virtual metrology Expanded Process Window Litho-etch integrated tuning solutions for CD and overlay Computational models enable improved process window Real Time Depth Evolution End Point Control Optical Spectra Change in Mass Algorithms Pre Post Process Window Incoming Corrected Lam expanding capability with collaborations and continued investment 2017 Lam Research Corp. Flash Memory Summit 19
20 Summary 3D NAND manufacturing is deposition and etch intensive Increasing number of layers present unique challenges in delivering high aspect ratio structures with atomic scale process control Various options examined to extend 3D NAND roadmap to achieve higher bit density and lower cost Solutions presented for: Uniform high aspect ratio etch with extreme edge control of yield Low stress stack depositions, mask selectivity, and wordline fill 2017 Lam Research Corp. Flash Memory Summit 20
21
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