VLSI Design Digital Systems and VLSI

Transcription

1 VLSI Design Digital Systems and VLSI Somayyeh Koohi Department of Computer Engineering Adapted with modifications from lecture notes prepared by author 1

2 Overview Why VLSI? IC Manufacturing CMOS Technology The VLSI design process Modern VLSI Design: Chap1 2 of 38

3 Why VLSI? 1. Lower cost chip area number of ICs, 2. Faster 3. Lower power consumption 4. Higher reliability More integration less intra-chip connections better reliability Better testabilit 5. Less design and fabrication time Modern VLSI Design: Chap1 3 of 38

4 ICs over Discrete Circuits Advantages Size Speed Faster communication Power Consumption Smaller parasitic capacitance & resistance Manufacturing cost Cost reduction for parts other than chip (supply, fan, PCB, ) ASIC might be more expensive than standard IC, but system s cost will be lower Modern VLSI Design: Chap1 4 of 38

5 VLSI and you Processors: personal computers Electronic systems in cars Entertainment systems, DRAM/SRAM Special-purpose processors Modern VLSI Design: Chap1 5 of 38

6 Levels of Integration SSI MSI LSI VLSI Criteria: Gate count (2-20, , , ) Pin count Feature size Chip size Function gate & FF, module, subsystem, system Modern VLSI Design: Chap1 6 of 38

7 Levels of Integration (cont d) Where to go after VLSI? ULSI (Ultra Large Scale Integration - which is between 500,000 and 10,000,000 transistors), GSI (Gigantic Scale Integration - which is over 10,000,000 transistors). Modern VLSI Design: Chap1 7 of 38

8 Overview Why VLSI? IC Manufacturing CMOS Technology The VLSI design process Modern VLSI Design: Chap1 8 of 38

9 Technology Raw material of IC Manufacturing: Silicon Wafers During manufacturing Photolithographic process: pattern on mask (layout) pattern on wafer Changing the mask with a single fabrication line different ICs Modern VLSI Design: Chap1 9 of 38

10 CMOS Technology Difference between fabrication technology: type of transistor used Bipolar, nmos, CMOS Different speed & power characteristics (tradeoff) Modern VLSI Design: Chap1 10 of 38

11 Moore s Law Gordon Moore (co-founder of Intel) predicted that number of transistors per chip would grow exponentially (doubles every 18 months) log(#dev) t Obstacles for Moore s law: 1. Quantity and variety of products which use ICs has had less progress 2. Cost of design verification and test is large 3. Complexity of design makes it difficult to manage it among design and engineering groups Role of CAD tools Modern VLSI Design: Chap1 11 of 38

12 Moore s Law plot 10 9 # transistors s integrated 10 6 circuit 10 5 invented memory 10 4 CPU year Modern VLSI Design: Chap1 12 of 38

13 Cost of fabrication Current cost: $2-3 billion Typical fab line occupies about 1 city block, employs a few hundred people Most profitable period is first 18 months-2 years Modern VLSI Design: Chap1 13 of 38

14 Cost factors in ICs For large-volume ICs packaging is largest cost testing is second-largest cost For low-volume ICs design costs may swamp all manufacturing costs Wafer size: 8 inch (12 inch) Chip size: 1.5 x 1.5 cm 2 Modern VLSI Design: Chap1 14 of 38

15 Overview Why VLSI? IC Manufacturing CMOS Technology The VLSI design process Modern VLSI Design: Chap1 15 of 38

16 The VLSI design process Can be part of larger product design Major steps specification Algorithm design architecture logic design circuit design layout (physical design) Modern VLSI Design: Chap1 16 of 38

17 The steps Specification Function (what to do) Cost Other requirements Architecture: large blocks Logic Gates Latches Flip-Flops Circuits transistor Estimate speed & power Layout Layout size determines fabrication cost Shapes determine parasitics the circuit speed and power Modern VLSI Design: Chap1 17 of 38

18 Challenges in VLSI design 1. Multiple levels of abstraction English specification fu unction executable behavior system throughput, program design time sequential register- function units, machines transfer clock cycles logic gates logic literals, gate depth cost transistors circuit nanoseconds rectangles layout microns Modern VLSI Design: Chap1 18 of 38

19 Challenges in VLSI design (cont d) 2. Multiple and conflicting costs Speed Area Cost power, 3. Short design time (6 months delay losing 33% of the profit) Modern VLSI Design: Chap1 19 of 38

20 Solutions Techniques to eliminate unnecessary detail: 1. Hierarchical design Divide and conquer: breaking the chip into a hierarchy of components, where each consists of a body and a number of pins 2. Design abstraction Use multiple l levelsl of abstraction ti 3. Using CAD tools: tries to solve all the 3 mentioned problems 1. Dealing with multiple levels of abstraction is easier when you are not absorbed in the details 2. Computer programs can analyze cost trade-offs much better 3. Computers are much faster than humans Modern VLSI Design: Chap1 20 of 38

21 CAD Tools Categories 1. Design entry tools (e.g., schematic capture) Capture a design in machine-readable form for use by other programs Don t do any real design work 2. Analysis and verification tools (e.g., spice) Ease the analysis task Don t tell how to change the circuit for the desired function/spec. 3. Synthesis tools (e.g., Leonardo) Create a design at a lower level of abstraction from a higher level description. Both hierarchical design and design abstraction are as important to CAD tools as they are to humans Modern VLSI Design: Chap1 21 of 38

22 Dealing with complexity Divide-and-conquer: limit the number of components you deal with at any one time Group several components into larger components: Transistors form gates Gates form functional units Functional units form processing elements Modern VLSI Design: Chap1 22 of 38

23 Hierarchical name Interior view of a component Components and wires that make it up Exterior view of a component = type: body pins cout a b Full adder cin sum Modern VLSI Design: Chap1 23 of 38

24 Instantiating component types Each instance has its own name: add1 (type full adder) add2 (type full adder) Each instance is a separate copy of the type: Add1.a a cout Add1(Full adder) Add2.a sum a Add2(Full adder) sum b b cin cin Modern VLSI Design: Chap1 24 of 38

25 A hierarchical logic design box1 box2 x z Modern VLSI Design: Chap1 25 of 38

26 Net lists and component lists Net list: net1: top.in1 in1.in net2: i1.out xxx.b topin1: top.n1 xxx.xin1xin1 topin2: top.n2 xxx.xin2 botin1: top.n3 xxx.xin3 net3: xxx.out i2.in outnet: i2.out top.out Component list: top: in1=net1 n1=topin1 n2=topin2 n3=topine out=outnet i1: in=net1 out=net2 xxx: xin1=topin1 xin2=topin2 xin3=botin1 B=net2 out=net3 i2: in=net3 out=outnet Modern VLSI Design: Chap1 26 of 38

27 Component hierarchy top i1 xxx i2 Modern VLSI Design: Chap1 27 of 38

28 Hierarchical names Typical hierarchical name: top/i1.foo component pin Modern VLSI Design: Chap1 28 of 38

29 Layout and its abstractions Layout for dynamic latch: Modern VLSI Design: Chap1 29 of 38

30 Stick diagram V DD D Q' V SS φ φ' Modern VLSI Design: Chap1 30 of 38

31 Transistor schematic φ' + D Q' φ Modern VLSI Design: Chap1 31 of 38

32 Mixed schematic φ' D Q' φ inverter Modern VLSI Design: Chap1 32 of 38

33 Circuit abstraction Continuous voltages and time: + v v t t Modern VLSI Design: Chap1 33 of 38

34 Digital abstraction Discrete levels, discrete time: a a cout sum b a t t b full sum adder cin t b t t a b cout full sum adder cin sum t Modern VLSI Design: Chap1 34 of 38

35 Register-transfer abstraction Abstract components, abstract data types: Modern VLSI Design: Chap1 35 of 38

36 Top-down vs. bottom-up design Top-down design adds functional detail Create lower levels of abstraction from upper levels Bottom-up design creates abstractions ti from low-level behavior Good design needs both top-down and bottomup efforts Modern VLSI Design: Chap1 36 of 38

37 Design validation Validation: Any technique which increases confidence in correctness, e.g simulation Verification: Formal proof of correctness Must check at every step that errors haven t been introduced The longer an error remains, the more expensive it becomes to remove it Forward checking: compare results of less- and moreabstract stages Back annotation: copy performance numbers to earlier stages Modern VLSI Design: Chap1 37 of 38

38 Manufacturing test Not the same as design validation: just because the design is right doesn t mean that every chip coming off the line will be right Must quickly check whether manufacturing defects destroy function of chip Must also speed-grade To deliver high quality: Make the chip designer responsible for testing Modern VLSI Design: Chap1 38 of 38