Lecture 1: Introduction to Digital Logic Design. CK Cheng CSE Dept. UC San Diego

Transcription

1 Lecture 1: Introduction to Digital Logic Design CK Cheng CSE Dept. UC San Diego 1

2 Outlines Administration Motivation Scope 2

3 Administration Web site: WebCT: 3

4 Administration Instructor: CK Cheng, CSE2130, Teaching Assistants: Shih-Hung Weng, Jyoti Wadhwani, 4

5 Administration Schedule Outline (Use index to check the location of the textbooks) Lectures: 3:00-3:50PM, MWF, Center 115. Discussion: 9:00-9:50AM, F, Center 101. Office hours: CSE :30-11:30AM, T 1:00-2:00PM, W 5

6 Administration Textbook: Digital Design and Computer Architecture, D.M. Harris and S.L. Harris, Morgan Kaufmann, Second Edition, Grading iclicker: 5% (a ramp function saturates at 80% of class points) CK Cheng Office Hr. visits: 2% bonus (1% per visit) Homework: 10% (grade on style, completeness or correctness) Midterm 1: 25% (M 10/22) (style, completeness and correctness) Midterm 2: 30% (W 11/14) Midterm 3: 30% (F 12/07) Optional take home final exam due 6PM, F. 12/14: 1% bonus 6

7 Motivation Microelectronic technologies have revolutionized our world: cell phones, internet, rapid advances in medicine, etc. The semiconductor industry has grown from $21 billion in 1985 to $304 billion in

8 Robert Noyce, Nicknamed Mayor of Silicon Valley Cofounded Fairchild Semiconductor in 1957 Cofounded Intel in 1968 Co-invented the integrated circuit 8

9 Gordon Moore, Cofounded Intel in 1968 with Robert Noyce. Moore s Law: the number of transistors on a computer chip doubles every year (observed in 1965) Since 1975, transistor counts have doubled every two years. 9

10 Moore s Law If the automobile had followed the same development cycle as the computer, a Rolls-Royce would today cost $100, get one million miles to the gallon, and explode once a year... Robert Cringley 10

11 iclicker The purpose of this course is that we: A. Learn what s under the hood of an electronic component B. Learn the principles of digital design C. Learn to systematically debug increasingly complex designs D. Design and build digital systems E. All of the above F. Most of the above 11

12 iclicker Digital system can be built upon A. Mechanical relays B. Silicon transistors C. DNAs D. Quantum mechanical phenomena E. All of the above 12

13 Scope: Position in the Design Flow The class assumes CMOS transistors Application Software Operating Systems programs device drivers AND, OR logic Flip-Flip registers Synchronous designs, focus of this course Architecture Microarchitecture Logic Digital Circuits instructions registers datapaths controllers adders memories AND gates NOT gates but the application reaches beyond the assumed region. Analog Circuits Devices Physics amplifiers filters transistors diodes electrons 13

14 Scope: Sequence of Courses CSE20: Discrete Math CSE140/L: Digital System CSE141/L: Computer Architecture CSE : Architecture, Design Automation, Embedded Systems CSE237, , 291: Architecture, Design Automation, Embedded Systems ECE260A-C: VLSI Designs 14

15 Scope: Content We will cover four major things in this course: - Combinational Logic (H2) - Sequential Networks (H3) - Standard Modules (H5) - System Design (H4, H6-8) 15

16 Scope: Overall Picture of CS140 Data Path Subsystem Input Memory File Conditions Pointer Mux Control Subsystem ALU Memory Register Control Conditions CLK: Synchronizing Clock 16

17 Combinational Logic vs Sequential Network x 1... x n f i (x) x 1... x n s i f i (x) Combinational logic: y i = f i (x 1,..,x n ) CLK Sequential Networks 1. Memory 2. Time Steps (Clock) y i t = f i (x 1t,,x nt, s 1t,,s mt ) s i t+1 = g i (x 1t,,x nt, s 1t,,s mt ) 17

18 Scope Subjects Building Blocks Theory Combinational Logic Sequential Network Standard Modules System Design AND, OR, NOT, XOR AND, OR, NOT, FF Operators, Interconnects, Memory Data Paths, Control Paths Boolean Algebra Finite State Machine Arithmetic, Universal Logic Methodologies 18

19 Perspective Class notes Homework Textbook 19

20 Part I. Combinational Logic a b ab ab + cd c d e cd e (ab+cd) I) Specification II) Implementation III) Different Types of Gates 20