NOTE: Two (2) Double-sided Pages of Handwritten Notes permitted at Final Exam. Not Permitted in Class Class Seating Chart - Spring 2019

Transcription

1 Not Permitted in Class MSCI 222C Spring 2019 Introduction to Electronics Charles Rubenstein, Ph. D. Professor of Engineering & Information Science Session 9: Mon/Tues 04/08/19 & 04/09/19 Mondays 1:00-3:50pm; Tuesdays 2:00-4:50pm ARC E-13 1 Be sure to have all cellphones OFF No Headphones, Earbuds, etc. Water is allowed due to room temperature Class Seating Chart - Spring 2019 Cabinet Cabinet FRONT Whiteboard Instructor Station Kirill Dillon Morgan Terry Annie Barkin Class Seating Chart Tuesdays Cabinet Demo DESK FRONT Whiteboard Instructor Station Yingshi Jada Nicholas Jiaqi Bei Elizabeth MONDAY 1pm Adam Allyson William Rue Michelle Connie TUESDAY 2pm Atlas Mila Jenna Anurag Matt Sylvia Shelby Jasmine 1/29/ /24/ MSCI SP - Class Schedule & Due Dates REVISED MONDAY TUESDAY NOTES 28 January 22 January Session 1. Introduction, Review of Syllabus, Basic Concepts 4 February 29 January Session 2. Basic Electronic Devices (Homework #1 Due, Lab 1) 11 February 5 February Session 3. Semiconductor Materials & Diodes (H2, Q1, L2) 18 February 12 February Session 4. Decimal, Binary & Hex Number Systems (H3, Q2, L3) 25 February 19, 26 February OPEN LAB - Instructor out with Flu February 4 March (*) 5 March (*) Session 5. Analog and Digital Concepts (H4, Q3, L4) 11 March 12 March Spring Break March March (**) 19 March (**) Session 6. The Operational Amplifier (H5, Q4, L5) 25 March (***) 26 March (***) Session 7. Digital Integrated Circuit Logic Gates (H6, Q5, L6) 1 April 2 April Session 8. Flip-Flops & "Clocks"; (H7, Q6, L7) 8 April 9 April Session 9. Digital Counters (H8, Q7, L8) 15 April 16 April Session 10. Digital Shift Registers (H9, Q8, L9) 22 April 23 April Session 11. Analog & Digital IC Circuits Together (H10, Q9, L10) Session 12. Interfacing Computers, RFID (Q10) 29 April 30 April Last Day for Labs 6 May 7 May In-class Final Examination (Tuesday = Conflict Day) NOTE: Quizzes one week after homework session due & reviewed NO Classes: March - Midterm Break: Instructor out with Flu February MIDTERM: (*) Distributed; (**) Exam Due; (***) Exam Reviewed in class/draft Paper Due In-class Final Exams 6/7 May NOTE: Two (2) Double-sided Pages of Handwritten Notes permitted at Final Exam 6 1

2 MSCI 222C Class Readings Schedule In addition to the Class Notes (222Notes.pdf)!!! Session Due Notes 2 EW1: Pp 1-27; Armstrong: Chapters 1 3 (Pp 1-16) 3 EW1: Pp 28-65; Armstrong: Chapters 4 6 (Pp 17-63) 4 EW1: Pp 66-76; Armstrong: Chapters 7 9 (Pp ) 5 EW1: Pp 77 -End; Armstrong: Chapters (Pp ) 6 EW2: Pp 1-50 and Pg 90; Armstrong: Chapters (Pp ) 7 EW2: Pp 51-79, Review Pg 12; Armstrong: Ch. 14 End (Pp ) 8 EW2: Pp 80 - End, Review Pg 12 (CD4013, CD4017) 9 EW2: Review Pg 12 (CD4013, CD4017) 10 EW2: Review Pg 37 (555 Timer) 11 Review EW1 and EW2 as necessary, Sensors Lab Manual if interested 12 and on Review EW1 and EW2 as necessary EW1 = Basic Electronics: Transistors and Integrated Circuits, Workbook I by Forrest M. Mims, III (ew1.pdf) KEY EW2 = Digital Electronic Projects, Workbook II by Forrest M. Mims, III (ew2.pdf) Armstrong = Man of High Fidelity (armstrong2.pdf) Sensors = Radio Shack Electronic Sensors Lab by Forrest M. Mims, III (sensors.pdf) 7 MSCI 222C Hands-on Lab Modules #01: Measuring Resistance and Voltage #02: Voltage Sources, LEDS, Diodes & Characteristic Curves #03: Capacitors, Time Constants & Transistor Gain #04: Voltage Regulation & Transistor Switching #05: Analog IC Voltage Comparator #06: Basic Digital Logic Gates #07: Set-Reset Latches & Type D Flip-Flops #08: Decade Counter and One Shot Switch Debouncer #09: Three Stage Type D Flip-Flop Shift Register #10: NE555 IC Timer Circuits Optional Labs (Additional Labs may be added or substituted): #A: Sound Detector Circuit (Audio-triggered One-shot) #B: Seven Segment Display Decoder-Driver Circuit 8 Instructor Contact Information Dr. Charles Rubenstein <crubenst@pratt.edu> Professor of Engineering & Information Science Pratt Brooklyn Campus Office: ARC G-49 Spring 2019 Office hours (by appointment *) Mondays: 12:00pm - 1:00 pm = ARC G-49 (or E-13) Tuesdays: 12:00pm - 2:00pm = ARC G-49 (or E-13) * Class Session Archives 19sp09.pdf (Class PowerPoint slides)* 19sp09_h.pdf (6-slide/page handout format)* *Power points normally available by Thursday evening (*Please me at least a day in advance if you plan on coming to office hours ) Send me an crubenst@pratt.edu Subject line: 222C or Electronics 9 10 Spring OPEN LAB TIME - ARC E-13 * Mondays 9am 1pm & after 4pm BY PRE-ARRANGEMENT ONLY CONTACT: Mrs. Margaret Dy-So, Assistant to the Chairperson Math & Science Department ARC G-41 On pre-arranged day, access to E-09 and the White Console Cabinet is obtained from Ms. Dy-So or the student assistant in room G-39 * Other Open Lab times MAY be available

3 ** World Maker Faire NY ** For the seventh year, Dr. Rubenstein will be coordinating the IEEE Booth (Sponsored by Region 1, IEEE-USA, EAB and The IET) at the World Maker Faire New York NY Hall of Science - Queens, NY Saturday-Sunday September 2019 Questions? In Today s Class Session 9: DUE: Homework Set #08; Readings: Electronics Workbooks as needed Lecture: Digital Counters 2Do: Review Homework Set #08; Quiz #07 (Homework #07) 2Do: Hands-on Module #08: Decade Counter and One Shot Switch Debouncer #09: For class Session #10: DUE: Homework Set #09 Readings: Electronics Workbooks - as needed Lecture: Digital Shift Registers Review: Homework Set #09; Quiz #08 on Homework Set #08 2Do: Hands-on Module #09: Three Stage Type D Flip-Flop Shift Register 15 V. Method of Assessment & Grading Hands-on Lab Work Ten Homework Quizzes 30% (3% each)* 20% (2% each) EXAMS & Research Papers: Take Home Mid-Term 10% MidTerm Paper (Draft 5%; WTC %) 5% Final Examination 20% Final Paper (Draft 5%; WTC 5%, Final 5%) 15% (* - two each 5% Optional Labs after completing 10) 16 What does reading the text Man of High Fidelity mean to you with respect to your intellectual property? DRAFT paper (3%) + WTC (2%) = DRAFT (5%) + WTC(5%) + FINAL paper (5%) = Final paper must be at least six (6) pages (1500 words) long it MUST include direct references to the Armstrong text and at least three (3) other resources Questions?

4 MSCI 222C Electronics Review Kirchhoff s Laws - KCL & KVL Ohms Law Power Law emath Calculations Combining Resistors Time Constants Voltage Divider Equation KCL: Kirchhoff s Laws: KCL KVL The current going into any point has to be the same as the current going out of the point also called The Law of Conservation of Current KVL: The sum of all the voltages, as you go around a circuit from some fixed point and return there from the opposite direction, and taking polarity into account, is always ZERO also called The Law of Conservation of Voltage OHMS LAW & the POWER LAW There are three common forms for each Equation: Ohms Law: V=IR V = I R R = V / I I = V / R Power Law: P = I V P = I V P = I (IR) = I 2 R P = (V/R) V =V 2 /R About Electronics Math Calculations Ohms Law equation: V=IR and I = V / R 1. If R is 1 Ohm = 1 Ω and V is 1 volt: then I = 1 Ampere 2. If R is 1MΩ = 1,000,000 Ω and V is 1 volt: then I = 1 microampere = (1 ua = 1 µa) If R is 1k Ohm = 1kΩ = 1000Ω and V is 1 volt: then I = 1 milliampere ( = 1 ma) This is the most common calculation for our labs 22 Series Resistors Parallel Resistors 1. Resistors in SERIES add R ab = R 1 + R R n 2. For n Like Resistors in SERIES: R ab = n R 1. The Inverse of Resistances in PARALLEL add 1/R ab = 1/R 1 + 1/R /R n 2. For n Equal Resistances in Parallel; R ab = R / n 3. For TWO Resistors in Parallel; R ab = R 1 R 2 / (R 1 + R 2 )

5 Simple Series/Parallel Resistor Circuits R ab à a NOTES: Non-Inverting NPN Transistor Switch As shown, with switch DOWN: V in = 0 Voltage at the base, V b = 0 And the LED is OFF b The Equivalent Resistance of the circuit above: R ab = [ R 1 R 2 / (R 1 + R 2 ) ] + R 3 25 With the switch in the UP position: V in = +Vcc Voltage at the base, V b = V cc V R1 KVL: LED Voltage, V LED = V cc V R1 V be And the LED is ON NOTE: V CE à zero apx short circuit when transistor is ON ) 26 The Voltage Divider Equation Vout = Vin [ R 2 / (R 1 + R 2 ) ] When a voltage is applied to two (or more) resistors in series, the voltage across a particular resistor is the applied voltage times the selected resistor divided by the sum of the resistors 27 Time Constant NOTES The time required to charge or discharge a capacitor requires calculating: τ = R C With: τ in seconds, R in ohms, and C in Farads 28 Diodes in Series Circuits When a resistor (R 1) and a diode are connected in series to a voltage source (V) we use KCL to realize the current is the same through all series elements. Using the standard forward voltage drop (V d) value of 0.6volts and Ohm s Law we find the current through the resistor. For V = 15 and R 1 = 1KΩ : I R = I d = (V - V d)/r 1 = (15-0.6) volts / 1KΩ I R = 14.4 volts / 1K = 14.4 ma 29 Colors of Light Emitting Diodes LEDs can come in visible (red, green, blue, yellow, and white) and invisible (Infrared IR) colors. Multi-color RGB LEDs as well as specialty LEDs that blink, flicker, cycle all colors, or are programmed for other special effects, are common today. 30 5

6 Collector Current Gain in Transistors The current gain h FE of a transistor can be measured by dividing the current flowing in the device s collector lead (I C) by the current flowing in the device s base lead (I B) The formula for current gain is defined as: h FE = I C / I B If we have h FE and I B ; I B x h FE = I C About Transistor Calculations We saw earlier that we deal with the Base-Emitter and Collector-Emitter circuits separately as if they were unrelated - while at the same time note that I B * h FE = I C We also saw that the NPN schematic symbol can be divided into both a Base-Emitter INPUT circuit and a Collector-Emitter OUTPUT circuit. B-E forms a silicon diode and the C-E current, I C, as noted above, is controlled by I B and h FE NOTES: Inverting NPN Transistor Switch As shown, with switch DOWN: V in = 0, voltage at the base, V b = 0 Note: V CE à apx OPEN circuit And the LED is ON With the switch in the UP position: V in = +Vcc Voltage at the base, V b = 0.6v Note: V CE à apx SHORT circuit And the LED is OFF as V c is at ground Basic Logic Gates & Symbols - 1 Non-Inverting Gate Buffer Y =A Inverting Gate Inverter OR Gate Y = A OR B NOR Gate Y = NOT (A OR B) Y = NOTA OR A B Y Buffer A Y Inverter A Y NOR A B Y AND Gate Y = A AND B Basic Logic Gates & Symbols - 2 NAND Gate Y = NOT (A AND B) AND A B Y NAND A B Y LOGIC Gates & Truth Tables Truth Table Review Exclusive-OR Gate ExOR Y = A ExOR B ExOR A B Y ExNOR A B Y Exclusive-NOR Gate ExNOR Y = NOT (A ExOR B) 35 8-Bit Binary Decoding Chart 2 7 = = = = = = = = 1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 36 6

7 Questions? Homework #07 Quiz Feedback Amplifiers MSCI 222 Electronics Homework #08 Review Homework #08 1a/1b 8.1a. Redraw the schematic sketch on the bottom lower left of page 5 of EW2 which shows how to make an OR Gate out of three (3) NAND Gates. Since a single CD4011 IC contains four NAND gates this circuit can actually be implemented. Be sure to label your circuit inputs and outputs: Gate 1 In, Gate 2 In, Gate 1 Out, Gate 2 Out, and Gate 3 Out. 8.1b. Add pin numbers to the sketch In 1 In 2 39 (Note: Not shown - Pin 14 goes to Vcc and Pin 7 goes to Ground) (Input Pins 12/13 and Output Pin 11 for the fourth NAND gate are not shown) 40 Homework #08 2, 3 8-2) Using truth tables (entering the symbols 0 and 1 only) prove that the three NAND gates of problem 1, above, will actually perform the OR function, i.e., fill in the 5 columns of the truth table below. Gate 1 In Gate 2 In Gate 1 Out Gate2 Out Gate 3 Out ) Are the leftmost two columns and the last column consistent with logical OR? (Yes or No? - if No, please correct your work <grin>.) Yes Homework #08 2a 8.2a) Using the symbols 0 and 1 only write the logic outputs as indicated for two-input NAND gates, OR gates and NOR gates in the columns of the truth table below. (Presume the inputs are to each of separate logic gate devices ) Gate 1 In Gate 2 In NAND Out OR Out Table 7.1 Three Gate Truth Table NOR Out

8 MSCI 222 Electronics Lab Module 7 Part 1: CD4001 Part 1: Set-Reset Latch using a CD4001 Quad 2-input NOR Gate Hands-On Lab Module 7 Review 43 Pressing S1 puts the flip-flop into one state (e.g., LED1 ON) where it stays or latches and Pressing S2 puts it into the other state where it also stays 44 Lab Module 7 Part 2: CD4013 Part 2: Data (D) Flip-flop (using a CD4013 Dual D Flip-flop IC) S1=Clock S2=Set (direct) S3=Reset (direct) S4=Data Note 2@4.7K, 2@10K Pressing S2 sets the flip-flop (LED4 ON; LED7 OFF); Pressing S3 resets the device (LED4 OFF; LED7 ON); Pressing S1 (Clock) w/s4 OFF has no effect (LED4 OFF; LED7 ON); Pressing S4 (Data) and then pressing S1 => LED4 ON & LED7 OFF 45 MSCI 222 Electronics Lecture Notes Review 46 Switch Output Bouncing Review A push button switch is a metal piece that can be pressed onto a contact to close the switch allowing current to flow. In inexpensive switches, the metal is not far from the contact and when released may actually bounce up and down giving the appearance of more than one output pulse to a fast (high speed) IC gate: Flip-Flop: Review A Flip-Flop normally has TWO outputs, Q and Q-not which is the inverse of the Q output often noted as Q on a schematic diagram. The CD4013, for example, has TWO Type D Flip-Flops within it with the following schematic: Note that an IC Gate has a threshold voltage above which the Gate sees a 1 47 The Truth Table for the Flip-Flop outputs is: Q Q-NOT 48 8

9 Clocking a Single Flip-Flop CD4017 Decade Counter IC - NOTES Single Flip-Flop (FF) same as One Stage Shift Register Note: If the Flip-Flop s output is used as the input of another FF, EACH FF acts as a divide by 2 counter. With several FFs in series, we can create multiple divide by two outputs, and even create hexadecimal or decade counters. 49 1) The 4017 counts, or is clocked by rises of the input clock line 2) Note that CE the "clock enable" line disables the clock when high connect it to ground if you don t get the clock to work... 3) IC Pin 14 is marked Clk or In meaning Clock input pin 4) The ten states of the CD4017 Decade Counter are labeled 0-9 to represent the count of clock pulses after reset. After all CD4017 counters have been reset, input pulses increase the count and set the output states 0, 1, 2, 9, after which the counter resets (sets a carry pulse) and restarts at 0. 5) Your first step in understanding what is going on is to label the diagram and mark each pin with its function! (e.g., pin 15 = "reset", pin 11 = "output count 9"). 50 CD4017 Decade Counter Output Pulses 7-Segment Display Outputs Output pulse widths are equal to the space between rises of the input clock Setup: We know a 7-Segment Display displays the Numbers; 0 through 9: What other characters and/or symbols could be displayed by a 7-segment display? Segment Display Outputs Other symbols: A, C, E, F, H, J, L, P, U and h: b, d, and others are also possible Questions?

10 In The Next Class Session 10: DUE: Homework Set #09 Readings: Electronics Workbooks - as needed Lecture: Digital Shift Registers Review: Homework Set #09; Quiz #08 on Homework Set #08 2Do: Hands-on Module #09: Three Stage Type D Flip-Flop Shift Register For class Session 11: DUE: Homework Set #10 Readings: Review as needed Lecture: Analog & Digital IC Circuits Review: Homework Set #10; Quiz #09 (Homework #09) 2Do: Module #10 Last REQUIRED LAB MODULE! NE555 IC Timer 55 MSCI 222 Electronics Hands-On Lab GENERAL NOTES 56 Basic Lab Notes 1) To conserve your multimeter s 9V battery, be sure to turn the meter off if not in use for over 5 minutes. 2) All work is to be done individually, and submitted before you leave the class. Double check when leaving that your meter is turned off and in your Pratt kit. There are no lab reports" in this course. 3) Enter all results on both the Instructions Sheet if printed out -and the Results Sheet. Keep the Instruction Sheets as a reference. Turn in the Results Sheets at the end of the period, finished or not, for grading. There are NO results sheets after Module 7! You MUST have the instructor view your work! CMOS Precautions!!! CMOS (Complementary Metal-Oxide-Silicon) ICs Please note that CMOS ICs require special handling In industry, a grounding strap is typically used when handling more sensitive CMOS devices to avoid static discharge from your hands getting into a gate input. Our chips are not THAT sensitive 1. ALWAYS insert CMOS ICs into circuits with the power OFF 2. Connect any UNUSED pins that feed logic gates to ground or +Vcc to avoid erroneous outputs 3. The voltage at any CMOS input gate must NOT exceed +Vcc ** CAUTION ** Most electronic component leads have been tinned with a tin-lead coating to make them easier to solder into a circuit. +5 Volt Voltage Regulator Circuit You ALREADY have the 7805 Voltage Regulator connected as a 5 Volt Source (with a 1K Resistor and Green LED): DO NOT REMOVE REGULATOR CIRCUIT!!! It will be used as the power source for the rest of the semester Although we will NOT do soldering in this class, AFTER working with components, please avoid lead poisoning by washing your hands. Thank You!

11 Parts Needed for Lab Module 8 MSCI 222 Electronics Hands-On Lab Module #08 (2) 4.7KΩ Resistor (R1, R2) (1) 1KΩ Resistor (Part 2: R3) (1) 10KΩ Resistor (Part 2: R4) (1) 100µF Capacitor (Part 2: C1) (1) RED LED (Part 2) (1) CD4017 Decade Counter IC (1 per IC) (1) CD4013 Dual Flip-Flop IC (2 F/F per IC) (1) RED LED Devices #0 through # 9 (on Console) 61 (1) S1, S2 Switches (on Console) 62 MSCI 222 Electronics Inserting a 16-pin DIP into the prototype board across the notch and with pin 1 at upper left ProtoBoard Trench IC Notch 4017 Decade Counter/Divider The 4017 is a CMOS logic counter and decoder circuit in a 16-pin DIP package. The device, which activates a single output pin for each count from 0 to 9, can be used to make counters, timers, LED sequencers and controllers. Pin 1 Pin 16 Vcc Pin 8 (gnd) 63 Supply Voltage Range: +3 to +18 volts Note: Vcc at pin 16 and Common Ground at pin 8 (See Precautions for working with CMOS circuits) 64 Module 8 Part 1: CD4017 Decade Counter CD4017 Decade Counter Pulses the The Numbers on OUTSIDE of the IC symbol are the Pin Numbers NOTE: If you put a wire to pin 14 (Clock Input) and put your hand near it you create an antennae for the flourescent light s 60 Hz! DO NOT DISASSEMBLE USED LATER IN LAB 8 65 NOTE: Diagram above example only. It may NOT be the correct connection for this output

12 CD4013 Dual Type-D Flip-Flop Module 8 Pt 2: One-Shot Switch De-bouncer The CD4013 is a CMOS logic integrated circuit containing two D-Type Flip-Flops in a 14-pin DIP package. A clock pulse will store data in the D input. Connecting Clock and Q outputs makes a toggle Flip-Flop for counting circuits. Note: +Vcc at pin 14 and Common Ground at pin 7 (See Precautions for working with CMOS circuits) 67 For each S1 pressing there is a single pulse output Using the de-bounced output as the new S1 input to Pin 14 of the CD4017 provides a clean decade counter input and the ability to set up the LED outputs to illustrate Count to N and Halt and Divide by N (see next slide) DO NOT DISASSEMBLE ALSO USED IN LAB 968 Count to 5 and HOLD Counter Pulses Count to 5 and Reset Counter Pulses NOTE: Diagram above example only. It is NOT the correct connection for this output. NOTE: Diagram below is example only. It is NOT the correct connection for this output Module 8 Part 1: CD4017 Decade Counter Module 8 Pt 2: One-Shot Switch De-bouncer The Numbers on OUTSIDE of the IC symbol are the Pin Numbers DO NOT DISASSEMBLE USED LATER IN LAB 71 For each S1 pressing there is a single pulse output Using the de-bounced output as the new S1 input to Pin 14 of the CD4017 provides a clean decade counter input and the ability to set up the LED outputs to illustrate Count to N and Halt and Divide by N DO NOT DISASSEMBLE ALSO USED IN LAB

13 Questions? Any Questions? Send me an or End 75 13