CHW 261: Logic Design
|
|
|
- Jack O’Connor’
- 5 years ago
- Views:
Transcription
1 HW 261: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby Slide 1
2 Digital Fundamentals HAPTER Shift Registers Slide 2
3 Shift Registers Basic Shift Register Operations A shift register is an arrangement of flip-flops with important applications in storage and movement of data. Some basic data movements are illustrated here. Data in Data in Data out Data out Data in Data out Serial in/shift right/serial out Serial in/shift left/serial out Parallel in/serial out Data in Data in Data out Data out Serial in/parallel out Parallel in/parallel out Rotate right Rotate left Slide 3
4 Shift Registers Serial-in/Serial out Shift Register Shift registers are available in I form or can be constructed from discrete flip-flops as is shown here with a five-bit serial-in serial-out register. Each clock pulse will move an input bit to the next flip-flop. For example, a 1 is shown as it moves across Slide 4
5 Shift Registers Serial-in/Serial out Shift Register Slide 5
6 Shift Registers Serial in/parallel out Shift Register An application of shift registers is conversion of serial data to parallel form. Slide 6
7 Shift Registers Serial in/parallel out Shift Register Slide 7
8 Shift Registers Parallel in/serial out Shift Register An application of shift registers is conversion of parallel data to serial form. Slide 8
9 Shift Registers Parallel in/serial out Shift Register Slide 9
10 Shift Registers Parallel in/parallel out Shift Register Slide 10
11 Bidirectional Shift Register Shift Registers Bidirectional shift registers can shift the data in either direction using a RIGHT/LEFT input. Slide 11
12 Universal Shift Register Shift Registers A universal shift register has both serial and parallel input and output capability. The 74H194 is an example of a 4-bit bidirectional universal shift register. D 0 D 1 D 2 D 3 LR S 0 S 1 SR SER SL SER LK (1) (9) (10) (2) (7) (11) (3) (4) (5) (6) SRG 4 (15) (14) (13) (12) Q 0 Q 1 Q 2 Q 3 Slide 12
13 Shift Register Applications Shift Registers Shift registers can be used to delay a digital signal by a predetermined amount. An 8-bit serial in/serial out shift register has a 40 MHz clock. What is the total delay through the register? The delay for each clock is 1/40 MHz = 25 ns The total delay is 8 x 25 ns = 200 ns Data in LK Data in 25 ns LK 40 MHz A B SRG 8 Q 7 Q 7 Data out Data out t d = 200 ns Slide 13
14 Shift Registers Shift Register Applications A UART (Universal Asynchronous Receiver Transmitter) is a serial-toparallel converter and a parallel to serial converter. UARTs are commonly used in small systems where one device must communicate with another. Parallel data is converted to asynchronous serial form and transmitted. The serial data format is: LK Transmitter shift register Serial data out Transmitter data register Data bus Buffers LK Receiver data register Receiver shift register Serial data in Start Bit (0) D 7 D 6 D 5 D 4 D 3 D 2 D 1 D Stop Bits (1) 0 t Slide 14
15 Shift Register ounters Shift Registers Inputs Outputs D LK Q Q omments SET RESET Shift registers can form useful counters by recirculating a pattern of 0 s and 1 s. Two important shift register counters are the Johnson counter and the ring counter. The Johnson counter is useful when you need a sequence that changes by only one bit at a time but it has a limited number of states (2n, where n = number of stages). FF0 FF1 FF2 FF3 D 0 Q 0 D 1 Q 1 D 2 Q 2 D 3 Q 3 Q 3 Q 3 LK The Johnson counter can be made with a series of D flip-flops Slide 15
16 Johnson ounter Shift Registers Inputs Outputs J K LK Q Q omments 0 0 Q 0 Q 0 No change RESET SET 1 1 Toggle Q 0 Q 0 LK J 0 Q 0 J 1 Q 1 J 2 Q 2 J 3 FF0 FF1 FF2 FF3 Q K 0 Q 0 K 1 Q 1 K 2 Q 2 K 3 Q 3 or with a series of J-K flip flops. Here Q 3 and Q 3 are fed back to the J and K inputs with a twist. Q 3 Q 3 3 LK Q 0 Q 1 Q 2 Q Slide 16
17 Ring ounter Shift Registers The ring counter can also be implemented with either D flip-flops or J-K flip-flops. Here is a 4-bit ring counter constructed from a series of D flip-flops. Notice the feedback. LK FF0 FF1 FF2 FF3 D 0 Q 0 D 1 Q 1 D 2 D 3 Q 2 Q 3 Q 3 Like the Johnson counter, it can also be implemented with J-K flip flops. J 0 Q 0 J 1 Q 1 J 2 Q 2 J 3 FF0 FF1 FF2 FF3 Q K 0 Q 0 K 1 Q 1 K 2 Q 2 K 3 Q 3 Q 3 Q 3 3 LK Slide 17
18 FF1 Q Shift Registers Ring ounter Redrawing the Ring counter (without the clock shown) FF0 shows why it is a ring. J 0 Q 0 The disadvantage to this counter is that it must be preloaded with the desired pattern (usually a single 0 or 1) and it has states number (n, where n = number of flip-flops. 3 FF3 J 3 Q 3 3 K3 Q 3 Q K 0 Q 0 K 1 Q 1 J 1 Q 1 On the other hand, it has the advantage of being self-decoding with a unique output for each state. 2 F F K 2 Q2 J 2 Q2 Slide 18
19 Ring ounter Shift Registers A common pattern for a ring counter is to load it with a single 1 or a single 0. The waveforms shown here are for an 8-bit ring counter with a single 1. LK Q 0 Q 1 Q 2 Q 3 Q 4 Q 5 Q 6 Q 7 Slide 19
20 Shift Registers Basic Shift Register Operations A shift register is an arrangement of flip-flops with important applications in storage and movement of data. Some basic data movements are illustrated here. Data in Data in Data out Data out Data in Data out Serial in/shift right/serial out Serial in/shift left/serial out Parallel in/serial out Data in Data in Data out Data out Serial in/parallel out Parallel in/parallel out Rotate right Rotate left Slide 20
21 Application: Traffic Light ontroller Slide 21
22 Application: Traffic Light ontroller Slide 22
Chapter 9: Shift Registers
樹德科技大學資訊工程系 hapter 9: Shift Registers Shi-Huang hen Fall 2010 1 Outline Basic Shift Register Functions Serial In/Serial Out Shift Registers Serial In/Parallel Out Shift Registers Parallel In/Serial Out
Universal Asynchronous Receiver- Transmitter (UART)
Universal Asynchronous Receiver- Transmitter (UART) (UART) Block Diagram Four-Bit Bidirectional Shift Register Shift Register Counters Shift registers can form useful counters by recirculating a pattern
Serial In/Serial Left/Serial Out Operation
Shift Registers The need to storage binary data was discussed earlier. In digital circuits multi-bit data has to be stored temporarily until it is processed. A flip-flop is able to store a single binary
LSN 12 Shift Registers
LSN 12 Shift Registers Department of Engineering Technology LSN 12 Shift Registers Digital circuits with data storage and data movement functions Storage capacity is the total number of bits of digital
Review of digital electronics. Storage units Sequential circuits Counters Shifters
Review of digital electronics Storage units Sequential circuits ounters Shifters ounting in Binary A counter can form the same pattern of 0 s and 1 s with logic levels. The first stage in the counter represents
Agenda. EE 260: Introduction to Digital Design Counters and Registers. Asynchronous (Ripple) Counters. Asynchronous (Ripple) Counters
EE26: igital esign, Spring 28 4/8/8 EE 26: Introduction to igital esign ounters and Registers Yao Zheng epartment of Electrical Engineering University of Hawaiʻi at Mānoa Agenda ounters Introduction: ounters
VTU NOTES QUESTION PAPERS NEWS RESULTS FORUMS Registers
Registers Registers are a very important digital building block. A data register is used to store binary information appearing at the output of an encoding matrix.shift registers are a type of sequential
Sequential Logic Counters and Registers
Sequential Logic ounters and Registers ounters Introduction: ounters Asynchronous (Ripple) ounters Asynchronous ounters with MOD number < 2 n Asynchronous Down ounters ascading Asynchronous ounters svbitec.wordpress.com
Analysis of Sequential Circuits
NOTE: Explanation Refer lass Notes Digital ircuits(15ee23) Analysis of Sequential ircuits by Nagaraj Vannal, Asst.Professor, School of Electronics Engineering,.L.E. Technological University, Hubballi.
Counter dan Register
Counter dan Register Introduction Circuits for counting events are frequently used in computers and other digital systems. Since a counter circuit must remember its past states, it has to possess memory.
CHAPTER1: Digital Logic Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits 1 Sequential Circuits Introduction Composed of a combinational circuit to which the memory elements are connected to form a feedback
Chapter 7 Counters and Registers
Chapter 7 Counters and Registers Chapter 7 Objectives Selected areas covered in this chapter: Operation & characteristics of synchronous and asynchronous counters. Analyzing and evaluating various types
DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS
COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE422) COUNTERS One common requirement in digital circuits is counting, both forward and backward. Digital clocks and
IT T35 Digital system desigm y - ii /s - iii
UNIT - III Sequential Logic I Sequential circuits: latches flip flops analysis of clocked sequential circuits state reduction and assignments Registers and Counters: Registers shift registers ripple counters
Digital Fundamentals: A Systems Approach
Digital Fundamentals: A Systems Approach Counters Chapter 8 A System: Digital Clock Digital Clock: Counter Logic Diagram Digital Clock: Hours Counter & Decoders Finite State Machines Moore machine: One
Chapter 6. Flip-Flops and Simple Flip-Flop Applications
Chapter 6 Flip-Flops and Simple Flip-Flop Applications Basic bistable element It is a circuit having two stable conditions (states). It can be used to store binary symbols. J. C. Huang, 2004 Digital Logic
Registers and Counters
Registers and Counters Clocked sequential circuit = F/Fs and combinational gates Register Group of flip-flops (share a common clock and capable of storing one bit of information) Consist of a group of
Module -5 Sequential Logic Design
Module -5 Sequential Logic Design 5.1. Motivation: In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on
WWW.STUDENTSFOCUS.COM + Class Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to Unit III 2. SKILLS ADDRESSED: Listening I year, 02 sem CS6201 Digital Principles
Registers and Counters
Registers and Counters Clocked sequential circuit = F/Fs and combinational gates Register Group of flip-flops (share a common clock and capable of storing one bit of information) Consist of a group of
Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers
EEE 304 Experiment No. 07 Name Of The Experiment: Sequential circuit design Latch, Flip-flop and Registers Important: Submit your Prelab at the beginning of the lab. Prelab 1: Construct a S-R Latch and
Digital Logic Design ENEE x. Lecture 19
Digital Logic Design ENEE 244-010x Lecture 19 Announcements Homework 8 due on Monday, 11/23. Agenda Last time: Timing Considerations (6.3) Master-Slave Flip-Flops (6.4) This time: Edge-Triggered Flip-Flops
SEQUENTIAL LOGIC. Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur
SEQUENTIAL LOGIC Satish Chandra Assistant Professor Department of Physics P P N College, Kanpur www.satish0402.weebly.com OSCILLATORS Oscillators is an amplifier which derives its input from output. Oscillators
Introduction. Serial In - Serial Out Shift Registers (SISO)
Introduction Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes
CHW 261: Logic Design
CHW 26: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby http://www.bu.edu.eg/staff/halazayed4 http://bu.edu.eg/staff/ahmedshalaby4# Slide Digital Fundamentals CHAPTER 7 Latches, Flip-Flops
Registers & Counters. Logic and Digital System Design - CS 303 Erkay Savaş Sabanci University
Registers & ounters Logic and igital System esign - S 33 Erkay Savaş Sabanci University Registers Registers like counters are clocked sequential circuits A register is a group of flip-flops Each flip-flop
CHAPTER 6 COUNTERS & REGISTERS
CHAPTER 6 COUNTERS & REGISTERS 6.1 Asynchronous Counter 6.2 Synchronous Counter 6.3 State Machine 6.4 Basic Shift Register 6.5 Serial In/Serial Out Shift Register 6.6 Serial In/Parallel Out Shift Register
Asynchronous (Ripple) Counters
Circuits for counting events are frequently used in computers and other digital systems. Since a counter circuit must remember its past states, it has to possess memory. The chapter about flip-flops introduced
EET2411 DIGITAL ELECTRONICS
5-8 Clocked D Flip-FlopFlop One data input. The output changes to the value of the input at either the positive going or negative going clock trigger. May be implemented with a J-K FF by tying the J input
Chapter 3 Unit Combinational
EE 200: Digital Logic Circuit Design Dr Radwan E Abdel-Aal, COE Logic and Computer Design Fundamentals Chapter 3 Unit Combinational 5 Registers Logic and Design Counters Part Implementation Technology
Experiment 8 Introduction to Latches and Flip-Flops and registers
Experiment 8 Introduction to Latches and Flip-Flops and registers Introduction: The logic circuits that have been used until now were combinational logic circuits since the output of the device depends
NH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-III SEQUENTIAL CIRCUITS
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF ELETRONICS AND COMMUNICATION ENGINEERING COURSE NOTES SUBJECT: DIGITAL ELECTRONICS CLASS: II YEAR ECE SUBJECT CODE: EC2203
Vignana Bharathi Institute of Technology UNIT 4 DLD
DLD UNIT IV Synchronous Sequential Circuits, Latches, Flip-flops, analysis of clocked sequential circuits, Registers, Shift registers, Ripple counters, Synchronous counters, other counters. Asynchronous
Logic Design. Flip Flops, Registers and Counters
Logic Design Flip Flops, Registers and Counters Introduction Combinational circuits: value of each output depends only on the values of inputs Sequential Circuits: values of outputs depend on inputs and
Logic Design II (17.342) Spring Lecture Outline
Logic Design II (17.342) Spring 2012 Lecture Outline Class # 03 February 09, 2012 Dohn Bowden 1 Today s Lecture Registers and Counters Chapter 12 2 Course Admin 3 Administrative Admin for tonight Syllabus
RS flip-flop using NOR gate
RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two
RS flip-flop using NOR gate
RS flip-flop using NOR gate Triggering and triggering methods Triggering : Applying train of pulses, to set or reset the memory cell is known as Triggering. Triggering methods:- There are basically two
Sequential Digital Design. Laboratory Manual. Experiment #7. Counters
The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Spring 2018 ECOM 2022 Khaleel I. Shaheen Sequential Digital Design Laboratory Manual Experiment #7 Counters Objectives
ECE 172 Digital Systems. Chapter 2.2 Review: Ring Counter, Johnson Counter. Herbert G. Mayer, PSU Status 7/14/2018
ECE 172 Digital Systems Chapter 2.2 Review: Ring Counter, Johnson Counter Herbert G. Mayer, PSU Status 7/14/2018 1 Syllabus l Ring Counter l Parallel Output Ring Counter l Ring Counter via D Flip-Flops
0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 1 1 Stop bits. 11-bit Serial Data format
Applications of Shift Registers The major application of a shift register is to convert between parallel and serial data. Shift registers are also used as keyboard encoders. The two applications of the
DEPARTMENT OF ELECTRICAL &ELECTRONICS ENGINEERING DIGITAL DESIGN
DEPARTMENT OF ELECTRICAL &ELECTRONICS ENGINEERING DIGITAL DESIGN Assoc. Prof. Dr. Burak Kelleci Spring 2018 OUTLINE Synchronous Logic Circuits Latch Flip-Flop Timing Counters Shift Register Synchronous
Chapter 4. Logic Design
Chapter 4 Logic Design 4.1 Introduction. In previous Chapter we studied gates and combinational circuits, which made by gates (AND, OR, NOT etc.). That can be represented by circuit diagram, truth table
Logic Design Viva Question Bank Compiled By Channveer Patil
Logic Design Viva Question Bank Compiled By Channveer Patil Title of the Practical: Verify the truth table of logic gates AND, OR, NOT, NAND and NOR gates/ Design Basic Gates Using NAND/NOR gates. Q.1
Rangkaian Sekuensial. Flip-flop
Rangkaian Sekuensial Rangkaian Sekuensial Flip-flop Combinational versus Sequential Functions Logic functions are categorized as being either combinational (sometimes referred to as combinatorial) or sequential.
Chapter 9 Counters. Clock Edge Output Q 2 Q 1 Q
hapter 9 ounters 9. Introduction ounters are devices which have a LOK input and produce n outputs. ounters consist of flip-flops connected together in specific ways such that on each clock edge the output
Counters
Counters A counter is the most versatile and useful subsystems in the digital system. A counter driven by a clock can be used to count the number of clock cycles. Since clock pulses occur at known intervals,
SEMESTER ONE EXAMINATIONS 2002
SEMESTER ONE EXAMINATIONS 2002 EE101 Digital Electronics Solutions Question 1. An assembly line has 3 failsafe sensors and 1 emergency shutdown switch. The Line should keep moving unless any of the following
ELE2120 Digital Circuits and Systems. Tutorial Note 8
ELE2120 Digital Circuits and Systems Tutorial Note 8 Outline 1. Register 2. Counters 3. Synchronous Counter 4. Asynchronous Counter 5. Sequential Circuit Design Overview 1. Register Applications: temporally
ASYNCHRONOUS COUNTER CIRCUITS
ASYNCHRONOUS COUNTER CIRCUITS Asynchronous counters do not have a common clock that controls all the Hipflop stages. The control clock is input into the first stage, or the LSB stage of the counter. The
Learning Outcomes. Unit 13. Sequential Logic BISTABLES, LATCHES, AND FLIP- FLOPS. I understand the difference between levelsensitive
1.1 1. Learning Outcomes Unit 1 I understand the difference between levelsensitive and edge-sensitive I understand how to create an edge-triggered FF from latches Sequential Logic onstructs 1. 1.4 Sequential
Registers & Counters. BME208 Logic Circuits Yalçın İŞLER
Registers & ounters BME28 Logic ircuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Registers Registers are clocked sequential circuits A register is a group of flip-flops 2 Each flip-flop capable
Unit-5 Sequential Circuits - 1
Unit-5 Sequential Circuits - 1 1. With the help of block diagram, explain the working of a JK Master-Slave flip flop. 2. Differentiate between combinational circuit and sequential circuit. 3. Explain Schmitt
CSC Computer Architecture and Organization
S 37 - omputer Architecture and Organization Lecture 6: Registers and ounters Registers A register is a group of flip-flops. Each flip-flop stores one bit of data; n flip-flops are required to store n
MC9211 Computer Organization
MC9211 Computer Organization Unit 2 : Combinational and Sequential Circuits Lesson2 : Sequential Circuits (KSB) (MCA) (2009-12/ODD) (2009-10/1 A&B) Coverage Lesson2 Outlines the formal procedures for the
Switching Theory And Logic Design UNIT-IV SEQUENTIAL LOGIC CIRCUITS
Switching Theory And Logic Design UNIT-IV SEQUENTIAL LOGIC CIRCUITS Sequential circuits Classification of sequential circuits: Sequential circuits may be classified as two types. 1. Synchronous sequential
Final Exam review: chapter 4 and 5. Supplement 3 and 4
Final Exam review: chapter 4 and 5. Supplement 3 and 4 1. A new type of synchronous flip-flop has the following characteristic table. Find the corresponding excitation table with don t cares used as much
EMT 125 Digital Electronic Principles I CHAPTER 6 : FLIP-FLOP
EMT 125 Digital Electronic Principles I CHAPTER 6 : FLIP-FLOP 1 Chapter Overview Latches Gated Latches Edge-triggered flip-flops Master-slave flip-flops Flip-flop operating characteristics Flip-flop applications
(Refer Slide Time: 2:00)
Digital Circuits and Systems Prof. Dr. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture #21 Shift Registers (Refer Slide Time: 2:00) We were discussing
Chapter 2. Digital Circuits
Chapter 2. Digital Circuits Logic gates Flip-flops FF registers IC registers Data bus Encoders/Decoders Multiplexers Troubleshooting digital circuits Most contents of this chapter were covered in 88-217
UNIT IV. Sequential circuit
UNIT IV Sequential circuit Introduction In the previous session, we said that the output of a combinational circuit depends solely upon the input. The implication is that combinational circuits have no
Chapter 5 Sequential Circuits
Logic and omputer esign Fundamentals hapter 5 Sequential ircuits Part - Storage Elements Part Storage Elements and Sequential ircuit Analysis harles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hyperlinks
Registers, Register Transfers and Counters Dr. Fethullah Karabiber
36 OMPUTER HARWARE Registers, Register Transfers and ounters r. Fethullah Karabiber Overview 2 Registers, Microoperations and Implementations Registers and load enable Register transfer operations Microoperations
Advanced Devices. Registers Counters Multiplexers Decoders Adders. CSC258 Lecture Slides Steve Engels, 2006 Slide 1 of 20
Advanced Devices Using a combination of gates and flip-flops, we can construct more sophisticated logical devices. These devices, while more complex, are still considered fundamental to basic logic design.
Introduction to Sequential Circuits
Introduction to Sequential Circuits COE 202 Digital Logic Design Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals Presentation Outline Introduction to Sequential Circuits Synchronous
Sequential Logic Basics
Sequential Logic Basics Unlike Combinational Logic circuits that change state depending upon the actual signals being applied to their inputs at that time, Sequential Logic circuits have some form of inherent
Logic and Computer Design Fundamentals. Chapter 7. Registers and Counters
Logic and Computer Design Fundamentals Chapter 7 Registers and Counters Registers Register a collection of binary storage elements In theory, a register is sequential logic which can be defined by a state
Digital Logic Design Sequential Circuits. Dr. Basem ElHalawany
Digital Logic Design Sequential Circuits Dr. Basem ElHalawany Combinational vs Sequential inputs X Combinational Circuits outputs Z A combinational circuit: At any time, outputs depends only on inputs
Flip-Flops and Registers
The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning. Flip-Flops and
More on Flip-Flops Digital Design and Computer Architecture: ARM Edition 2015 Chapter 3 <98> 98
More on Flip-Flops Digital Design and Computer Architecture: ARM Edition 2015 Chapter 3 98 Review: Bit Storage SR latch S (set) Q R (reset) Level-sensitive SR latch S S1 C R R1 Q D C S R D latch Q
Scanned by CamScanner
NAVEEN RAJA VELCHURI DSD & Digital IC Applications Example: 2-bit asynchronous up counter: The 2-bit Asynchronous counter requires two flip-flops. Both flip-flop inputs are connected to logic 1, and initially
ELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 6 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
UNIVERSITI TEKNOLOGI MALAYSIA
SULIT Faculty of Computing UNIVERSITI TEKNOLOGI MALAYSIA FINAL EXAMINATION SEMESTER I, 2016 / 2017 SUBJECT CODE : SUBJECT NAME : SECTION : TIME : DATE/DAY : VENUES : INSTRUCTIONS : Answer all questions
ELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 7 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
DIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute
DIGITAL TECHNICS Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 7. LECTURE: REGISTERS, COUNTERS AND SERIAL ARITHMETIC CIRCUITS st (Autumn) term 208/209 7. LECTURE: REGISTERS,
Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill
Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Objectives: Analyze the operation of sequential logic circuits. Understand the operation of digital counters.
Chapter 6 Registers and Counters
EEA051 - Digital Logic 數位邏輯 Chapter 6 Registers and Counters 吳俊興國立高雄大學資訊工程學系 January 2006 Chapter 6 Registers and Counters 6-1 Registers 6-2 Shift Registers 6-3 Ripple Counters 6-4 Synchronous Counters
Computer Organization & Architecture Lecture #5
Computer Organization & Architecture Lecture #5 Shift Register A shift register is a register in which binary data can be stored and then shifted left or right when a shift signal is applied. Bits shifted
ECE 263 Digital Systems, Fall 2015
ECE 263 Digital Systems, Fall 2015 REVIEW: FINALS MEMORY ROM, PROM, EPROM, EEPROM, FLASH RAM, DRAM, SRAM Design of a memory cell 1. Draw circuits and write 2 differences and 2 similarities between DRAM
Sequential Logic Circuit
Prof.Manoj avedia ( 98674297 ) (urallalone@yahoo.com) ` 4 Sequential Logic ircuit hapter-4(hours : Marks: )(269 Principle of Digital Electronics) SEUENTIL LOGI IRUIT 4. Introduction to Sequential Logic
ECE 3401 Lecture 11. Sequential Circuits
EE 3401 Lecture 11 Sequential ircuits Overview of Sequential ircuits Storage Elements Sequential circuits Storage elements: Latches & Flip-flops Registers and counters ircuit and System Timing Sequential
Outline. CPE/EE 422/522 Advanced Logic Design L03. Review: Clocked D Flip-Flop with Rising-edge Trigger. Sequential Networks
Outline PE/EE 422/522 Advanced Logic Design L3 Electrical and omputer Engineering University of Alabama in Huntsville What we know ombinational Networks Analysis, Synthesis, Simplification, Buiing Blocks,
Introduction. NAND Gate Latch. Digital Logic Design 1 FLIP-FLOP. Digital Logic Design 1
2007 Introduction BK TP.HCM FLIP-FLOP So far we have seen Combinational Logic The output(s) depends only on the current values of the input variables Here we will look at Sequential Logic circuits The
Digital Systems Laboratory 3 Counters & Registers Time 4 hours
Digital Systems Laboratory 3 Counters & Registers Time 4 hours Aim: To investigate the counters and registers constructed from flip-flops. Introduction: In the previous module, you have learnt D, S-R,
EEE2135 Digital Logic Design Chapter 6. Latches/Flip-Flops and Registers/Counters 서강대학교 전자공학과
EEE235 Digital Logic Design Chapter 6. Latches/Flip-Flops and Registers/Counters 서강대학교 전자공학과 . Delay and Latches ) Signal Storage a. as voltage level static memory b. as charges dynamic memory 2) Delays
INC 253 Digital and electronics laboratory I
INC 253 Digital and electronics laboratory I Laboratory 9 Sequential Circuit Author: ID Co-Authors: 1. ID 2. ID 3. ID Experiment Date: Report received Date: Comments For Instructor Full Marks Pre lab 10
(Refer Slide Time: 2:03)
(Refer Slide Time: 2:03) Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture # 22 Application of Shift Registers Today we
Flip Flop. S-R Flip Flop. Sequential Circuits. Block diagram. Prepared by:- Anwar Bari
Sequential Circuits The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory
YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING. EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall
YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING EXPERIMENT VIII: FLIP-FLOPS, COUNTERS 2014 Fall Objective: - Dealing with the operation of simple sequential devices. Learning invalid condition in
Sequential circuits. Same input can produce different output. Logic circuit. William Sandqvist
Sequential circuits Same input can produce different output Logic circuit If the same input may produce different output signal, we have a sequential logic circuit. It must then have an internal memory
Flip-Flops and Sequential Circuit Design
Flip-Flops and Sequential Circuit Design ECE 52 Summer 29 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6
Introduction to Microprocessor & Digital Logic
ME262 Introduction to Microprocessor & Digital Logic (Sequential Logic) Summer 2 Sequential Logic Definition The output(s) of a sequential circuit depends d on the current and past states of the inputs,
REPEAT EXAMINATIONS 2004 SOLUTIONS
REPET EXMINTIONS 24 SOLUTIONS MODULE: EE Digital Electronics COURSE:.Eng. in Electronic Engineering (year ).Eng. in Info and Communications Engineering (year ).Eng. in Mechatronic Engineering (year 2).Eng.
The University of Texas at Dallas Department of Computer Science CS 4141: Digital Systems Lab
The University of Texas at Dallas Department of Computer Science CS 4141: Digital Systems Lab Experiment #5 Shift Registers, Counters, and Their Architecture 1. Introduction: In Laboratory Exercise # 4,
DIGITAL REGISTERS. Serial Input Serial Output. Block Diagram. Operation
DIGITAL REGISTERS http://www.tutorialspoint.com/computer_logical_organization/digital_registers.htm Copyright tutorialspoint.com Flip-flop is a 1 bit memory cell which can be used for storing the digital
Sequential Logic and Clocked Circuits
Sequential Logic and Clocked Circuits Clock or Timing Device Input Variables State or Memory Element Combinational Logic Elements From combinational logic, we move on to sequential logic. Sequential logic
Chapter. Synchronous Sequential Circuits
Chapter 5 Synchronous Sequential Circuits Logic Circuits- Review Logic Circuits 2 Combinational Circuits Consists of logic gates whose outputs are determined from the current combination of inputs. Performs
OFC & VLSI SIMULATION LAB MANUAL
DEVBHOOMI INSTITUTE OF TECHNOLOGY FOR WOMEN, DEHRADUN - 24847 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING Prepared BY: Ajay Kumar Gautam Asst. Prof. Electronics & Communication Engineering
VU Mobile Powered by S NO Group
Question No: 1 ( Marks: 1 ) - Please choose one A 8-bit serial in / parallel out shift register contains the value 8, clock signal(s) will be required to shift the value completely out of the register.
Slide 1. Flip-Flops. Cross-NOR SR flip-flop S R Q Q. hold reset set not used. Cross-NAND SR flip-flop S R Q Q. not used reset set hold 1 Q.
Slide Flip-Flops Cross-NOR SR flip-flop Reset Set Cross-NAND SR flip-flop Reset Set S R reset set not used S R not used reset set 6.7 Digital ogic Slide 2 Clocked evel-triggered NAND SR Flip-Flop S R SR
ECE 25 Introduction to Digital Design. Chapter 5 Sequential Circuits ( ) Part 1 Storage Elements and Sequential Circuit Analysis
EE 25 Introduction to igital esign hapter 5 Sequential ircuits (5.1-5.4) Part 1 Storage Elements and Sequential ircuit Analysis Logic and omputer esign Fundamentals harles Kime & Thomas Kaminski 2008 Pearson