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1 21 rue La Noue Bras de Fer Nantes - France Phone : +33 (0) info@systemplus.fr - website : September - Version 1 Written by: Maher Sahmimi DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 1
2 Table of Contents 1. Overview / Introduction....3 Executive Summary Reverse Costing Methodology 2. Texas Instruments Company Profile Manufacturing Process Flow Overview CMOS Process Flow MEMS Process Flow Description of the Wafer Fabrication Units 3. Physical Analysis..9 Synthesis of the Physical Analysis DLP 0.17 HVGA: Package Characteristics DLP 0.17 HVGA: Package Opening DLP 0.17 HVGA: Package Cross Section DLP 0.17 HVGA: Process technology DLP 0.17 HVGA: Micromirrors-Pictures DLP 0.3 WVGA: Package Characteristics DLP 0.3 WVGA: Package Opening DLP 0.3 WVGA: Package Cross Section DLP 0.3 WVGA: Process technology DLP 0.3 WVGA: Micromirrors-Pictures DLP nhd: Package Characteristics DLP nhd: Package Opening DLP nhd: Package Cross Section DLP nhd: Process technology DLP nhd: Micromirrors-Pictures DLP : Technology evolution 5. Cost Analysis..88 Economic Analysis Hypotheses Yields Explanation Yields Synthesis Synthesis of the Cost Analysis CMOS Wafer Front-End Cost CMOS Die Cost MEMS Wafer Front-End Cost MEMS Front-End Cost per Steps MEMS Front-End Cost per Equipment MEMS Front-End Cost per Consumables MEMS Die Cost Back-End : Package Cost Back-End : Package Cost Per Steps Manufacturing Cost 6. Estimated Manufacturer Price Analysis Contact Glossary Selling Price estimation Estimated manufacturer Price 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 2
3 Executive Summary This full reverse costing study has been conducted to provide insight on technology data, manufacturing cost and selling price of three TI DLP Pico projectors : DLP nhd, DLP 0.3 WVGA, DLP 0.17 HVGA. The DLP Pico devices are three MOEMSs (Micro-Opto-Electro-Mechanical Systems) designed by Texas Instruments and integrate an array of Micromirrors. The DLP Pico nhd was extracted from the Galaxy beam phone. The component is packaged in a small ceramic housing (16mm x 6.9mm) and futures a nhd resolution (640 x 360). The DLP1700, features a Half-VGA Resolution (480 x 320), and has a 0.17-Inch Micromirror Array Diagonal, while the DLP3000 features a Wide-VGA Resolution ( ) and has a 0.3-Inch Micromirror Array Diagonal. Both of them, were extracted from optima devices by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 3
4 Reverse Costing Methodology The reverse costing analysis is conducted in 3 phases: The dies are extracted in order to get overall data: dimensions, main blocks, pad number and pin out, die marking Set up of the manufacturing process. Teardown analysis Setup of the manufacturing environment Cost simulation of the process steps with different year scenarios Costing analysis Supply Chain Analysis Analysis of the selling price Selling price analysis 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 4
5 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 5
6 Optoma PK101 : Teardown Top Cover Main Board Optoma PK101 Projector module Optoma PK101 : Teardown 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 6
7 DLP1700 : Package Characteristics & Marking Package type : Ceramic Land Grid Array CLGA Package size : 16mm x 9mm x 6mm Pin pitch : 0.6mm The package marking includes : 8AA76Z0 012A Top side view Plastic protection Ceramic substrate 9.00mm Back side with a Panasonic board to board connector 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 7
8 1mm Ceramic substrate 720 µm 1,2 mm Organic adhesive Wall Cross-Sectional Plane DMD Brazing with SiO2 spheres Ceramic substrate External pad used for the test. Pad for the connector 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 8
9 Optoma PK301 : Teardown RGB LEDs Lens DLP3000 Optoma PK301 Radiators Dichroic mirrors Pico DPP2600 ASIC/Processor 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 9
10 DLP3000 : Package Characteristics & Marking The package is a Ceramic Land Grid Array Package (CLGA) Package Marking include : Z3J7A : Lot Trace Code 043B : Encoded Device Part Number Package Top view 11.72mm 2.90mm Package Tilt view Package Back View 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 10
11 Galaxy Beam : Teardown Dichroic mirrors Fly s-eye lens Green LED Red & Bleu LED Galaxy Beam DLP nhd Pico DPP2601 ASIC/Processor Projector module 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 11
12 DLP nhd : Micromirrors Active Area 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 12
13 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 13
14 DLP Pico : Process Flow 1/3 Planarized Oxide MEMS Oxide deposited CMP Pattern and etching via Tungsten MEMS Deposit tungsten, pattern and etch Capping Oxide Aluminum MEMS Metal 3 (Al) deposit, pattern and etch Capping oxide deposit, pattern and etch Sacrificial Polymer MEMS Sacrificial polymer deposit & pattern 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 14
15 MEMS Wafer Steps Cost 1/ by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 15
16 MEMS Wafer Consumables Cost 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 16
17 Contact The reverse costing analysis represents the best cost/price evaluation given the publically available data, completed with industry expert estimates. Given the hypothesis presented in this analysis the major sources of correction would lead to a +/- 10% correction on the manufacturing cost (if all parameters are cumulated) IC +/- 8% MEMS +/- 5% Test +/- 20% These results are open for discussion. We can re-evaluate this circuit with your information. Please contact us: 2012 by SYSTEM PLUS CONSULTING, all rights reserved. Texas Instruments DLP Pico Family 17
9 rue Alfred Kastler - BP Nantes Cedex 3 - France Phone : +33 (0) website :
9 rue Alfred Kastler - BP 10748-44307 Nantes Cedex 3 - France Phone : +33 (0) 240 180 916 - email : info@systemplus.fr - website : www.systemplus.fr January 2012 Written by: Maher SAHMIMI DISCLAIMER :
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